ABC: A System for Sequential Synthesis and Verification
 
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saigDual.c
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1
20
21#include "saig.h"
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29
30static inline void Saig_ObjSetDual( Vec_Ptr_t * vCopies, int Id, int fPos, Aig_Obj_t * pItem ) { Vec_PtrWriteEntry( vCopies, 2*Id+fPos, pItem ); }
31static inline Aig_Obj_t * Saig_ObjDual( Vec_Ptr_t * vCopies, int Id, int fPos ) { return (Aig_Obj_t *)Vec_PtrEntry( vCopies, 2*Id+fPos ); }
32
33static inline void Saig_ObjDualFanin( Aig_Man_t * pAigNew, Vec_Ptr_t * vCopies, Aig_Obj_t * pObj, int iFanin, Aig_Obj_t ** ppRes0, Aig_Obj_t ** ppRes1 ) {
34
35 Aig_Obj_t * pTemp0, * pTemp1, * pCare;
36 int fCompl;
37 assert( iFanin == 0 || iFanin == 1 );
38 if ( iFanin == 0 )
39 {
40 pTemp0 = Saig_ObjDual( vCopies, Aig_ObjFaninId0(pObj), 0 );
41 pTemp1 = Saig_ObjDual( vCopies, Aig_ObjFaninId0(pObj), 1 );
42 fCompl = Aig_ObjFaninC0( pObj );
43 }
44 else
45 {
46 pTemp0 = Saig_ObjDual( vCopies, Aig_ObjFaninId1(pObj), 0 );
47 pTemp1 = Saig_ObjDual( vCopies, Aig_ObjFaninId1(pObj), 1 );
48 fCompl = Aig_ObjFaninC1( pObj );
49 }
50 if ( fCompl )
51 {
52 pCare = Aig_Or( pAigNew, pTemp0, pTemp1 );
53 *ppRes0 = Aig_And( pAigNew, pTemp1, pCare );
54 *ppRes1 = Aig_And( pAigNew, pTemp0, pCare );
55 }
56 else
57 {
58 *ppRes0 = pTemp0;
59 *ppRes1 = pTemp1;
60 }
61}
62
66
81Aig_Man_t * Saig_ManDupDual( Aig_Man_t * pAig, Vec_Int_t * vDcFlops, int nDualPis, int fDualFfs, int fMiterFfs, int fComplPo, int fCheckZero, int fCheckOne )
82{
83 Vec_Ptr_t * vCopies;
84 Aig_Man_t * pAigNew;
85 Aig_Obj_t * pObj, * pTemp0, * pTemp1, * pTemp2, * pTemp3, * pCare, * pMiter;
86 int i;
87 assert( Saig_ManPoNum(pAig) > 0 );
88 assert( nDualPis >= 0 && nDualPis <= Saig_ManPiNum(pAig) );
89 assert( vDcFlops == NULL || Vec_IntSize(vDcFlops) == Aig_ManRegNum(pAig) );
90 vCopies = Vec_PtrStart( 2*Aig_ManObjNum(pAig) );
91 // start the new manager
92 pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
93 pAigNew->pName = Abc_UtilStrsav( pAig->pName );
94 // map the constant node
95 Saig_ObjSetDual( vCopies, 0, 0, Aig_ManConst0(pAigNew) );
96 Saig_ObjSetDual( vCopies, 0, 1, Aig_ManConst1(pAigNew) );
97 // create variables for PIs
98 Aig_ManForEachCi( pAig, pObj, i )
99 {
100 if ( i < nDualPis )
101 {
102 pTemp0 = Aig_ObjCreateCi( pAigNew );
103 pTemp1 = Aig_ObjCreateCi( pAigNew );
104 }
105 else if ( i < Saig_ManPiNum(pAig) )
106 {
107 pTemp1 = Aig_ObjCreateCi( pAigNew );
108 pTemp0 = Aig_Not( pTemp1 );
109 }
110 else
111 {
112 pTemp0 = Aig_ObjCreateCi( pAigNew );
113 pTemp1 = Aig_ObjCreateCi( pAigNew );
114 if ( vDcFlops )
115 pTemp0 = Aig_NotCond( pTemp0, !Vec_IntEntry(vDcFlops, i-Saig_ManPiNum(pAig)) );
116 else
117 pTemp0 = Aig_NotCond( pTemp0, !fDualFfs );
118 }
119 Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 0, Aig_And(pAigNew, pTemp0, Aig_Not(pTemp1)) );
120 Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 1, Aig_And(pAigNew, pTemp1, Aig_Not(pTemp0)) );
121 }
122 // create internal nodes
123 Aig_ManForEachNode( pAig, pObj, i )
124 {
125 Saig_ObjDualFanin( pAigNew, vCopies, pObj, 0, &pTemp0, &pTemp1 );
126 Saig_ObjDualFanin( pAigNew, vCopies, pObj, 1, &pTemp2, &pTemp3 );
127 Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 0, Aig_Or (pAigNew, pTemp0, pTemp2) );
128 Saig_ObjSetDual( vCopies, Aig_ObjId(pObj), 1, Aig_And(pAigNew, pTemp1, pTemp3) );
129 }
130 // create miter and flops
131 pMiter = Aig_ManConst0(pAigNew);
132 if ( fMiterFfs )
133 {
134 Saig_ManForEachLi( pAig, pObj, i )
135 {
136 Saig_ObjDualFanin( pAigNew, vCopies, pObj, 0, &pTemp0, &pTemp1 );
137 if ( fCheckZero )
138 {
139 pCare = Aig_And( pAigNew, pTemp0, Aig_Not(pTemp1) );
140 pMiter = Aig_Or( pAigNew, pMiter, pCare );
141 }
142 else if ( fCheckOne )
143 {
144 pCare = Aig_And( pAigNew, Aig_Not(pTemp0), pTemp1 );
145 pMiter = Aig_Or( pAigNew, pMiter, pCare );
146 }
147 else // check X
148 {
149 pCare = Aig_And( pAigNew, Aig_Not(pTemp0), Aig_Not(pTemp1) );
150 pMiter = Aig_Or( pAigNew, pMiter, pCare );
151 }
152 }
153 }
154 else
155 {
156 Saig_ManForEachPo( pAig, pObj, i )
157 {
158 Saig_ObjDualFanin( pAigNew, vCopies, pObj, 0, &pTemp0, &pTemp1 );
159 if ( fCheckZero )
160 {
161 pCare = Aig_And( pAigNew, pTemp0, Aig_Not(pTemp1) );
162 pMiter = Aig_Or( pAigNew, pMiter, pCare );
163 }
164 else if ( fCheckOne )
165 {
166 pCare = Aig_And( pAigNew, Aig_Not(pTemp0), pTemp1 );
167 pMiter = Aig_Or( pAigNew, pMiter, pCare );
168 }
169 else // check X
170 {
171 pCare = Aig_And( pAigNew, Aig_Not(pTemp0), Aig_Not(pTemp1) );
172 pMiter = Aig_Or( pAigNew, pMiter, pCare );
173 }
174 }
175 }
176 // create PO
177 pMiter = Aig_NotCond( pMiter, fComplPo );
178 Aig_ObjCreateCo( pAigNew, pMiter );
179 // create flops
180 Saig_ManForEachLi( pAig, pObj, i )
181 {
182 Saig_ObjDualFanin( pAigNew, vCopies, pObj, 0, &pTemp0, &pTemp1 );
183 if ( vDcFlops )
184 pTemp0 = Aig_NotCond( pTemp0, !Vec_IntEntry(vDcFlops, i) );
185 else
186 pTemp0 = Aig_NotCond( pTemp0, !fDualFfs );
187 Aig_ObjCreateCo( pAigNew, pTemp0 );
188 Aig_ObjCreateCo( pAigNew, pTemp1 );
189 }
190 // set the flops
191 Aig_ManSetRegNum( pAigNew, 2 * Aig_ManRegNum(pAig) );
192 Aig_ManCleanup( pAigNew );
193 Vec_PtrFree( vCopies );
194 return pAigNew;
195}
196
209void Saig_ManBlockPo( Aig_Man_t * pAig, int nCycles )
210{
211 Aig_Obj_t * pObj, * pCond, * pPrev, * pTemp;
212 int i;
213 assert( nCycles > 0 );
214 // add N flops (assuming 1-hot encoding of cycles)
215 pPrev = Aig_ManConst1(pAig);
216 pCond = Aig_ManConst1(pAig);
217 for ( i = 0; i < nCycles; i++ )
218 {
219 Aig_ObjCreateCo( pAig, pPrev );
220 pPrev = Aig_ObjCreateCi( pAig );
221 pCond = Aig_And( pAig, pCond, pPrev );
222 }
223 // update the POs
224 Saig_ManForEachPo( pAig, pObj, i )
225 {
226 pTemp = Aig_And( pAig, Aig_ObjChild0(pObj), pCond );
227 Aig_ObjPatchFanin0( pAig, pObj, pTemp );
228 }
229 // set the flops
230 Aig_ManSetRegNum( pAig, Aig_ManRegNum(pAig) + nCycles );
231 Aig_ManCleanup( pAig );
232}
233
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240
#define ABC_NAMESPACE_IMPL_START
#define ABC_NAMESPACE_IMPL_END
void Aig_ManSetRegNum(Aig_Man_t *p, int nRegs)
Definition aigMan.c:438
#define Aig_ManForEachCi(p, pObj, i)
ITERATORS ///.
Definition aig.h:393
Aig_Obj_t * Aig_And(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:104
Aig_Obj_t * Aig_ObjCreateCo(Aig_Man_t *p, Aig_Obj_t *pDriver)
Definition aigObj.c:66
struct Aig_Obj_t_ Aig_Obj_t
Definition aig.h:51
Aig_Man_t * Aig_ManStart(int nNodesMax)
DECLARATIONS ///.
Definition aigMan.c:47
#define Aig_ManForEachNode(p, pObj, i)
Definition aig.h:413
typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t
INCLUDES ///.
Definition aig.h:50
int Aig_ManCleanup(Aig_Man_t *p)
Definition aigMan.c:265
void Aig_ObjPatchFanin0(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFaninNew)
Definition aigObj.c:282
Aig_Obj_t * Aig_ObjCreateCi(Aig_Man_t *p)
DECLARATIONS ///.
Definition aigObj.c:45
Aig_Obj_t * Aig_Or(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:259
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
Definition bblif.c:37
Aig_Man_t * Saig_ManDupDual(Aig_Man_t *pAig, Vec_Int_t *vDcFlops, int nDualPis, int fDualFfs, int fMiterFfs, int fComplPo, int fCheckZero, int fCheckOne)
FUNCTION DEFINITIONS ///.
Definition saigDual.c:81
void Saig_ManBlockPo(Aig_Man_t *pAig, int nCycles)
Definition saigDual.c:209
#define Saig_ManForEachLi(p, pObj, i)
Definition saig.h:98
#define Saig_ManForEachPo(p, pObj, i)
Definition saig.h:93
#define assert(ex)
Definition util_old.h:213
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42