ABC: A System for Sequential Synthesis and Verification
 
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aig.h File Reference
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <assert.h>
#include "misc/vec/vec.h"
#include "misc/util/utilCex.h"
Include dependency graph for aig.h:

Go to the source code of this file.

Classes

struct  Aig_Obj_t_
 
struct  Aig_Man_t_
 
struct  Aig_Cut_t_
 
struct  Aig_ManCut_t_
 

Macros

#define Aig_ObjForEachCut(p, pObj, pCut, i)
 
#define Aig_CutForEachLeaf(p, pCut, pLeaf, i)
 
#define Aig_ManForEachCi(p, pObj, i)
 ITERATORS ///.
 
#define Aig_ManForEachCiReverse(p, pObj, i)
 
#define Aig_ManForEachCo(p, pObj, i)
 
#define Aig_ManForEachCoReverse(p, pObj, i)
 
#define Aig_ManForEachObj(p, pObj, i)
 
#define Aig_ManForEachObjReverse(p, pObj, i)
 
#define Aig_ManForEachObjVec(vIds, p, pObj, i)
 
#define Aig_ManForEachObjVecReverse(vIds, p, pObj, i)
 
#define Aig_ManForEachNode(p, pObj, i)
 
#define Aig_ManForEachNodeReverse(p, pObj, i)
 
#define Aig_ManForEachExor(p, pObj, i)
 
#define Aig_ManForEachExorReverse(p, pObj, i)
 
#define Aig_ObjForEachFanout(p, pObj, pFanout, iFan, i)
 
#define Aig_ManForEachPiSeq(p, pObj, i)
 SEQUENTIAL ITERATORS ///.
 
#define Aig_ManForEachLoSeq(p, pObj, i)
 
#define Aig_ManForEachPoSeq(p, pObj, i)
 
#define Aig_ManForEachLiSeq(p, pObj, i)
 
#define Aig_ManForEachLiLoSeq(p, pObjLi, pObjLo, k)
 

Typedefs

typedef typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t
 INCLUDES ///.
 
typedef struct Aig_Obj_t_ Aig_Obj_t
 
typedef struct Aig_MmFixed_t_ Aig_MmFixed_t
 
typedef struct Aig_MmFlex_t_ Aig_MmFlex_t
 
typedef struct Aig_MmStep_t_ Aig_MmStep_t
 
typedef struct Aig_ManCut_t_ Aig_ManCut_t
 
typedef struct Aig_Cut_t_ Aig_Cut_t
 

Enumerations

enum  Aig_Type_t {
  AIG_OBJ_NONE , AIG_OBJ_CONST1 , AIG_OBJ_CI , AIG_OBJ_CO ,
  AIG_OBJ_BUF , AIG_OBJ_AND , AIG_OBJ_EXOR , AIG_OBJ_VOID
}
 

Functions

ABC_DLL int Aig_ManCheck (Aig_Man_t *p)
 FUNCTION DECLARATIONS ///.
 
void Aig_ManCheckMarkA (Aig_Man_t *p)
 
void Aig_ManCheckPhase (Aig_Man_t *p)
 
Aig_ManCut_tAig_ComputeCuts (Aig_Man_t *pAig, int nCutsMax, int nLeafMax, int fTruth, int fVerbose)
 
void Aig_ManCutStop (Aig_ManCut_t *p)
 
int Aig_ManVerifyTopoOrder (Aig_Man_t *p)
 DECLARATIONS ///.
 
Vec_Ptr_tAig_ManDfs (Aig_Man_t *p, int fNodesOnly)
 
Vec_Ptr_tAig_ManDfsAll (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManDfsPreorder (Aig_Man_t *p, int fNodesOnly)
 
Vec_Vec_tAig_ManLevelize (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManDfsNodes (Aig_Man_t *p, Aig_Obj_t **ppNodes, int nNodes)
 
Vec_Ptr_tAig_ManDfsChoices (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManDfsReverse (Aig_Man_t *p)
 
int Aig_ManLevelNum (Aig_Man_t *p)
 
int Aig_ManChoiceLevel (Aig_Man_t *p)
 
int Aig_DagSize (Aig_Obj_t *pObj)
 
int Aig_SupportSize (Aig_Man_t *p, Aig_Obj_t *pObj)
 
Vec_Ptr_tAig_Support (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_SupportNodes (Aig_Man_t *p, Aig_Obj_t **ppObjs, int nObjs, Vec_Ptr_t *vSupp)
 
void Aig_ConeUnmark_rec (Aig_Obj_t *pObj)
 
Aig_Obj_tAig_Transfer (Aig_Man_t *pSour, Aig_Man_t *pDest, Aig_Obj_t *pObj, int nVars)
 
Aig_Obj_tAig_Compose (Aig_Man_t *p, Aig_Obj_t *pRoot, Aig_Obj_t *pFunc, int iVar)
 
void Aig_ObjCollectCut (Aig_Obj_t *pRoot, Vec_Ptr_t *vLeaves, Vec_Ptr_t *vNodes)
 
int Aig_ObjCollectSuper (Aig_Obj_t *pObj, Vec_Ptr_t *vSuper)
 
Aig_Obj_tAig_ManDupSimpleDfs_rec (Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
 
Aig_Man_tAig_ManDupSimple (Aig_Man_t *p)
 DECLARATIONS ///.
 
Aig_Man_tAig_ManDupSimpleWithHints (Aig_Man_t *p, Vec_Int_t *vHints)
 
Aig_Man_tAig_ManDupSimpleDfs (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupSimpleDfsPart (Aig_Man_t *p, Vec_Ptr_t *vPis, Vec_Ptr_t *vCos)
 
Aig_Man_tAig_ManDupOrdered (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupCof (Aig_Man_t *p, int iInput, int Value)
 
Aig_Man_tAig_ManDupTrim (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupExor (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupDfs (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManOrderPios (Aig_Man_t *p, Aig_Man_t *pOrder)
 
Aig_Man_tAig_ManDupDfsGuided (Aig_Man_t *p, Vec_Ptr_t *vPios)
 
Aig_Man_tAig_ManDupLevelized (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupWithoutPos (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupFlopsOnly (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupRepres (Aig_Man_t *p)
 
Aig_Man_tAig_ManDupRepresDfs (Aig_Man_t *p)
 
Aig_Man_tAig_ManCreateMiter (Aig_Man_t *p1, Aig_Man_t *p2, int fImpl)
 
Aig_Man_tAig_ManDupOrpos (Aig_Man_t *p, int fAddRegs)
 
Aig_Man_tAig_ManDupOneOutput (Aig_Man_t *p, int iPoNum, int fAddRegs)
 
Aig_Man_tAig_ManDupUnsolvedOutputs (Aig_Man_t *p, int fAddRegs)
 
Aig_Man_tAig_ManDupArray (Vec_Ptr_t *vArray)
 
Aig_Man_tAig_ManDupNodes (Aig_Man_t *pMan, Vec_Ptr_t *vArray)
 
void Aig_ObjAddFanout (Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFanout)
 
void Aig_ObjRemoveFanout (Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFanout)
 
void Aig_ManFanoutStart (Aig_Man_t *p)
 FUNCTION DEFINITIONS ///.
 
void Aig_ManFanoutStop (Aig_Man_t *p)
 
Aig_Man_tAig_ManFrames (Aig_Man_t *pAig, int nFs, int fInit, int fOuts, int fRegs, int fEnlarge, Aig_Obj_t ***ppObjMap)
 FUNCTION DEFINITIONS ///.
 
Aig_Man_tAig_ManStart (int nNodesMax)
 DECLARATIONS ///.
 
Aig_Man_tAig_ManStartFrom (Aig_Man_t *p)
 
Aig_Man_tAig_ManExtractMiter (Aig_Man_t *p, Aig_Obj_t *pNode1, Aig_Obj_t *pNode2)
 
void Aig_ManStop (Aig_Man_t *p)
 
void Aig_ManStopP (Aig_Man_t **p)
 
int Aig_ManCleanup (Aig_Man_t *p)
 
int Aig_ManAntiCleanup (Aig_Man_t *p)
 
int Aig_ManCiCleanup (Aig_Man_t *p)
 
int Aig_ManCoCleanup (Aig_Man_t *p)
 
void Aig_ManPrintStats (Aig_Man_t *p)
 
void Aig_ManReportImprovement (Aig_Man_t *p, Aig_Man_t *pNew)
 
void Aig_ManSetRegNum (Aig_Man_t *p, int nRegs)
 
void Aig_ManFlipFirstPo (Aig_Man_t *p)
 
void * Aig_ManReleaseData (Aig_Man_t *p)
 
void Aig_ManStartMemory (Aig_Man_t *p)
 
void Aig_ManStopMemory (Aig_Man_t *p)
 
int Aig_NodeRef_rec (Aig_Obj_t *pNode, unsigned LevelMin)
 
int Aig_NodeDeref_rec (Aig_Obj_t *pNode, unsigned LevelMin, float *pPower, float *pProbs)
 DECLARATIONS ///.
 
int Aig_NodeMffcSupp (Aig_Man_t *p, Aig_Obj_t *pNode, int LevelMin, Vec_Ptr_t *vSupp)
 
int Aig_NodeMffcLabel (Aig_Man_t *p, Aig_Obj_t *pNode, float *pPower)
 
int Aig_NodeMffcLabelCut (Aig_Man_t *p, Aig_Obj_t *pNode, Vec_Ptr_t *vLeaves)
 
int Aig_NodeMffcExtendCut (Aig_Man_t *p, Aig_Obj_t *pNode, Vec_Ptr_t *vLeaves, Vec_Ptr_t *vResult)
 
Aig_Obj_tAig_ObjCreateCi (Aig_Man_t *p)
 DECLARATIONS ///.
 
Aig_Obj_tAig_ObjCreateCo (Aig_Man_t *p, Aig_Obj_t *pDriver)
 
Aig_Obj_tAig_ObjCreate (Aig_Man_t *p, Aig_Obj_t *pGhost)
 
void Aig_ObjConnect (Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFan0, Aig_Obj_t *pFan1)
 
void Aig_ObjDisconnect (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_ObjDelete (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_ObjDelete_rec (Aig_Man_t *p, Aig_Obj_t *pObj, int fFreeTop)
 
void Aig_ObjDeletePo (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_ObjPrint (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_ObjPatchFanin0 (Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFaninNew)
 
void Aig_ObjReplace (Aig_Man_t *p, Aig_Obj_t *pObjOld, Aig_Obj_t *pObjNew, int fUpdateLevel)
 
Aig_Obj_tAig_IthVar (Aig_Man_t *p, int i)
 FUNCTION DEFINITIONS ///.
 
Aig_Obj_tAig_Oper (Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1, Aig_Type_t Type)
 
Aig_Obj_tAig_And (Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
 
Aig_Obj_tAig_Or (Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
 
Aig_Obj_tAig_Exor (Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
 
Aig_Obj_tAig_Mux (Aig_Man_t *p, Aig_Obj_t *pC, Aig_Obj_t *p1, Aig_Obj_t *p0)
 
Aig_Obj_tAig_Maj (Aig_Man_t *p, Aig_Obj_t *pA, Aig_Obj_t *pB, Aig_Obj_t *pC)
 
Aig_Obj_tAig_Multi (Aig_Man_t *p, Aig_Obj_t **pArgs, int nArgs, Aig_Type_t Type)
 
Aig_Obj_tAig_Miter (Aig_Man_t *p, Vec_Ptr_t *vPairs)
 
Aig_Obj_tAig_MiterTwo (Aig_Man_t *p, Vec_Ptr_t *vNodes1, Vec_Ptr_t *vNodes2)
 
Aig_Obj_tAig_CreateAnd (Aig_Man_t *p, int nVars)
 
Aig_Obj_tAig_CreateOr (Aig_Man_t *p, int nVars)
 
Aig_Obj_tAig_CreateExor (Aig_Man_t *p, int nVars)
 
void Aig_ManOrderStart (Aig_Man_t *p)
 DECLARATIONS ///.
 
void Aig_ManOrderStop (Aig_Man_t *p)
 
void Aig_ObjOrderInsert (Aig_Man_t *p, int ObjId)
 
void Aig_ObjOrderRemove (Aig_Man_t *p, int ObjId)
 
void Aig_ObjOrderAdvance (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManSupports (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManSupportsInverse (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManSupportsRegisters (Aig_Man_t *p)
 
Vec_Ptr_tAig_ManPartitionSmart (Aig_Man_t *p, int nPartSizeLimit, int fVerbose, Vec_Ptr_t **pvPartSupps)
 
Vec_Ptr_tAig_ManPartitionSmartRegisters (Aig_Man_t *pAig, int nSuppSizeLimit, int fVerbose)
 
Vec_Ptr_tAig_ManPartitionNaive (Aig_Man_t *p, int nPartSize)
 
Vec_Ptr_tAig_ManMiterPartitioned (Aig_Man_t *p1, Aig_Man_t *p2, int nPartSize, int fSmart)
 
Aig_Man_tAig_ManChoicePartitioned (Vec_Ptr_t *vAigs, int nPartSize, int nConfMax, int nLevelMax, int fVerbose)
 
Aig_Man_tAig_ManFraigPartitioned (Aig_Man_t *pAig, int nPartSize, int nConfMax, int nLevelMax, int fVerbose)
 
Aig_Man_tAig_ManChoiceConstructive (Vec_Ptr_t *vAigs, int fVerbose)
 
Vec_Ptr_tAig_ManRegPartitionSimple (Aig_Man_t *pAig, int nPartSize, int nOverSize)
 
void Aig_ManPartDivide (Vec_Ptr_t *vResult, Vec_Int_t *vDomain, int nPartSize, int nOverSize)
 
Vec_Ptr_tAig_ManRegPartitionSmart (Aig_Man_t *pAig, int nPartSize)
 
Aig_Man_tAig_ManRegCreatePart (Aig_Man_t *pAig, Vec_Int_t *vPart, int *pnCountPis, int *pnCountRegs, int **ppMapBack)
 
Vec_Ptr_tAig_ManRegProjectOnehots (Aig_Man_t *pAig, Aig_Man_t *pPart, Vec_Ptr_t *vOnehots, int fVerbose)
 
void Aig_ManReprStart (Aig_Man_t *p, int nIdMax)
 DECLARATIONS ///.
 
void Aig_ManReprStop (Aig_Man_t *p)
 
void Aig_ObjCreateRepr (Aig_Man_t *p, Aig_Obj_t *pNode1, Aig_Obj_t *pNode2)
 
void Aig_ManTransferRepr (Aig_Man_t *pNew, Aig_Man_t *p)
 
Aig_Man_tAig_ManDupRepr (Aig_Man_t *p, int fOrdered)
 
Aig_Man_tAig_ManDupReprBasic (Aig_Man_t *p)
 
int Aig_ManCountReprs (Aig_Man_t *p)
 
Aig_Man_tAig_ManRehash (Aig_Man_t *p)
 
int Aig_ObjCheckTfi (Aig_Man_t *p, Aig_Obj_t *pNew, Aig_Obj_t *pOld)
 
void Aig_ManMarkValidChoices (Aig_Man_t *p)
 
int Aig_TransferMappedClasses (Aig_Man_t *pAig, Aig_Man_t *pPart, int *pMapBack)
 
Aig_Man_tRtm_ManRetime (Aig_Man_t *p, int fForward, int nStepsMax, int fVerbose)
 
Aig_Man_tAig_ManRetimeFrontier (Aig_Man_t *p, int nStepsMax)
 
Aig_Man_tAig_ManRemap (Aig_Man_t *p, Vec_Ptr_t *vMap)
 DECLARATIONS ///.
 
int Aig_ManSeqCleanup (Aig_Man_t *p)
 
int Aig_ManSeqCleanupBasic (Aig_Man_t *p)
 
int Aig_ManCountMergeRegs (Aig_Man_t *p)
 
Aig_Man_tAig_ManReduceLaches (Aig_Man_t *p, int fVerbose)
 
void Aig_ManComputeSccs (Aig_Man_t *p)
 
Aig_Man_tAig_ManScl (Aig_Man_t *pAig, int fLatchConst, int fLatchEqual, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)
 
void Aig_ManShow (Aig_Man_t *pMan, int fHaig, Vec_Ptr_t *vBold)
 
Aig_Obj_tAig_TableLookup (Aig_Man_t *p, Aig_Obj_t *pGhost)
 
Aig_Obj_tAig_TableLookupTwo (Aig_Man_t *p, Aig_Obj_t *pFanin0, Aig_Obj_t *pFanin1)
 
void Aig_TableInsert (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_TableDelete (Aig_Man_t *p, Aig_Obj_t *pObj)
 
int Aig_TableCountEntries (Aig_Man_t *p)
 
void Aig_TableProfile (Aig_Man_t *p)
 
void Aig_TableClear (Aig_Man_t *p)
 
void Aig_ObjClearReverseLevel (Aig_Man_t *p, Aig_Obj_t *pObj)
 
int Aig_ObjRequiredLevel (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Aig_ManStartReverseLevels (Aig_Man_t *p, int nMaxLevelIncrease)
 
void Aig_ManStopReverseLevels (Aig_Man_t *p)
 
void Aig_ManUpdateLevel (Aig_Man_t *p, Aig_Obj_t *pObjNew)
 
void Aig_ManUpdateReverseLevel (Aig_Man_t *p, Aig_Obj_t *pObjNew)
 
void Aig_ManVerifyLevel (Aig_Man_t *p)
 
void Aig_ManVerifyReverseLevel (Aig_Man_t *p)
 
unsigned * Aig_ManCutTruth (Aig_Obj_t *pRoot, Vec_Ptr_t *vLeaves, Vec_Ptr_t *vNodes, Vec_Ptr_t *vTruthElem, Vec_Ptr_t *vTruthStore)
 
Aig_Man_tAig_ManConstReduce (Aig_Man_t *p, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)
 
void Aig_ManIncrementTravId (Aig_Man_t *p)
 DECLARATIONS ///.
 
char * Aig_TimeStamp ()
 
int Aig_ManHasNoGaps (Aig_Man_t *p)
 
int Aig_ManLevels (Aig_Man_t *p)
 
void Aig_ManResetRefs (Aig_Man_t *p)
 
void Aig_ManCleanMarkA (Aig_Man_t *p)
 
void Aig_ManCleanMarkB (Aig_Man_t *p)
 
void Aig_ManCleanMarkAB (Aig_Man_t *p)
 
void Aig_ManCleanData (Aig_Man_t *p)
 
void Aig_ObjCleanData_rec (Aig_Obj_t *pObj)
 
void Aig_ManCleanNext (Aig_Man_t *p)
 
void Aig_ObjCollectMulti (Aig_Obj_t *pFunc, Vec_Ptr_t *vSuper)
 
int Aig_ObjIsMuxType (Aig_Obj_t *pObj)
 
int Aig_ObjRecognizeExor (Aig_Obj_t *pObj, Aig_Obj_t **ppFan0, Aig_Obj_t **ppFan1)
 
Aig_Obj_tAig_ObjRecognizeMux (Aig_Obj_t *pObj, Aig_Obj_t **ppObjT, Aig_Obj_t **ppObjE)
 
Aig_Obj_tAig_ObjReal_rec (Aig_Obj_t *pObj)
 
int Aig_ObjCompareIdIncrease (Aig_Obj_t **pp1, Aig_Obj_t **pp2)
 
void Aig_ObjPrintEqn (FILE *pFile, Aig_Obj_t *pObj, Vec_Vec_t *vLevels, int Level)
 
void Aig_ObjPrintVerilog (FILE *pFile, Aig_Obj_t *pObj, Vec_Vec_t *vLevels, int Level)
 
void Aig_ObjPrintVerbose (Aig_Obj_t *pObj, int fHaig)
 
void Aig_ManPrintVerbose (Aig_Man_t *p, int fHaig)
 
void Aig_ManDump (Aig_Man_t *p)
 
void Aig_ManDumpBlif (Aig_Man_t *p, char *pFileName, Vec_Ptr_t *vPiNames, Vec_Ptr_t *vPoNames)
 
void Aig_ManDumpVerilog (Aig_Man_t *p, char *pFileName)
 
void Aig_ManSetCioIds (Aig_Man_t *p)
 
void Aig_ManCleanCioIds (Aig_Man_t *p)
 
int Aig_ManChoiceNum (Aig_Man_t *p)
 
char * Aig_FileNameGenericAppend (char *pBase, char *pSuffix)
 
unsigned Aig_ManRandom (int fReset)
 
word Aig_ManRandom64 (int fReset)
 
void Aig_ManRandomInfo (Vec_Ptr_t *vInfo, int iInputStart, int iWordStart, int iWordStop)
 
void Aig_NodeUnionLists (Vec_Ptr_t *vArr1, Vec_Ptr_t *vArr2, Vec_Ptr_t *vArr)
 
void Aig_NodeIntersectLists (Vec_Ptr_t *vArr1, Vec_Ptr_t *vArr2, Vec_Ptr_t *vArr)
 
void Aig_ManSetPhase (Aig_Man_t *pAig)
 
Vec_Ptr_tAig_ManMuxesCollect (Aig_Man_t *pAig)
 
void Aig_ManMuxesDeref (Aig_Man_t *pAig, Vec_Ptr_t *vMuxes)
 
void Aig_ManMuxesRef (Aig_Man_t *pAig, Vec_Ptr_t *vMuxes)
 
void Aig_ManInvertConstraints (Aig_Man_t *pAig)
 
void Aig_ManFindCut (Aig_Obj_t *pRoot, Vec_Ptr_t *vFront, Vec_Ptr_t *vVisited, int nSizeLimit, int nFanoutLimit)
 
Aig_MmFixed_tAig_MmFixedStart (int nEntrySize, int nEntriesMax)
 FUNCTION DEFINITIONS ///.
 
void Aig_MmFixedStop (Aig_MmFixed_t *p, int fVerbose)
 
char * Aig_MmFixedEntryFetch (Aig_MmFixed_t *p)
 
void Aig_MmFixedEntryRecycle (Aig_MmFixed_t *p, char *pEntry)
 
void Aig_MmFixedRestart (Aig_MmFixed_t *p)
 
int Aig_MmFixedReadMemUsage (Aig_MmFixed_t *p)
 
int Aig_MmFixedReadMaxEntriesUsed (Aig_MmFixed_t *p)
 
Aig_MmFlex_tAig_MmFlexStart ()
 
void Aig_MmFlexStop (Aig_MmFlex_t *p, int fVerbose)
 
char * Aig_MmFlexEntryFetch (Aig_MmFlex_t *p, int nBytes)
 
void Aig_MmFlexRestart (Aig_MmFlex_t *p)
 
int Aig_MmFlexReadMemUsage (Aig_MmFlex_t *p)
 
Aig_MmStep_tAig_MmStepStart (int nSteps)
 
void Aig_MmStepStop (Aig_MmStep_t *p, int fVerbose)
 
char * Aig_MmStepEntryFetch (Aig_MmStep_t *p, int nBytes)
 
void Aig_MmStepEntryRecycle (Aig_MmStep_t *p, char *pEntry, int nBytes)
 
int Aig_MmStepReadMemUsage (Aig_MmStep_t *p)
 

Macro Definition Documentation

◆ Aig_CutForEachLeaf

#define Aig_CutForEachLeaf ( p,
pCut,
pLeaf,
i )
Value:
for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )
Cube * p
Definition exorList.c:222

Definition at line 221 of file aig.h.

221#define Aig_CutForEachLeaf( p, pCut, pLeaf, i ) \
222 for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )

◆ Aig_ManForEachCi

#define Aig_ManForEachCi ( p,
pObj,
i )
Value:
Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
struct Aig_Obj_t_ Aig_Obj_t
Definition aig.h:51
#define Vec_PtrForEachEntry(Type, vVec, pEntry, i)
MACRO DEFINITIONS ///.
Definition vecPtr.h:55

ITERATORS ///.

Definition at line 393 of file aig.h.

393#define Aig_ManForEachCi( p, pObj, i ) \
394 Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )

◆ Aig_ManForEachCiReverse

#define Aig_ManForEachCiReverse ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCis, pObj, i )
#define Vec_PtrForEachEntryReverse(Type, vVec, pEntry, i)
Definition vecPtr.h:63

Definition at line 395 of file aig.h.

395#define Aig_ManForEachCiReverse( p, pObj, i ) \
396 Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCis, pObj, i )

◆ Aig_ManForEachCo

#define Aig_ManForEachCo ( p,
pObj,
i )
Value:
Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )

Definition at line 398 of file aig.h.

398#define Aig_ManForEachCo( p, pObj, i ) \
399 Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )

◆ Aig_ManForEachCoReverse

#define Aig_ManForEachCoReverse ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCos, pObj, i )

Definition at line 400 of file aig.h.

400#define Aig_ManForEachCoReverse( p, pObj, i ) \
401 Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vCos, pObj, i )

◆ Aig_ManForEachExor

#define Aig_ManForEachExor ( p,
pObj,
i )
Value:
Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsExor(pObj) ) {} else

Definition at line 418 of file aig.h.

418#define Aig_ManForEachExor( p, pObj, i ) \
419 Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsExor(pObj) ) {} else

◆ Aig_ManForEachExorReverse

#define Aig_ManForEachExorReverse ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsExor(pObj) ) {} else

Definition at line 420 of file aig.h.

420#define Aig_ManForEachExorReverse( p, pObj, i ) \
421 Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsExor(pObj) ) {} else

◆ Aig_ManForEachLiLoSeq

#define Aig_ManForEachLiLoSeq ( p,
pObjLi,
pObjLo,
k )
Value:
for ( k = 0; (k < Aig_ManRegNum(p)) && (((pObjLi) = Aig_ManLi(p, k)), 1) \
&& (((pObjLo)=Aig_ManLo(p, k)), 1); k++ )

Definition at line 450 of file aig.h.

450#define Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, k ) \
451 for ( k = 0; (k < Aig_ManRegNum(p)) && (((pObjLi) = Aig_ManLi(p, k)), 1) \
452 && (((pObjLo)=Aig_ManLo(p, k)), 1); k++ )

◆ Aig_ManForEachLiSeq

#define Aig_ManForEachLiSeq ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )
#define Vec_PtrForEachEntryStart(Type, vVec, pEntry, i, Start)
Definition vecPtr.h:57

Definition at line 447 of file aig.h.

447#define Aig_ManForEachLiSeq( p, pObj, i ) \
448 Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

◆ Aig_ManForEachLoSeq

#define Aig_ManForEachLoSeq ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

Definition at line 441 of file aig.h.

441#define Aig_ManForEachLoSeq( p, pObj, i ) \
442 Vec_PtrForEachEntryStart( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

◆ Aig_ManForEachNode

#define Aig_ManForEachNode ( p,
pObj,
i )
Value:
Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsNode(pObj) ) {} else

Definition at line 413 of file aig.h.

413#define Aig_ManForEachNode( p, pObj, i ) \
414 Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsNode(pObj) ) {} else

◆ Aig_ManForEachNodeReverse

#define Aig_ManForEachNodeReverse ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsNode(pObj) ) {} else

Definition at line 415 of file aig.h.

415#define Aig_ManForEachNodeReverse( p, pObj, i ) \
416 Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL || !Aig_ObjIsNode(pObj) ) {} else

◆ Aig_ManForEachObj

#define Aig_ManForEachObj ( p,
pObj,
i )
Value:
Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

Definition at line 403 of file aig.h.

403#define Aig_ManForEachObj( p, pObj, i ) \
404 Vec_PtrForEachEntry( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

◆ Aig_ManForEachObjReverse

#define Aig_ManForEachObjReverse ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

Definition at line 405 of file aig.h.

405#define Aig_ManForEachObjReverse( p, pObj, i ) \
406 Vec_PtrForEachEntryReverse( Aig_Obj_t *, p->vObjs, pObj, i ) if ( (pObj) == NULL ) {} else

◆ Aig_ManForEachObjVec

#define Aig_ManForEachObjVec ( vIds,
p,
pObj,
i )
Value:
for ( i = 0; i < Vec_IntSize(vIds) && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i++ )

Definition at line 408 of file aig.h.

408#define Aig_ManForEachObjVec( vIds, p, pObj, i ) \
409 for ( i = 0; i < Vec_IntSize(vIds) && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i++ )

◆ Aig_ManForEachObjVecReverse

#define Aig_ManForEachObjVecReverse ( vIds,
p,
pObj,
i )
Value:
for ( i = Vec_IntSize(vIds) - 1; i >= 0 && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i-- )

Definition at line 410 of file aig.h.

410#define Aig_ManForEachObjVecReverse( vIds, p, pObj, i ) \
411 for ( i = Vec_IntSize(vIds) - 1; i >= 0 && (((pObj) = Aig_ManObj(p, Vec_IntEntry(vIds,i))), 1); i-- )

◆ Aig_ManForEachPiSeq

#define Aig_ManForEachPiSeq ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )
#define Vec_PtrForEachEntryStop(Type, vVec, pEntry, i, Stop)
Definition vecPtr.h:59

SEQUENTIAL ITERATORS ///.

Definition at line 438 of file aig.h.

438#define Aig_ManForEachPiSeq( p, pObj, i ) \
439 Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCis, pObj, i, Aig_ManCiNum(p)-Aig_ManRegNum(p) )

◆ Aig_ManForEachPoSeq

#define Aig_ManForEachPoSeq ( p,
pObj,
i )
Value:
Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

Definition at line 444 of file aig.h.

444#define Aig_ManForEachPoSeq( p, pObj, i ) \
445 Vec_PtrForEachEntryStop( Aig_Obj_t *, p->vCos, pObj, i, Aig_ManCoNum(p)-Aig_ManRegNum(p) )

◆ Aig_ObjForEachCut

#define Aig_ObjForEachCut ( p,
pObj,
pCut,
i )
Value:
for ( i = 0, pCut = Aig_ObjCuts(p, pObj); i < p->nCutsMax; i++, pCut = Aig_CutNext(pCut) )

Definition at line 218 of file aig.h.

218#define Aig_ObjForEachCut( p, pObj, pCut, i ) \
219 for ( i = 0, pCut = Aig_ObjCuts(p, pObj); i < p->nCutsMax; i++, pCut = Aig_CutNext(pCut) )

◆ Aig_ObjForEachFanout

#define Aig_ObjForEachFanout ( p,
pObj,
pFanout,
iFan,
i )
Value:
for ( assert(p->pFanData), i = 0; (i < (int)(pObj)->nRefs) && \
(((iFan) = i? Aig_ObjFanoutNext(p, iFan) : Aig_ObjFanout0Int(p, pObj->Id)), 1) && \
(((pFanout) = Aig_ManObj(p, iFan>>1)), 1); i++ )
#define assert(ex)
Definition util_old.h:213

Definition at line 427 of file aig.h.

427#define Aig_ObjForEachFanout( p, pObj, pFanout, iFan, i ) \
428 for ( assert(p->pFanData), i = 0; (i < (int)(pObj)->nRefs) && \
429 (((iFan) = i? Aig_ObjFanoutNext(p, iFan) : Aig_ObjFanout0Int(p, pObj->Id)), 1) && \
430 (((pFanout) = Aig_ManObj(p, iFan>>1)), 1); i++ )

Typedef Documentation

◆ Aig_Cut_t

typedef struct Aig_Cut_t_ Aig_Cut_t

Definition at line 176 of file aig.h.

◆ Aig_Man_t

typedef typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t

INCLUDES ///.

CFile****************************************************************

FileName [aig.h]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [External declarations.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aig.h,v 1.00 2007/04/28 00:00:00 alanmi Exp

] PARAMETERS /// BASIC TYPES ///

Definition at line 50 of file aig.h.

◆ Aig_ManCut_t

typedef struct Aig_ManCut_t_ Aig_ManCut_t

Definition at line 175 of file aig.h.

◆ Aig_MmFixed_t

typedef struct Aig_MmFixed_t_ Aig_MmFixed_t

Definition at line 52 of file aig.h.

◆ Aig_MmFlex_t

typedef struct Aig_MmFlex_t_ Aig_MmFlex_t

Definition at line 53 of file aig.h.

◆ Aig_MmStep_t

typedef struct Aig_MmStep_t_ Aig_MmStep_t

Definition at line 54 of file aig.h.

◆ Aig_Obj_t

typedef struct Aig_Obj_t_ Aig_Obj_t

Definition at line 51 of file aig.h.

Enumeration Type Documentation

◆ Aig_Type_t

enum Aig_Type_t
Enumerator
AIG_OBJ_NONE 
AIG_OBJ_CONST1 
AIG_OBJ_CI 
AIG_OBJ_CO 
AIG_OBJ_BUF 
AIG_OBJ_AND 
AIG_OBJ_EXOR 
AIG_OBJ_VOID 

Definition at line 57 of file aig.h.

57 {
58 AIG_OBJ_NONE, // 0: non-existent object
59 AIG_OBJ_CONST1, // 1: constant 1
60 AIG_OBJ_CI, // 2: combinational input
61 AIG_OBJ_CO, // 3: combinational output
62 AIG_OBJ_BUF, // 4: buffer node
63 AIG_OBJ_AND, // 5: AND node
64 AIG_OBJ_EXOR, // 6: EXOR node
65 AIG_OBJ_VOID // 7: unused object
Aig_Type_t
Definition aig.h:57
@ AIG_OBJ_CO
Definition aig.h:61
@ AIG_OBJ_AND
Definition aig.h:63
@ AIG_OBJ_VOID
Definition aig.h:65
@ AIG_OBJ_EXOR
Definition aig.h:64
@ AIG_OBJ_NONE
Definition aig.h:58
@ AIG_OBJ_CI
Definition aig.h:60
@ AIG_OBJ_BUF
Definition aig.h:62
@ AIG_OBJ_CONST1
Definition aig.h:59

Function Documentation

◆ Aig_And()

Aig_Obj_t * Aig_And ( Aig_Man_t * p,
Aig_Obj_t * p0,
Aig_Obj_t * p1 )
extern

Function*************************************************************

Synopsis [Performs canonicization step.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 104 of file aigOper.c.

105{
106 Aig_Obj_t * pGhost, * pResult;
107 Aig_Obj_t * pFan0, * pFan1;
108 // check trivial cases
109 if ( p0 == p1 )
110 return p0;
111 if ( p0 == Aig_Not(p1) )
112 return Aig_Not(p->pConst1);
113 if ( Aig_Regular(p0) == p->pConst1 )
114 return p0 == p->pConst1 ? p1 : Aig_Not(p->pConst1);
115 if ( Aig_Regular(p1) == p->pConst1 )
116 return p1 == p->pConst1 ? p0 : Aig_Not(p->pConst1);
117 // check not so trivial cases
118 if ( p->fAddStrash && (Aig_ObjIsNode(Aig_Regular(p0)) || Aig_ObjIsNode(Aig_Regular(p1))) )
119 { // http://fmv.jku.at/papers/BrummayerBiere-MEMICS06.pdf
120 Aig_Obj_t * pFanA, * pFanB, * pFanC, * pFanD;
121 pFanA = Aig_ObjChild0(Aig_Regular(p0));
122 pFanB = Aig_ObjChild1(Aig_Regular(p0));
123 pFanC = Aig_ObjChild0(Aig_Regular(p1));
124 pFanD = Aig_ObjChild1(Aig_Regular(p1));
125 if ( Aig_IsComplement(p0) )
126 {
127 if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) )
128 return p1;
129 if ( pFanB == p1 )
130 return Aig_And( p, Aig_Not(pFanA), pFanB );
131 if ( pFanA == p1 )
132 return Aig_And( p, Aig_Not(pFanB), pFanA );
133 }
134 else
135 {
136 if ( pFanA == Aig_Not(p1) || pFanB == Aig_Not(p1) )
137 return Aig_Not(p->pConst1);
138 if ( pFanA == p1 || pFanB == p1 )
139 return p0;
140 }
141 if ( Aig_IsComplement(p1) )
142 {
143 if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) )
144 return p0;
145 if ( pFanD == p0 )
146 return Aig_And( p, Aig_Not(pFanC), pFanD );
147 if ( pFanC == p0 )
148 return Aig_And( p, Aig_Not(pFanD), pFanC );
149 }
150 else
151 {
152 if ( pFanC == Aig_Not(p0) || pFanD == Aig_Not(p0) )
153 return Aig_Not(p->pConst1);
154 if ( pFanC == p0 || pFanD == p0 )
155 return p1;
156 }
157 if ( !Aig_IsComplement(p0) && !Aig_IsComplement(p1) )
158 {
159 if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) )
160 return Aig_Not(p->pConst1);
161 if ( pFanA == pFanC || pFanB == pFanC )
162 return Aig_And( p, p0, pFanD );
163 if ( pFanB == pFanC || pFanB == pFanD )
164 return Aig_And( p, pFanA, p1 );
165 if ( pFanA == pFanD || pFanB == pFanD )
166 return Aig_And( p, p0, pFanC );
167 if ( pFanA == pFanC || pFanA == pFanD )
168 return Aig_And( p, pFanB, p1 );
169 }
170 else if ( Aig_IsComplement(p0) && !Aig_IsComplement(p1) )
171 {
172 if ( pFanA == Aig_Not(pFanC) || pFanA == Aig_Not(pFanD) || pFanB == Aig_Not(pFanC) || pFanB == Aig_Not(pFanD) )
173 return p1;
174 if ( pFanB == pFanC || pFanB == pFanD )
175 return Aig_And( p, Aig_Not(pFanA), p1 );
176 if ( pFanA == pFanC || pFanA == pFanD )
177 return Aig_And( p, Aig_Not(pFanB), p1 );
178 }
179 else if ( !Aig_IsComplement(p0) && Aig_IsComplement(p1) )
180 {
181 if ( pFanC == Aig_Not(pFanA) || pFanC == Aig_Not(pFanB) || pFanD == Aig_Not(pFanA) || pFanD == Aig_Not(pFanB) )
182 return p0;
183 if ( pFanD == pFanA || pFanD == pFanB )
184 return Aig_And( p, Aig_Not(pFanC), p0 );
185 if ( pFanC == pFanA || pFanC == pFanB )
186 return Aig_And( p, Aig_Not(pFanD), p0 );
187 }
188 else // if ( Aig_IsComplement(p0) && Aig_IsComplement(p1) )
189 {
190 if ( pFanA == pFanD && pFanB == Aig_Not(pFanC) )
191 return Aig_Not(pFanA);
192 if ( pFanB == pFanC && pFanA == Aig_Not(pFanD) )
193 return Aig_Not(pFanB);
194 if ( pFanA == pFanC && pFanB == Aig_Not(pFanD) )
195 return Aig_Not(pFanA);
196 if ( pFanB == pFanD && pFanA == Aig_Not(pFanC) )
197 return Aig_Not(pFanB);
198 }
199 }
200 // check if it can be an EXOR gate
201 if ( p->fCatchExor && Aig_ObjIsExorType( p0, p1, &pFan0, &pFan1 ) )
202 return Aig_Exor( p, pFan0, pFan1 );
203 pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_AND );
204 if ( (pResult = Aig_TableLookup( p, pGhost )) )
205 return pResult;
206 return Aig_ObjCreate( p, pGhost );
207}
Aig_Obj_t * Aig_And(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:104
Aig_Obj_t * Aig_Exor(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:220
Aig_Obj_t * Aig_ObjCreate(Aig_Man_t *p, Aig_Obj_t *pGhost)
Definition aigObj.c:89
Aig_Obj_t * Aig_TableLookup(Aig_Man_t *p, Aig_Obj_t *pGhost)
Definition aigTable.c:116
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◆ Aig_Compose()

Aig_Obj_t * Aig_Compose ( Aig_Man_t * p,
Aig_Obj_t * pRoot,
Aig_Obj_t * pFunc,
int iVar )
extern

Function*************************************************************

Synopsis [Composes the AIG (pRoot) with the function (pFunc) using PI var (iVar).]

Description []

SideEffects []

SeeAlso []

Definition at line 980 of file aigDfs.c.

981{
982 // quit if the PI variable is not defined
983 if ( iVar >= Aig_ManCiNum(p) )
984 {
985 printf( "Aig_Compose(): The PI variable %d is not defined.\n", iVar );
986 return NULL;
987 }
988 // recursively perform composition
989 Aig_Compose_rec( p, Aig_Regular(pRoot), pFunc, Aig_ManCi(p, iVar) );
990 // clear the markings
991 Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
992 return Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
993}
void Aig_ConeUnmark_rec(Aig_Obj_t *pObj)
Definition aigDfs.c:704
void Aig_Compose_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFunc, Aig_Obj_t *pVar)
Definition aigDfs.c:952
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◆ Aig_ComputeCuts()

Aig_ManCut_t * Aig_ComputeCuts ( Aig_Man_t * pAig,
int nCutsMax,
int nLeafMax,
int fTruth,
int fVerbose )
extern

Function*************************************************************

Synopsis [Computes the cuts for all nodes in the static AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 631 of file aigCuts.c.

632{
633 Aig_ManCut_t * p;
634 Aig_Obj_t * pObj;
635 int i;
636 abctime clk = Abc_Clock();
637 assert( pAig->pManCuts == NULL );
638 // start the manager
639 p = Aig_ManCutStart( pAig, nCutsMax, nLeafMax, fTruth, fVerbose );
640 // set elementary cuts at the PIs
641 Aig_ManForEachCi( pAig, pObj, i )
642 Aig_ObjPrepareCuts( p, pObj, 1 );
643 // process the nodes
644 Aig_ManForEachNode( pAig, pObj, i )
645 Aig_ObjComputeCuts( p, pObj, 1 );
646 // print stats
647 if ( fVerbose )
648 {
649 int nCuts, nCutsK;
650 nCuts = Aig_ManCutCount( p, &nCutsK );
651 printf( "Nodes = %6d. Total cuts = %6d. %d-input cuts = %6d.\n",
652 Aig_ManObjNum(pAig), nCuts, nLeafMax, nCutsK );
653 printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f MB ",
654 p->nCutSize, 4*p->nTruthWords, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
655 ABC_PRT( "Runtime", Abc_Clock() - clk );
656/*
657 Aig_ManForEachNode( pAig, pObj, i )
658 if ( i % 300 == 0 )
659 Aig_ObjCutPrint( p, pObj );
660*/
661 }
662 // remember the cut manager
663 pAig->pManCuts = p;
664 return p;
665}
ABC_INT64_T abctime
Definition abc_global.h:332
#define ABC_PRT(a, t)
Definition abc_global.h:255
void Aig_ObjComputeCuts(Aig_ManCut_t *p, Aig_Obj_t *pObj, int fTriv)
Definition aigCuts.c:576
int Aig_ManCutCount(Aig_ManCut_t *p, int *pnCutsK)
Definition aigCuts.c:147
ABC_NAMESPACE_IMPL_START Aig_ManCut_t * Aig_ManCutStart(Aig_Man_t *pMan, int nCutsMax, int nLeafMax, int fTruth, int fVerbose)
DECLARATIONS ///.
Definition aigCuts.c:46
Aig_Cut_t * Aig_ObjPrepareCuts(Aig_ManCut_t *p, Aig_Obj_t *pObj, int fTriv)
Definition aigCuts.c:536
int Aig_MmFixedReadMemUsage(Aig_MmFixed_t *p)
Definition aigMem.c:271
#define Aig_ManForEachCi(p, pObj, i)
ITERATORS ///.
Definition aig.h:393
#define Aig_ManForEachNode(p, pObj, i)
Definition aig.h:413
struct Aig_ManCut_t_ Aig_ManCut_t
Definition aig.h:175
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◆ Aig_ConeUnmark_rec()

void Aig_ConeUnmark_rec ( Aig_Obj_t * pObj)
extern

Function*************************************************************

Synopsis [Counts the number of AIG nodes rooted at this cone.]

Description []

SideEffects []

SeeAlso []

Definition at line 704 of file aigDfs.c.

705{
706 assert( !Aig_IsComplement(pObj) );
707 if ( !Aig_ObjIsNode(pObj) || !Aig_ObjIsMarkA(pObj) )
708 return;
709 Aig_ConeUnmark_rec( Aig_ObjFanin0(pObj) );
710 Aig_ConeUnmark_rec( Aig_ObjFanin1(pObj) );
711 assert( Aig_ObjIsMarkA(pObj) ); // loop detection
712 Aig_ObjClearMarkA( pObj );
713}
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◆ Aig_CreateAnd()

Aig_Obj_t * Aig_CreateAnd ( Aig_Man_t * p,
int nVars )
extern

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 474 of file aigOper.c.

475{
476 Aig_Obj_t * pFunc;
477 int i;
478 pFunc = Aig_ManConst1( p );
479 for ( i = 0; i < nVars; i++ )
480 pFunc = Aig_And( p, pFunc, Aig_IthVar(p, i) );
481 return pFunc;
482}
Aig_Obj_t * Aig_IthVar(Aig_Man_t *p, int i)
FUNCTION DEFINITIONS ///.
Definition aigOper.c:63
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◆ Aig_CreateExor()

Aig_Obj_t * Aig_CreateExor ( Aig_Man_t * p,
int nVars )
extern

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 516 of file aigOper.c.

517{
518 Aig_Obj_t * pFunc;
519 int i;
520 pFunc = Aig_ManConst0( p );
521 for ( i = 0; i < nVars; i++ )
522 pFunc = Aig_Exor( p, pFunc, Aig_IthVar(p, i) );
523 return pFunc;
524}
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◆ Aig_CreateOr()

Aig_Obj_t * Aig_CreateOr ( Aig_Man_t * p,
int nVars )
extern

Function*************************************************************

Synopsis [Creates AND function with nVars inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 495 of file aigOper.c.

496{
497 Aig_Obj_t * pFunc;
498 int i;
499 pFunc = Aig_ManConst0( p );
500 for ( i = 0; i < nVars; i++ )
501 pFunc = Aig_Or( p, pFunc, Aig_IthVar(p, i) );
502 return pFunc;
503}
Aig_Obj_t * Aig_Or(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:259
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◆ Aig_DagSize()

int Aig_DagSize ( Aig_Obj_t * pObj)
extern

Function*************************************************************

Synopsis [Counts the number of AIG nodes rooted at this cone.]

Description []

SideEffects []

SeeAlso []

Definition at line 726 of file aigDfs.c.

727{
728 int Counter;
729 Counter = Aig_ConeCountAndMark_rec( Aig_Regular(pObj) );
730 Aig_ConeUnmark_rec( Aig_Regular(pObj) );
731 return Counter;
732}
int Aig_ConeCountAndMark_rec(Aig_Obj_t *pObj)
Definition aigDfs.c:680
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◆ Aig_Exor()

Aig_Obj_t * Aig_Exor ( Aig_Man_t * p,
Aig_Obj_t * p0,
Aig_Obj_t * p1 )
extern

Function*************************************************************

Synopsis [Performs canonicization step.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 220 of file aigOper.c.

221{
222 Aig_Obj_t * pGhost, * pResult;
223 int fCompl;
224 // check trivial cases
225 if ( p0 == p1 )
226 return Aig_Not(p->pConst1);
227 if ( p0 == Aig_Not(p1) )
228 return p->pConst1;
229 if ( Aig_Regular(p0) == p->pConst1 )
230 return Aig_NotCond( p1, p0 == p->pConst1 );
231 if ( Aig_Regular(p1) == p->pConst1 )
232 return Aig_NotCond( p0, p1 == p->pConst1 );
233 // when there is no special XOR gates
234 if ( !p->fCatchExor )
235 return Aig_Or( p, Aig_And(p, p0, Aig_Not(p1)), Aig_And(p, Aig_Not(p0), p1) );
236 // canonicize
237 fCompl = Aig_IsComplement(p0) ^ Aig_IsComplement(p1);
238 p0 = Aig_Regular(p0);
239 p1 = Aig_Regular(p1);
240 pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_EXOR );
241 // check the table
242 if ( (pResult = Aig_TableLookup( p, pGhost )) )
243 return Aig_NotCond( pResult, fCompl );
244 pResult = Aig_ObjCreate( p, pGhost );
245 return Aig_NotCond( pResult, fCompl );
246}
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◆ Aig_FileNameGenericAppend()

char * Aig_FileNameGenericAppend ( char * pBase,
char * pSuffix )
extern

Function*************************************************************

Synopsis [Returns the composite name of the file.]

Description []

SideEffects []

SeeAlso []

Definition at line 1083 of file aigUtil.c.

1084{
1085 static char Buffer[1000];
1086 char * pDot;
1087 strcpy( Buffer, pBase );
1088 if ( (pDot = strrchr( Buffer, '.' )) )
1089 *pDot = 0;
1090 strcat( Buffer, pSuffix );
1091 if ( (pDot = strrchr( Buffer, '\\' )) || (pDot = strrchr( Buffer, '/' )) )
1092 return pDot+1;
1093 return Buffer;
1094}
char * strrchr()
char * strcpy()
char * strcat()
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◆ Aig_IthVar()

Aig_Obj_t * Aig_IthVar ( Aig_Man_t * p,
int i )
extern

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Returns i-th elementary variable.]

Description []

SideEffects []

SeeAlso []

Definition at line 63 of file aigOper.c.

64{
65 int v;
66 for ( v = Aig_ManCiNum(p); v <= i; v++ )
68 assert( i < Vec_PtrSize(p->vCis) );
69 return Aig_ManCi( p, i );
70}
Aig_Obj_t * Aig_ObjCreateCi(Aig_Man_t *p)
DECLARATIONS ///.
Definition aigObj.c:45
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◆ Aig_Maj()

Aig_Obj_t * Aig_Maj ( Aig_Man_t * p,
Aig_Obj_t * pA,
Aig_Obj_t * pB,
Aig_Obj_t * pC )
extern

Function*************************************************************

Synopsis [Implements ITE operation.]

Description []

SideEffects []

SeeAlso []

Definition at line 376 of file aigOper.c.

377{
378 return Aig_Or( p, Aig_Or(p, Aig_And(p, pA, pB), Aig_And(p, pA, pC)), Aig_And(p, pB, pC) );
379}
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◆ Aig_ManAntiCleanup()

int Aig_ManAntiCleanup ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Adds POs for the nodes that otherwise would be dangling.]

Description [Returns the number of POs added.]

SideEffects []

SeeAlso []

Definition at line 293 of file aigMan.c.

294{
295 Aig_Obj_t * pNode;
296 int i, nNodesOld = Aig_ManCoNum(p);
297 Aig_ManForEachObj( p, pNode, i )
298 if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 )
299 Aig_ObjCreateCo( p, pNode );
300 return nNodesOld - Aig_ManCoNum(p);
301}
#define Aig_ManForEachObj(p, pObj, i)
Definition aig.h:403
Aig_Obj_t * Aig_ObjCreateCo(Aig_Man_t *p, Aig_Obj_t *pDriver)
Definition aigObj.c:66
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◆ Aig_ManCheck()

ABC_DLL int Aig_ManCheck ( Aig_Man_t * p)
extern

FUNCTION DECLARATIONS ///.

FUNCTION DECLARATIONS ///.

CFile****************************************************************

FileName [aigCheck.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG checking procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigCheck.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Checks the consistency of the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigCheck.c.

46{
47 Aig_Obj_t * pObj, * pObj2;
48 int i;
49 // check primary inputs
50 Aig_ManForEachCi( p, pObj, i )
51 {
52 if ( Aig_ObjFanin0(pObj) || Aig_ObjFanin1(pObj) )
53 {
54 printf( "Aig_ManCheck: The PI node \"%p\" has fanins.\n", pObj );
55 return 0;
56 }
57 }
58 // check primary outputs
59 Aig_ManForEachCo( p, pObj, i )
60 {
61 if ( !Aig_ObjFanin0(pObj) )
62 {
63 printf( "Aig_ManCheck: The PO node \"%p\" has NULL fanin.\n", pObj );
64 return 0;
65 }
66 if ( Aig_ObjFanin1(pObj) )
67 {
68 printf( "Aig_ManCheck: The PO node \"%p\" has second fanin.\n", pObj );
69 return 0;
70 }
71 }
72 // check internal nodes
73 Aig_ManForEachObj( p, pObj, i )
74 {
75 if ( !Aig_ObjIsNode(pObj) )
76 continue;
77 if ( !Aig_ObjFanin0(pObj) || !Aig_ObjFanin1(pObj) )
78 {
79 printf( "Aig_ManCheck: The AIG has internal node \"%p\" with a NULL fanin.\n", pObj );
80 return 0;
81 }
82 if ( Aig_ObjFanin0(pObj)->Id >= Aig_ObjFanin1(pObj)->Id )
83 {
84 printf( "Aig_ManCheck: The AIG has node \"%p\" with a wrong ordering of fanins.\n", pObj );
85 return 0;
86 }
87 pObj2 = Aig_TableLookup( p, pObj );
88 if ( pObj2 != pObj )
89 {
90 printf( "Aig_ManCheck: Node \"%p\" is not in the structural hashing table.\n", pObj );
91 return 0;
92 }
93 }
94 // count the total number of nodes
95 if ( Aig_ManObjNum(p) != 1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) +
96 Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) )
97 {
98 printf( "Aig_ManCheck: The number of created nodes is wrong.\n" );
99 printf( "C1 = %d. Pi = %d. Po = %d. Buf = %d. And = %d. Xor = %d. Total = %d.\n",
100 1, Aig_ManCiNum(p), Aig_ManCoNum(p), Aig_ManBufNum(p), Aig_ManAndNum(p), Aig_ManExorNum(p),
101 1 + Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManBufNum(p) + Aig_ManAndNum(p) + Aig_ManExorNum(p) );
102 printf( "Created = %d. Deleted = %d. Existing = %d.\n",
103 Aig_ManObjNumMax(p), p->nDeleted, Aig_ManObjNum(p) );
104 return 0;
105 }
106 // count the number of nodes in the table
107 if ( Aig_TableCountEntries(p) != Aig_ManAndNum(p) + Aig_ManExorNum(p) )
108 {
109 printf( "Aig_ManCheck: The number of nodes in the structural hashing table is wrong.\n" );
110 printf( "Entries = %d. And = %d. Xor = %d. Total = %d.\n",
111 Aig_TableCountEntries(p), Aig_ManAndNum(p), Aig_ManExorNum(p),
112 Aig_ManAndNum(p) + Aig_ManExorNum(p) );
113
114 return 0;
115 }
116// if ( !Aig_ManIsAcyclic(p) )
117// return 0;
118 return 1;
119}
#define Aig_ManForEachCo(p, pObj, i)
Definition aig.h:398
int Aig_TableCountEntries(Aig_Man_t *p)
Definition aigTable.c:218
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◆ Aig_ManCheckMarkA()

void Aig_ManCheckMarkA ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Checks if the markA is reset.]

Description []

SideEffects []

SeeAlso []

Definition at line 132 of file aigCheck.c.

133{
134 Aig_Obj_t * pObj;
135 int i;
136 Aig_ManForEachObj( p, pObj, i )
137 assert( pObj->fMarkA == 0 );
138}
unsigned int fMarkA
Definition aig.h:79

◆ Aig_ManCheckPhase()

void Aig_ManCheckPhase ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Checks the consistency of phase assignment.]

Description []

SideEffects []

SeeAlso []

Definition at line 151 of file aigCheck.c.

152{
153 Aig_Obj_t * pObj;
154 int i;
155 Aig_ManForEachObj( p, pObj, i )
156 if ( Aig_ObjIsCi(pObj) )
157 assert( (int)pObj->fPhase == 0 );
158 else
159 assert( (int)pObj->fPhase == (Aig_ObjPhaseReal(Aig_ObjChild0(pObj)) & Aig_ObjPhaseReal(Aig_ObjChild1(pObj))) );
160}
unsigned int fPhase
Definition aig.h:78
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◆ Aig_ManChoiceConstructive()

Aig_Man_t * Aig_ManChoiceConstructive ( Vec_Ptr_t * vAigs,
int fVerbose )
extern

Function*************************************************************

Synopsis [Constructively accumulates choices.]

Description []

SideEffects []

SeeAlso []

Definition at line 1564 of file aigPart.c.

1565{
1566 Vec_Ptr_t * vPios;
1567 Aig_Man_t * pNew, * pThis, * pPrev, * pTemp;
1568 int i;
1569 // start AIG with choices
1570 pPrev = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
1571 pNew = Aig_ManDupOrdered( pPrev );
1572 // create room for equivalent nodes and representatives
1573 assert( pNew->pReprs == NULL );
1574 pNew->nReprsAlloc = Vec_PtrSize(vAigs) * Aig_ManObjNumMax(pNew);
1575 pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, pNew->nReprsAlloc );
1576 memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * pNew->nReprsAlloc );
1577 // add other AIGs one by one
1578 Vec_PtrForEachEntryStart( Aig_Man_t *, vAigs, pThis, i, 1 )
1579 {
1580 Aig_ManChoiceConstructiveOne( pNew, pPrev, pThis );
1581 pPrev = pThis;
1582 }
1583 // derive the result of choicing
1584 pNew = Aig_ManRehash( pNew );
1585 // create the equivalent nodes lists
1587 // reconstruct the network
1588 vPios = Aig_ManOrderPios( pNew, (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 ) );
1589 pNew = Aig_ManDupDfsGuided( pTemp = pNew, vPios );
1590 Aig_ManStop( pTemp );
1591 Vec_PtrFree( vPios );
1592 // duplicate the timing manager
1593 pTemp = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
1594 if ( pTemp->pManTime )
1595 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)pTemp->pManTime, 0 );
1596 // reset levels
1597 Aig_ManChoiceLevel( pNew );
1598 return pNew;
1599}
#define ABC_ALLOC(type, num)
Definition abc_global.h:264
void Aig_ManChoiceConstructiveOne(Aig_Man_t *pNew, Aig_Man_t *pPrev, Aig_Man_t *pThis)
Definition aigPart.c:1478
Vec_Ptr_t * Aig_ManOrderPios(Aig_Man_t *p, Aig_Man_t *pOrder)
Definition aigDup.c:626
Aig_Man_t * Aig_ManDupOrdered(Aig_Man_t *p)
Definition aigDup.c:277
Aig_Man_t * Aig_ManRehash(Aig_Man_t *p)
Definition aigRepr.c:454
void Aig_ManStop(Aig_Man_t *p)
Definition aigMan.c:187
void Aig_ManMarkValidChoices(Aig_Man_t *p)
Definition aigRepr.c:481
Aig_Man_t * Aig_ManDupDfsGuided(Aig_Man_t *p, Vec_Ptr_t *vPios)
Definition aigDup.c:694
typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t
INCLUDES ///.
Definition aig.h:50
int Aig_ManChoiceLevel(Aig_Man_t *p)
Definition aigDfs.c:595
typedefABC_NAMESPACE_HEADER_START struct Tim_Man_t_ Tim_Man_t
INCLUDES ///.
Definition tim.h:92
Tim_Man_t * Tim_ManDup(Tim_Man_t *p, int fUnitDelay)
Definition timMan.c:86
char * memset()
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42
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◆ Aig_ManChoiceLevel()

int Aig_ManChoiceLevel ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Computes levels for AIG with choices and white boxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 595 of file aigDfs.c.

596{
597 Aig_Obj_t * pObj;
598 int i, LevelMax = 0;
599 Aig_ManForEachObj( p, pObj, i )
600 Aig_ObjSetLevel( pObj, 0 );
603 Aig_ManForEachCo( p, pObj, i )
604 {
605 Aig_ManChoiceLevel_rec( p, pObj );
606 if ( LevelMax < Aig_ObjLevel(pObj) )
607 LevelMax = Aig_ObjLevel(pObj);
608 }
609 // account for dangling boxes
610 Aig_ManForEachCi( p, pObj, i )
611 {
612 Aig_ManChoiceLevel_rec( p, pObj );
613 if ( LevelMax < Aig_ObjLevel(pObj) )
614 LevelMax = Aig_ObjLevel(pObj);
615 }
617// Aig_ManForEachNode( p, pObj, i )
618// assert( Aig_ObjLevel(pObj) > 0 );
619 return LevelMax;
620}
void Aig_ManChoiceLevel_rec(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigDfs.c:523
void Aig_ManSetCioIds(Aig_Man_t *p)
Definition aigUtil.c:978
void Aig_ManIncrementTravId(Aig_Man_t *p)
DECLARATIONS ///.
Definition aigUtil.c:44
void Aig_ManCleanCioIds(Aig_Man_t *p)
Definition aigUtil.c:999
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◆ Aig_ManChoiceNum()

int Aig_ManChoiceNum ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 1020 of file aigUtil.c.

1021{
1022 Aig_Obj_t * pObj;
1023 int i, Counter = 0;
1024 Aig_ManForEachNode( p, pObj, i )
1025 Counter += Aig_ObjIsChoice( p, pObj );
1026 return Counter;
1027}
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◆ Aig_ManChoicePartitioned()

Aig_Man_t * Aig_ManChoicePartitioned ( Vec_Ptr_t * vAigs,
int nPartSize,
int nConfMax,
int nLevelMax,
int fVerbose )
extern

Function*************************************************************

Synopsis [Performs partitioned choice computation.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1247 of file aigPart.c.

1248{
1249// extern int Cmd_CommandExecute( void * pAbc, char * sCommand );
1250// extern void * Abc_FrameGetGlobalFrame();
1251// extern Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax );
1252
1253 Vec_Ptr_t * vPios;
1254 Vec_Ptr_t * vOutsTotal, * vOuts;
1255 Aig_Man_t * pAigTotal, * pAigPart, * pAig, * pTemp;
1256 Vec_Int_t * vPart, * vPartSupp;
1257 Vec_Ptr_t * vParts;
1258 Aig_Obj_t * pObj;
1259 void ** ppData;
1260 int i, k, m, nIdMax;
1261 assert( Vec_PtrSize(vAigs) > 1 );
1262
1263 // compute the total number of IDs
1264 nIdMax = 0;
1265 Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
1266 nIdMax += Aig_ManObjNumMax(pAig);
1267
1268 // partition the first AIG in the array
1269 pAig = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
1270 vParts = Aig_ManPartitionSmart( pAig, nPartSize, 0, NULL );
1271
1272 // start the total fraiged AIG
1273 pAigTotal = Aig_ManStartFrom( pAig );
1274 Aig_ManReprStart( pAigTotal, nIdMax );
1275 vOutsTotal = Vec_PtrStart( Aig_ManCoNum(pAig) );
1276
1277 // set the PI numbers
1278 Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
1279 Aig_ManForEachCi( pAig, pObj, k )
1280 pObj->pNext = (Aig_Obj_t *)(long)k;
1281
1282// Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "unset progressbar" );
1283
1284 // create the total fraiged AIG
1285 vPartSupp = Vec_IntAlloc( 100 ); // maps part PI num into total PI num
1286 Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
1287 {
1288 // derive the partition AIG
1289 pAigPart = Aig_ManStart( 5000 );
1290// pAigPart->pName = Extra_UtilStrsav( pAigPart->pName );
1291 Vec_IntClear( vPartSupp );
1292 Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, k )
1293 {
1294 vOuts = Aig_ManDupPart( pAigPart, pAig, vPart, vPartSupp, 0 );
1295 if ( k == 0 )
1296 {
1297 Vec_PtrForEachEntry( Aig_Obj_t *, vOuts, pObj, m )
1298 Aig_ObjCreateCo( pAigPart, pObj );
1299 }
1300 Vec_PtrFree( vOuts );
1301 }
1302 // derive the total AIG from the partitioned AIG
1303 vOuts = Aig_ManDupPart( pAigTotal, pAigPart, vPart, vPartSupp, 1 );
1304 // add to the outputs
1305 Vec_PtrForEachEntry( Aig_Obj_t *, vOuts, pObj, k )
1306 {
1307 assert( Vec_PtrEntry( vOutsTotal, Vec_IntEntry(vPart,k) ) == NULL );
1308 Vec_PtrWriteEntry( vOutsTotal, Vec_IntEntry(vPart,k), pObj );
1309 }
1310 Vec_PtrFree( vOuts );
1311 // store contents of pData pointers
1312 ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
1313 Aig_ManForEachObj( pAigPart, pObj, k )
1314 ppData[k] = pObj->pData;
1315 // report the process
1316 if ( fVerbose )
1317 printf( "Part %4d (out of %4d) PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r",
1318 i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart),
1319 Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
1320 // compute equivalence classes (to be stored in pNew->pReprs)
1321 pAig = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
1322 Aig_ManStop( pAig );
1323 // reset the pData pointers
1324 Aig_ManForEachObj( pAigPart, pObj, k )
1325 pObj->pData = ppData[k];
1326 ABC_FREE( ppData );
1327 // transfer representatives to the total AIG
1328 if ( pAigPart->pReprs )
1329 Aig_ManTransferRepr( pAigTotal, pAigPart );
1330 Aig_ManStop( pAigPart );
1331 }
1332 if ( fVerbose )
1333 printf( " \r" );
1334 Vec_VecFree( (Vec_Vec_t *)vParts );
1335 Vec_IntFree( vPartSupp );
1336
1337// Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "set progressbar" );
1338
1339 // clear the PI numbers
1340 Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig, i )
1341 Aig_ManForEachCi( pAig, pObj, k )
1342 pObj->pNext = NULL;
1343
1344 // add the outputs in the same order
1345 Vec_PtrForEachEntry( Aig_Obj_t *, vOutsTotal, pObj, i )
1346 Aig_ObjCreateCo( pAigTotal, pObj );
1347 Vec_PtrFree( vOutsTotal );
1348
1349 // derive the result of choicing
1350 pAig = Aig_ManRehash( pAigTotal );
1351 // create the equivalent nodes lists
1353 // reconstruct the network
1354 vPios = Aig_ManOrderPios( pAig, (Aig_Man_t *)Vec_PtrEntry(vAigs,0) );
1355 pAig = Aig_ManDupDfsGuided( pTemp = pAig, vPios );
1356 Aig_ManStop( pTemp );
1357 Vec_PtrFree( vPios );
1358 // duplicate the timing manager
1359 pTemp = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
1360 if ( pTemp->pManTime )
1361 pAig->pManTime = Tim_ManDup( (Tim_Man_t *)pTemp->pManTime, 0 );
1362 // reset levels
1363 Aig_ManChoiceLevel( pAig );
1364 return pAig;
1365}
#define ABC_FREE(obj)
Definition abc_global.h:267
Vec_Ptr_t * Aig_ManDupPart(Aig_Man_t *pNew, Aig_Man_t *pOld, Vec_Int_t *vPart, Vec_Int_t *vSuppMap, int fInverse)
Definition aigPart.c:995
Vec_Ptr_t * Aig_ManPartitionSmart(Aig_Man_t *p, int nSuppSizeLimit, int fVerbose, Vec_Ptr_t **pvPartSupps)
Definition aigPart.c:686
int Aig_ManLevelNum(Aig_Man_t *p)
Definition aigDfs.c:500
void Aig_ManReprStart(Aig_Man_t *p, int nIdMax)
DECLARATIONS ///.
Definition aigRepr.c:45
Aig_Man_t * Aig_ManStartFrom(Aig_Man_t *p)
Definition aigMan.c:92
Aig_Man_t * Aig_ManStart(int nNodesMax)
DECLARATIONS ///.
Definition aigMan.c:47
void Aig_ManTransferRepr(Aig_Man_t *pNew, Aig_Man_t *p)
Definition aigRepr.c:211
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
Definition bblif.c:37
Aig_Man_t * Fra_FraigChoice(Aig_Man_t *pManAig, int nConfMax, int nLevelMax)
Definition fraCore.c:442
Aig_Obj_t * pNext
Definition aig.h:72
void * pData
Definition aig.h:87
typedefABC_NAMESPACE_HEADER_START struct Vec_Vec_t_ Vec_Vec_t
INCLUDES ///.
Definition vecVec.h:42
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◆ Aig_ManCiCleanup()

int Aig_ManCiCleanup ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Removes PIs without fanouts.]

Description [Returns the number of PIs removed.]

SideEffects []

SeeAlso []

Definition at line 314 of file aigMan.c.

315{
316 Aig_Obj_t * pObj;
317 int i, k = 0, nPisOld = Aig_ManCiNum(p);
318 Vec_PtrForEachEntry( Aig_Obj_t *, p->vCis, pObj, i )
319 {
320 if ( i >= Aig_ManCiNum(p) - Aig_ManRegNum(p) )
321 Vec_PtrWriteEntry( p->vCis, k++, pObj );
322 else if ( Aig_ObjRefs(pObj) > 0 )
323 Vec_PtrWriteEntry( p->vCis, k++, pObj );
324 else
325 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
326 }
327 Vec_PtrShrink( p->vCis, k );
328 p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
329 if ( Aig_ManRegNum(p) )
330 p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
331 return nPisOld - Aig_ManCiNum(p);
332}
int Id
Definition aig.h:85
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◆ Aig_ManCleanCioIds()

void Aig_ManCleanCioIds ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 999 of file aigUtil.c.

1000{
1001 Aig_Obj_t * pObj;
1002 int i;
1003 Aig_ManForEachCi( p, pObj, i )
1004 pObj->pNext = NULL;
1005 Aig_ManForEachCo( p, pObj, i )
1006 pObj->pNext = NULL;
1007}
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◆ Aig_ManCleanData()

void Aig_ManCleanData ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans the data pointers for the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 205 of file aigUtil.c.

206{
207 Aig_Obj_t * pObj;
208 int i;
209 Aig_ManForEachObj( p, pObj, i )
210 pObj->pData = NULL;
211}

◆ Aig_ManCleanMarkA()

void Aig_ManCleanMarkA ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans fMarkA.]

Description []

SideEffects []

SeeAlso []

Definition at line 148 of file aigUtil.c.

149{
150 Aig_Obj_t * pObj;
151 int i;
152 Aig_ManForEachObj( p, pObj, i )
153 pObj->fMarkA = 0;
154}
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◆ Aig_ManCleanMarkAB()

void Aig_ManCleanMarkAB ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans fMarkB.]

Description []

SideEffects []

SeeAlso []

Definition at line 186 of file aigUtil.c.

187{
188 Aig_Obj_t * pObj;
189 int i;
190 Aig_ManForEachObj( p, pObj, i )
191 pObj->fMarkA = pObj->fMarkB = 0;
192}
unsigned int fMarkB
Definition aig.h:80
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◆ Aig_ManCleanMarkB()

void Aig_ManCleanMarkB ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans fMarkB.]

Description []

SideEffects []

SeeAlso []

Definition at line 167 of file aigUtil.c.

168{
169 Aig_Obj_t * pObj;
170 int i;
171 Aig_ManForEachObj( p, pObj, i )
172 pObj->fMarkB = 0;
173}
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◆ Aig_ManCleanNext()

void Aig_ManCleanNext ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans the data pointers for the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 224 of file aigUtil.c.

225{
226 Aig_Obj_t * pObj;
227 int i;
228 Aig_ManForEachObj( p, pObj, i )
229 pObj->pNext = NULL;
230}
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◆ Aig_ManCleanup()

int Aig_ManCleanup ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Removes combinational logic that does not feed into POs.]

Description [Returns the number of dangling nodes removed.]

SideEffects []

SeeAlso []

Definition at line 265 of file aigMan.c.

266{
267 Vec_Ptr_t * vObjs;
268 Aig_Obj_t * pNode;
269 int i, nNodesOld = Aig_ManNodeNum(p);
270 // collect roots of dangling nodes
271 vObjs = Vec_PtrAlloc( 100 );
272 Aig_ManForEachObj( p, pNode, i )
273 if ( Aig_ObjIsNode(pNode) && Aig_ObjRefs(pNode) == 0 )
274 Vec_PtrPush( vObjs, pNode );
275 // recursively remove dangling nodes
276 Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pNode, i )
277 Aig_ObjDelete_rec( p, pNode, 1 );
278 Vec_PtrFree( vObjs );
279 return nNodesOld - Aig_ManNodeNum(p);
280}
void Aig_ObjDelete_rec(Aig_Man_t *p, Aig_Obj_t *pObj, int fFreeTop)
Definition aigObj.c:232
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◆ Aig_ManCoCleanup()

int Aig_ManCoCleanup ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Removes POs with constant input.]

Description [Returns the number of POs removed.]

SideEffects []

SeeAlso []

Definition at line 345 of file aigMan.c.

346{
347 Aig_Obj_t * pObj;
348 int i, k = 0, nPosOld = Aig_ManCoNum(p);
349 Vec_PtrForEachEntry( Aig_Obj_t *, p->vCos, pObj, i )
350 {
351 if ( i >= Aig_ManCoNum(p) - Aig_ManRegNum(p) )
352 Vec_PtrWriteEntry( p->vCos, k++, pObj );
353 else if ( !Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) || !Aig_ObjFaninC0(pObj) ) // non-const or const1
354 Vec_PtrWriteEntry( p->vCos, k++, pObj );
355 else
356 {
357 Aig_ObjDisconnect( p, pObj );
358 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
359 }
360 }
361 Vec_PtrShrink( p->vCos, k );
362 p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
363 if ( Aig_ManRegNum(p) )
364 p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
365 return nPosOld - Aig_ManCoNum(p);
366}
void Aig_ObjDisconnect(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigObj.c:171
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◆ Aig_ManComputeSccs()

void Aig_ManComputeSccs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Computes strongly connected components of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 489 of file aigScl.c.

490{
491 Vec_Ptr_t * vSupports, * vMatrix, * vMatrix2;
492 Vec_Int_t * vSupp, * vSupp2, * vComp;
493 char * pVarsTot;
494 int i, k, m, iOut, iIn, nComps;
495 if ( Aig_ManRegNum(p) == 0 )
496 {
497 printf( "The network is combinational.\n" );
498 return;
499 }
500 // get structural supports for each output
501 vSupports = Aig_ManSupports( p );
502 // transforms the supports into the latch dependency matrix
503 vMatrix = Vec_PtrStart( Aig_ManRegNum(p) );
504 Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vSupp, i )
505 {
506 // skip true POs
507 iOut = Vec_IntPop( vSupp );
508 iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
509 if ( iOut < 0 )
510 continue;
511 // remove PIs
512 m = 0;
513 Vec_IntForEachEntry( vSupp, iIn, k )
514 {
515 iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
516 if ( iIn < 0 )
517 continue;
518 assert( iIn < Aig_ManRegNum(p) );
519 Vec_IntWriteEntry( vSupp, m++, iIn );
520 }
521 Vec_IntShrink( vSupp, m );
522 // store support in the matrix
523 assert( iOut < Aig_ManRegNum(p) );
524 Vec_PtrWriteEntry( vMatrix, iOut, vSupp );
525 }
526 // create the reverse matrix
527 vMatrix2 = Vec_PtrAlloc( Aig_ManRegNum(p) );
528 for ( i = 0; i < Aig_ManRegNum(p); i++ )
529 Vec_PtrPush( vMatrix2, Vec_IntAlloc(8) );
530 Vec_PtrForEachEntry( Vec_Int_t *, vMatrix, vSupp, i )
531 {
532 Vec_IntForEachEntry( vSupp, iIn, k )
533 {
534 vSupp2 = (Vec_Int_t *)Vec_PtrEntry( vMatrix2, iIn );
535 Vec_IntPush( vSupp2, i );
536 }
537 }
538
539 // detect strongly connected components
540 vComp = Vec_IntAlloc( Aig_ManRegNum(p) );
541 pVarsTot = ABC_ALLOC( char, Aig_ManRegNum(p) );
542 memset( pVarsTot, 0, Aig_ManRegNum(p) * sizeof(char) );
543 for ( nComps = 0; ; nComps++ )
544 {
545 Vec_IntClear( vComp );
546 // get the first support
547 for ( iOut = 0; iOut < Aig_ManRegNum(p); iOut++ )
548 if ( pVarsTot[iOut] == 0 )
549 break;
550 if ( iOut == Aig_ManRegNum(p) )
551 break;
552 pVarsTot[iOut] = 1;
553 Vec_IntPush( vComp, iOut );
554 Vec_IntForEachEntry( vComp, iOut, i )
555 {
556 vSupp = (Vec_Int_t *)Vec_PtrEntry( vMatrix, iOut );
557 Vec_IntForEachEntry( vSupp, iIn, k )
558 {
559 if ( pVarsTot[iIn] )
560 continue;
561 pVarsTot[iIn] = 1;
562 Vec_IntPush( vComp, iIn );
563 }
564 vSupp2 = (Vec_Int_t *)Vec_PtrEntry( vMatrix2, iOut );
565 Vec_IntForEachEntry( vSupp2, iIn, k )
566 {
567 if ( pVarsTot[iIn] )
568 continue;
569 pVarsTot[iIn] = 1;
570 Vec_IntPush( vComp, iIn );
571 }
572 }
573 if ( Vec_IntSize(vComp) == Aig_ManRegNum(p) )
574 {
575 printf( "There is only one SCC of registers in this network.\n" );
576 break;
577 }
578 printf( "SCC #%d contains %5d registers.\n", nComps+1, Vec_IntSize(vComp) );
579 }
580 ABC_FREE( pVarsTot );
581 Vec_IntFree( vComp );
582 Vec_PtrFree( vMatrix );
583 Vec_VecFree( (Vec_Vec_t *)vMatrix2 );
584 Vec_VecFree( (Vec_Vec_t *)vSupports );
585}
Vec_Ptr_t * Aig_ManSupports(Aig_Man_t *p)
Definition aigPart.c:273
#define Vec_IntForEachEntry(vVec, Entry, i)
MACRO DEFINITIONS ///.
Definition vecInt.h:54
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◆ Aig_ManConstReduce()

Aig_Man_t * Aig_ManConstReduce ( Aig_Man_t * p,
int fUseMvSweep,
int nFramesSymb,
int nFramesSatur,
int fVerbose,
int fVeryVerbose )
extern

Function*************************************************************

Synopsis [Reduces the circuit using ternary simulation.]

Description []

SideEffects []

SeeAlso []

Definition at line 498 of file aigTsim.c.

499{
500 Aig_Man_t * pTemp;
501 Vec_Ptr_t * vMap;
502 while ( Aig_ManRegNum(p) > 0 )
503 {
504 if ( fUseMvSweep )
505 vMap = Saig_MvManSimulate( p, nFramesSymb, nFramesSatur, fVerbose, fVeryVerbose );
506 else
507 vMap = Aig_ManTernarySimulate( p, fVerbose, fVeryVerbose );
508 if ( vMap == NULL )
509 break;
510 p = Aig_ManRemap( pTemp = p, vMap );
511 Vec_PtrFree( vMap );
513 if ( fVerbose )
514 Aig_ManReportImprovement( pTemp, p );
515 Aig_ManStop( pTemp );
516 }
517 return p;
518}
Vec_Ptr_t * Aig_ManTernarySimulate(Aig_Man_t *p, int fVerbose, int fVeryVerbose)
Definition aigTsim.c:348
int Aig_ManSeqCleanup(Aig_Man_t *p)
Definition aigScl.c:158
void Aig_ManReportImprovement(Aig_Man_t *p, Aig_Man_t *pNew)
Definition aigMan.c:415
Aig_Man_t * Aig_ManRemap(Aig_Man_t *p, Vec_Ptr_t *vMap)
DECLARATIONS ///.
Definition aigScl.c:46
Vec_Ptr_t * Saig_MvManSimulate(Aig_Man_t *pAig, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)
Definition saigSimMv.c:879
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◆ Aig_ManCountMergeRegs()

int Aig_ManCountMergeRegs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description []

SideEffects []

SeeAlso []

Definition at line 310 of file aigScl.c.

311{
312 Aig_Obj_t * pObj, * pFanin;
313 int i, Counter = 0, Const0 = 0, Const1 = 0;
315 Aig_ManForEachLiSeq( p, pObj, i )
316 {
317 pFanin = Aig_ObjFanin0(pObj);
318 if ( Aig_ObjIsConst1(pFanin) )
319 {
320 if ( Aig_ObjFaninC0(pObj) )
321 Const0++;
322 else
323 Const1++;
324 }
325 if ( Aig_ObjIsTravIdCurrent(p, pFanin) )
326 continue;
327 Aig_ObjSetTravIdCurrent(p, pFanin);
328 Counter++;
329 }
330 printf( "Regs = %d. Fanins = %d. Const0 = %d. Const1 = %d.\n",
331 Aig_ManRegNum(p), Counter, Const0, Const1 );
332 return 0;
333}
#define Aig_ManForEachLiSeq(p, pObj, i)
Definition aig.h:447
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◆ Aig_ManCountReprs()

int Aig_ManCountReprs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Transfer representatives and return the number of critical fanouts.]

Description []

SideEffects []

SeeAlso []

Definition at line 378 of file aigRepr.c.

379{
380 Aig_Obj_t * pObj;
381 int i, Counter = 0;
382 if ( p->pReprs == NULL )
383 return 0;
384 Aig_ManForEachObj( p, pObj, i )
385 Counter += (p->pReprs[i] != NULL);
386 return Counter;
387}

◆ Aig_ManCreateMiter()

Aig_Man_t * Aig_ManCreateMiter ( Aig_Man_t * p1,
Aig_Man_t * p2,
int Oper )
extern

Function*************************************************************

Synopsis [Creates the miter of the two AIG managers.]

Description [Oper is the operation to perform on the outputs of the miter. Oper == 0 is XOR Oper == 1 is complemented implication (p1 => p2) Oper == 2 is OR Oper == 3 is AND ]

SideEffects []

SeeAlso []

Definition at line 1049 of file aigDup.c.

1050{
1051 Aig_Man_t * pNew;
1052 Aig_Obj_t * pObj = NULL;
1053 int i;
1054 assert( Aig_ManRegNum(p1) == 0 );
1055 assert( Aig_ManRegNum(p2) == 0 );
1056 assert( Aig_ManCoNum(p1) == 1 );
1057 assert( Aig_ManCoNum(p2) == 1 );
1058 assert( Aig_ManCiNum(p1) == Aig_ManCiNum(p2) );
1059 pNew = Aig_ManStart( Aig_ManObjNumMax(p1) + Aig_ManObjNumMax(p2) );
1060 // add first AIG
1061 Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
1062 Aig_ManForEachCi( p1, pObj, i )
1063 pObj->pData = Aig_ObjCreateCi( pNew );
1064 Aig_ManForEachNode( p1, pObj, i )
1065 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1066 // add second AIG
1067 Aig_ManConst1(p2)->pData = Aig_ManConst1(pNew);
1068 Aig_ManForEachCi( p2, pObj, i )
1069 pObj->pData = Aig_ManCi( pNew, i );
1070 Aig_ManForEachNode( p2, pObj, i )
1071 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1072 // add the output
1073 if ( Oper == 0 ) // XOR
1074 pObj = Aig_Exor( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
1075 else if ( Oper == 1 ) // implication is PO(p1) -> PO(p2) ... complement is PO(p1) & !PO(p2)
1076 pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_Not(Aig_ObjChild0Copy(Aig_ManCo(p2,0))) );
1077 else if ( Oper == 2 ) // OR
1078 pObj = Aig_Or( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
1079 else if ( Oper == 3 ) // AND
1080 pObj = Aig_And( pNew, Aig_ObjChild0Copy(Aig_ManCo(p1,0)), Aig_ObjChild0Copy(Aig_ManCo(p2,0)) );
1081 else
1082 assert( 0 );
1083 Aig_ObjCreateCo( pNew, pObj );
1084 Aig_ManCleanup( pNew );
1085 return pNew;
1086}
Aig_Obj_t * Aig_And(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:104
Aig_Obj_t * Aig_Exor(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:220
int Aig_ManCleanup(Aig_Man_t *p)
Definition aigMan.c:265
Aig_Obj_t * Aig_Or(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:259
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◆ Aig_ManCutStop()

void Aig_ManCutStop ( Aig_ManCut_t * p)
extern

Function*************************************************************

Synopsis [Stops the fraiging manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigCuts.c.

87{
88 Aig_MmFixedStop( p->pMemCuts, 0 );
89 ABC_FREE( p->puTemp[0] );
90 ABC_FREE( p->pCuts );
91 ABC_FREE( p );
92}
void Aig_MmFixedStop(Aig_MmFixed_t *p, int fVerbose)
Definition aigMem.c:132
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◆ Aig_ManCutTruth()

unsigned * Aig_ManCutTruth ( Aig_Obj_t * pRoot,
Vec_Ptr_t * vLeaves,
Vec_Ptr_t * vNodes,
Vec_Ptr_t * vTruthElem,
Vec_Ptr_t * vTruthStore )
extern

Function*************************************************************

Synopsis [Computes truth table of the cut.]

Description [The returned pointer should be used immediately.]

SideEffects []

SeeAlso []

Definition at line 80 of file aigTruth.c.

81{
82 Aig_Obj_t * pObj;
83 int i, nWords;
84 assert( Vec_PtrSize(vLeaves) <= Vec_PtrSize(vTruthElem) );
85 assert( Vec_PtrSize(vNodes) <= Vec_PtrSize(vTruthStore) );
86 assert( Vec_PtrSize(vNodes) == 0 || pRoot == Vec_PtrEntryLast(vNodes) );
87 // assign elementary truth tables
88 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
89 pObj->pData = Vec_PtrEntry( vTruthElem, i );
90 // compute truths for other nodes
91 nWords = Abc_TruthWordNum( Vec_PtrSize(vLeaves) );
92 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
93 pObj->pData = Aig_ManCutTruthOne( pObj, (unsigned *)Vec_PtrEntry(vTruthStore, i), nWords );
94 return (unsigned *)pRoot->pData;
95}
int nWords
Definition abcNpn.c:127
ABC_NAMESPACE_IMPL_START unsigned * Aig_ManCutTruthOne(Aig_Obj_t *pNode, unsigned *pTruth, int nWords)
DECLARATIONS ///.
Definition aigTruth.c:45
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◆ Aig_ManDfs()

Vec_Ptr_t * Aig_ManDfs ( Aig_Man_t * p,
int fNodesOnly )
extern

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description [Works with choice nodes.]

SideEffects []

SeeAlso []

Definition at line 145 of file aigDfs.c.

146{
147 Vec_Ptr_t * vNodes;
148 Aig_Obj_t * pObj;
149 int i;
151 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
152 // start the array of nodes
153 vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
154 // mark PIs if they should not be collected
155 if ( fNodesOnly )
156 Aig_ManForEachCi( p, pObj, i )
157 Aig_ObjSetTravIdCurrent( p, pObj );
158 else
159 Vec_PtrPush( vNodes, Aig_ManConst1(p) );
160 // collect nodes reachable in the DFS order
161 Aig_ManForEachCo( p, pObj, i )
162 Aig_ManDfs_rec( p, fNodesOnly? Aig_ObjFanin0(pObj): pObj, vNodes );
163 if ( fNodesOnly )
164 assert( Vec_PtrSize(vNodes) == Aig_ManNodeNum(p) );
165 else
166 assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
167 return vNodes;
168}
void Aig_ManDfs_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigDfs.c:119
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◆ Aig_ManDfsAll()

Vec_Ptr_t * Aig_ManDfsAll ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 228 of file aigDfs.c.

229{
230 Vec_Ptr_t * vNodes;
231 Aig_Obj_t * pObj;
232 int i;
234 vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
235 // add constant
236 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
237 Vec_PtrPush( vNodes, Aig_ManConst1(p) );
238 // collect nodes reachable in the DFS order
239 Aig_ManForEachCo( p, pObj, i )
240 Aig_ManDfsAll_rec( p, pObj, vNodes );
241 Aig_ManForEachCi( p, pObj, i )
242 if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
243 Vec_PtrPush( vNodes, pObj );
244 assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
245 return vNodes;
246}
void Aig_ManDfsAll_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigDfs.c:181
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◆ Aig_ManDfsChoices()

Vec_Ptr_t * Aig_ManDfsChoices ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Collects internal nodes in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 405 of file aigDfs.c.

406{
407 Vec_Ptr_t * vNodes;
408 Aig_Obj_t * pObj;
409 int i, Counter = 0;
410
411 Aig_ManForEachNode( p, pObj, i )
412 {
413 if ( Aig_ObjEquiv(p, pObj) == NULL )
414 continue;
415 Counter = 0;
416 for ( pObj = Aig_ObjEquiv(p, pObj) ; pObj; pObj = Aig_ObjEquiv(p, pObj) )
417 Counter++;
418// printf( "%d ", Counter );
419 }
420// printf( "\n" );
421
422 assert( p->pEquivs != NULL );
424 // mark constant and PIs
425 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
426 Aig_ManForEachCi( p, pObj, i )
427 Aig_ObjSetTravIdCurrent( p, pObj );
428 // go through the nodes
429 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
430 Aig_ManForEachCo( p, pObj, i )
431 Aig_ManDfsChoices_rec( p, Aig_ObjFanin0(pObj), vNodes );
432 return vNodes;
433}
void Aig_ManDfsChoices_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigDfs.c:378
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◆ Aig_ManDfsNodes()

Vec_Ptr_t * Aig_ManDfsNodes ( Aig_Man_t * p,
Aig_Obj_t ** ppNodes,
int nNodes )
extern

Function*************************************************************

Synopsis [Collects internal nodes and PIs in the DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 347 of file aigDfs.c.

348{
349 Vec_Ptr_t * vNodes;
350// Aig_Obj_t * pObj;
351 int i;
353 // mark constant and PIs
354 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
355// Aig_ManForEachCi( p, pObj, i )
356// Aig_ObjSetTravIdCurrent( p, pObj );
357 // go through the nodes
358 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
359 for ( i = 0; i < nNodes; i++ )
360 if ( Aig_ObjIsCo(ppNodes[i]) )
361 Aig_ManDfs_rec( p, Aig_ObjFanin0(ppNodes[i]), vNodes );
362 else
363 Aig_ManDfs_rec( p, ppNodes[i], vNodes );
364 return vNodes;
365}
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◆ Aig_ManDfsPreorder()

Vec_Ptr_t * Aig_ManDfsPreorder ( Aig_Man_t * p,
int fNodesOnly )
extern

Function*************************************************************

Synopsis [Collects objects of the AIG in the DFS order.]

Description [Works with choice nodes.]

SideEffects []

SeeAlso []

Definition at line 285 of file aigDfs.c.

286{
287 Vec_Ptr_t * vNodes;
288 Aig_Obj_t * pObj;
289 int i;
291 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
292 // start the array of nodes
293 vNodes = Vec_PtrAlloc( Aig_ManObjNumMax(p) );
294 // mark PIs if they should not be collected
295 if ( fNodesOnly )
296 Aig_ManForEachCi( p, pObj, i )
297 Aig_ObjSetTravIdCurrent( p, pObj );
298 else
299 Vec_PtrPush( vNodes, Aig_ManConst1(p) );
300 // collect nodes reachable in the DFS order
301 Aig_ManForEachCo( p, pObj, i )
302 Aig_ManDfsPreorder_rec( p, fNodesOnly? Aig_ObjFanin0(pObj): pObj, vNodes );
303 if ( fNodesOnly )
304 assert( Vec_PtrSize(vNodes) == Aig_ManNodeNum(p) );
305 else
306 assert( Vec_PtrSize(vNodes) == Aig_ManObjNum(p) );
307 return vNodes;
308}
void Aig_ManDfsPreorder_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigDfs.c:259
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◆ Aig_ManDfsReverse()

Vec_Ptr_t * Aig_ManDfsReverse ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Collects internal nodes in the reverse DFS order.]

Description []

SideEffects []

SeeAlso []

Definition at line 472 of file aigDfs.c.

473{
474 Vec_Ptr_t * vNodes;
475 Aig_Obj_t * pObj;
476 int i;
478 // mark POs
479 Aig_ManForEachCo( p, pObj, i )
480 Aig_ObjSetTravIdCurrent( p, pObj );
481 // go through the nodes
482 vNodes = Vec_PtrAlloc( Aig_ManNodeNum(p) );
483 Aig_ManForEachObj( p, pObj, i )
484 if ( Aig_ObjIsNode(pObj) || Aig_ObjIsBuf(pObj) )
485 Aig_ManDfsReverse_rec( p, pObj, vNodes );
486 return vNodes;
487}
void Aig_ManDfsReverse_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigDfs.c:446
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◆ Aig_ManDump()

void Aig_ManDump ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Write speculative miter for one node.]

Description []

SideEffects []

SeeAlso []

Definition at line 725 of file aigUtil.c.

726{
727 static int Counter = 0;
728 char FileName[200];
729 // dump the logic into a file
730 sprintf( FileName, "aigbug\\%03d.blif", ++Counter );
731 Aig_ManDumpBlif( p, FileName, NULL, NULL );
732 printf( "Intermediate AIG with %d nodes was written into file \"%s\".\n", Aig_ManNodeNum(p), FileName );
733}
void Aig_ManDumpBlif(Aig_Man_t *p, char *pFileName, Vec_Ptr_t *vPiNames, Vec_Ptr_t *vPoNames)
Definition aigUtil.c:746
char * sprintf()
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◆ Aig_ManDumpBlif()

void Aig_ManDumpBlif ( Aig_Man_t * p,
char * pFileName,
Vec_Ptr_t * vPiNames,
Vec_Ptr_t * vPoNames )
extern

Function*************************************************************

Synopsis [Writes the AIG into a BLIF file.]

Description []

SideEffects []

SeeAlso []

Definition at line 746 of file aigUtil.c.

747{
748 FILE * pFile;
749 Vec_Ptr_t * vNodes;
750 Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
751 int i, nDigits, Counter = 0;
752 if ( Aig_ManCoNum(p) == 0 )
753 {
754 printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
755 return;
756 }
757 // check if constant is used
758 Aig_ManForEachCo( p, pObj, i )
759 if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
760 pConst1 = Aig_ManConst1(p);
761 // collect nodes in the DFS order
762 vNodes = Aig_ManDfs( p, 1 );
763 // assign IDs to objects
764 Aig_ManConst1(p)->iData = Counter++;
765 Aig_ManForEachCi( p, pObj, i )
766 pObj->iData = Counter++;
767 Aig_ManForEachCo( p, pObj, i )
768 pObj->iData = Counter++;
769 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
770 pObj->iData = Counter++;
771 nDigits = Abc_Base10Log( Counter );
772 // write the file
773 pFile = fopen( pFileName, "w" );
774 fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" );
775// fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
776 fprintf( pFile, ".model %s\n", p->pName );
777 // write PIs
778 fprintf( pFile, ".inputs" );
779 Aig_ManForEachPiSeq( p, pObj, i )
780 if ( vPiNames )
781 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, i) );
782 else
783 fprintf( pFile, " n%0*d", nDigits, pObj->iData );
784 fprintf( pFile, "\n" );
785 // write POs
786 fprintf( pFile, ".outputs" );
787 Aig_ManForEachPoSeq( p, pObj, i )
788 if ( vPoNames )
789 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, i) );
790 else
791 fprintf( pFile, " n%0*d", nDigits, pObj->iData );
792 fprintf( pFile, "\n" );
793 // write latches
794 if ( Aig_ManRegNum(p) )
795 {
796 fprintf( pFile, "\n" );
797 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
798 {
799 fprintf( pFile, ".latch" );
800 if ( vPoNames )
801 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, Aig_ManCoNum(p)-Aig_ManRegNum(p)+i) );
802 else
803 fprintf( pFile, " n%0*d", nDigits, pObjLi->iData );
804 if ( vPiNames )
805 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ManCiNum(p)-Aig_ManRegNum(p)+i) );
806 else
807 fprintf( pFile, " n%0*d", nDigits, pObjLo->iData );
808 fprintf( pFile, " 0\n" );
809 }
810 fprintf( pFile, "\n" );
811 }
812 // write nodes
813 if ( pConst1 )
814 fprintf( pFile, ".names n%0*d\n 1\n", nDigits, pConst1->iData );
816 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
817 {
818 fprintf( pFile, ".names" );
819 if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
820 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin0(pObj))) );
821 else
822 fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
823 if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin1(pObj)) )
824 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin1(pObj))) );
825 else
826 fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin1(pObj)->iData );
827 fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
828 fprintf( pFile, "%d%d 1\n", !Aig_ObjFaninC0(pObj), !Aig_ObjFaninC1(pObj) );
829 }
830 // write POs
831 Aig_ManForEachCo( p, pObj, i )
832 {
833 fprintf( pFile, ".names" );
834 if ( vPiNames && Aig_ObjIsCi(Aig_ObjFanin0(pObj)) )
835 fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjCioId(Aig_ObjFanin0(pObj))) );
836 else
837 fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
838 if ( vPoNames )
839 fprintf( pFile, " %s\n", (char*)Vec_PtrEntry(vPoNames, Aig_ObjCioId(pObj)) );
840 else
841 fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
842 fprintf( pFile, "%d 1\n", !Aig_ObjFaninC0(pObj) );
843 }
845 fprintf( pFile, ".end\n\n" );
846 fclose( pFile );
847 Vec_PtrFree( vNodes );
848}
void Aig_ManSetCioIds(Aig_Man_t *p)
Definition aigUtil.c:978
void Aig_ManCleanCioIds(Aig_Man_t *p)
Definition aigUtil.c:999
#define Aig_ManForEachPiSeq(p, pObj, i)
SEQUENTIAL ITERATORS ///.
Definition aig.h:438
Vec_Ptr_t * Aig_ManDfs(Aig_Man_t *p, int fNodesOnly)
Definition aigDfs.c:145
#define Aig_ManForEachPoSeq(p, pObj, i)
Definition aig.h:444
#define Aig_ManForEachLiLoSeq(p, pObjLi, pObjLo, k)
Definition aig.h:450
int iData
Definition aig.h:88
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◆ Aig_ManDumpVerilog()

void Aig_ManDumpVerilog ( Aig_Man_t * p,
char * pFileName )
extern

Function*************************************************************

Synopsis [Writes the AIG into a Verilog file.]

Description []

SideEffects []

SeeAlso []

Definition at line 861 of file aigUtil.c.

862{
863 FILE * pFile;
864 Vec_Ptr_t * vNodes;
865 Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pConst1 = NULL;
866 int i, nDigits, Counter = 0;
867 if ( Aig_ManCoNum(p) == 0 )
868 {
869 printf( "Aig_ManDumpBlif(): AIG manager does not have POs.\n" );
870 return;
871 }
872 // check if constant is used
873 Aig_ManForEachCo( p, pObj, i )
874 if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
875 pConst1 = Aig_ManConst1(p);
876 // collect nodes in the DFS order
877 vNodes = Aig_ManDfs( p, 1 );
878 // assign IDs to objects
879 Aig_ManConst1(p)->iData = Counter++;
880 Aig_ManForEachCi( p, pObj, i )
881 pObj->iData = Counter++;
882 Aig_ManForEachCo( p, pObj, i )
883 pObj->iData = Counter++;
884 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
885 pObj->iData = Counter++;
886 nDigits = Abc_Base10Log( Counter );
887 // write the file
888 pFile = fopen( pFileName, "w" );
889 fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" );
890// fprintf( pFile, "// http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
891 if ( Aig_ManRegNum(p) )
892 fprintf( pFile, "module %s ( clock", p->pName? p->pName: "test" );
893 else
894 fprintf( pFile, "module %s (", p->pName? p->pName: "test" );
895 Aig_ManForEachPiSeq( p, pObj, i )
896 fprintf( pFile, "%s n%0*d", ((Aig_ManRegNum(p) || i)? ",":""), nDigits, pObj->iData );
897 Aig_ManForEachPoSeq( p, pObj, i )
898 fprintf( pFile, ", n%0*d", nDigits, pObj->iData );
899 fprintf( pFile, " );\n" );
900
901 // write PIs
902 if ( Aig_ManRegNum(p) )
903 fprintf( pFile, "input clock;\n" );
904 Aig_ManForEachPiSeq( p, pObj, i )
905 fprintf( pFile, "input n%0*d;\n", nDigits, pObj->iData );
906 // write POs
907 Aig_ManForEachPoSeq( p, pObj, i )
908 fprintf( pFile, "output n%0*d;\n", nDigits, pObj->iData );
909 // write latches
910 if ( Aig_ManRegNum(p) )
911 {
912 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
913 fprintf( pFile, "reg n%0*d;\n", nDigits, pObjLo->iData );
914 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
915 fprintf( pFile, "wire n%0*d;\n", nDigits, pObjLi->iData );
916 }
917 // write nodes
918 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
919 fprintf( pFile, "wire n%0*d;\n", nDigits, pObj->iData );
920 if ( pConst1 )
921 fprintf( pFile, "wire n%0*d;\n", nDigits, pConst1->iData );
922 // write nodes
923 if ( pConst1 )
924 fprintf( pFile, "assign n%0*d = 1\'b1;\n", nDigits, pConst1->iData );
925 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
926 {
927 fprintf( pFile, "assign n%0*d = %sn%0*d & %sn%0*d;\n",
928 nDigits, pObj->iData,
929 !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData,
930 !Aig_ObjFaninC1(pObj) ? " " : "~", nDigits, Aig_ObjFanin1(pObj)->iData
931 );
932 }
933 // write POs
934 Aig_ManForEachPoSeq( p, pObj, i )
935 {
936 fprintf( pFile, "assign n%0*d = %sn%0*d;\n",
937 nDigits, pObj->iData,
938 !Aig_ObjFaninC0(pObj) ? " " : "~", nDigits, Aig_ObjFanin0(pObj)->iData );
939 }
940 if ( Aig_ManRegNum(p) )
941 {
942 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
943 {
944 fprintf( pFile, "assign n%0*d = %sn%0*d;\n",
945 nDigits, pObjLi->iData,
946 !Aig_ObjFaninC0(pObjLi) ? " " : "~", nDigits, Aig_ObjFanin0(pObjLi)->iData );
947 }
948 }
949
950 // write initial state
951 if ( Aig_ManRegNum(p) )
952 {
953 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
954 fprintf( pFile, "always @ (posedge clock) begin n%0*d <= n%0*d; end\n",
955 nDigits, pObjLo->iData,
956 nDigits, pObjLi->iData );
957 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
958 fprintf( pFile, "initial begin n%0*d <= 1\'b0; end\n",
959 nDigits, pObjLo->iData );
960 }
961
962 fprintf( pFile, "endmodule\n\n" );
963 fclose( pFile );
964 Vec_PtrFree( vNodes );
965}
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◆ Aig_ManDupArray()

Aig_Man_t * Aig_ManDupArray ( Vec_Ptr_t * vArray)
extern

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1255 of file aigDup.c.

1256{
1257 Aig_Man_t * p, * pNew;
1258 Aig_Obj_t * pObj = NULL;
1259 int i, k;
1260 if ( Vec_PtrSize(vArray) == 0 )
1261 return NULL;
1262 p = (Aig_Man_t *)Vec_PtrEntry( vArray, 0 );
1263 Vec_PtrForEachEntry( Aig_Man_t *, vArray, pNew, k )
1264 {
1265 assert( Aig_ManRegNum(pNew) == 0 );
1266 assert( Aig_ManCiNum(pNew) == Aig_ManCiNum(p) );
1267 }
1268 // create the new manager
1269 pNew = Aig_ManStart( 10000 );
1270 pNew->pName = Abc_UtilStrsav( p->pName );
1271 Aig_ManForEachCi( p, pObj, i )
1272 Aig_ObjCreateCi(pNew);
1273 // create the PIs
1274 Vec_PtrForEachEntry( Aig_Man_t *, vArray, p, k )
1275 {
1276 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
1277 Aig_ManForEachCi( p, pObj, i )
1278 pObj->pData = Aig_ManCi( pNew, i );
1279 Aig_ManForEachNode( p, pObj, i )
1280 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1281 Aig_ManForEachCo( p, pObj, i )
1282 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1283 }
1284 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
1285 // check the resulting network
1286 if ( !Aig_ManCheck(pNew) )
1287 printf( "Aig_ManDupSimple(): The check has failed.\n" );
1288 return pNew;
1289}
void Aig_ManSetRegNum(Aig_Man_t *p, int nRegs)
Definition aigMan.c:438
ABC_DLL int Aig_ManCheck(Aig_Man_t *p)
FUNCTION DECLARATIONS ///.
Definition aigCheck.c:45
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◆ Aig_ManDupCof()

Aig_Man_t * Aig_ManDupCof ( Aig_Man_t * p,
int iInput,
int Value )
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 345 of file aigDup.c.

346{
347 Aig_Man_t * pNew;
348 Aig_Obj_t * pObj, * pObjNew = NULL;
349 int i;
350 assert( p->pManTime == NULL );
351 // create the new manager
352 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
353 pNew->pName = Abc_UtilStrsav( p->pName );
354 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
355 pNew->nAsserts = p->nAsserts;
356 pNew->nConstrs = p->nConstrs;
357 pNew->nBarBufs = p->nBarBufs;
358 if ( p->vFlopNums )
359 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
360 // create the PIs
362 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
363 Aig_ManForEachCi( p, pObj, i )
364 {
365 if ( i == iInput )
366 pObjNew = Value ? Aig_ManConst1(pNew) : Aig_ManConst0(pNew);
367 else
368 {
369 pObjNew = Aig_ObjCreateCi( pNew );
370 pObjNew->Level = pObj->Level;
371 }
372 pObj->pData = pObjNew;
373 }
374 // duplicate internal nodes
375 Aig_ManForEachObj( p, pObj, i )
376 if ( Aig_ObjIsBuf(pObj) )
377 {
378 pObjNew = Aig_ObjChild0Copy(pObj);
379 pObj->pData = pObjNew;
380 }
381 else if ( Aig_ObjIsNode(pObj) )
382 {
383 pObjNew = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
384 pObj->pData = pObjNew;
385 }
386 // add the POs
387 Aig_ManForEachCo( p, pObj, i )
388 {
389 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
390 pObj->pData = pObjNew;
391 }
392// assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
393 Aig_ManCleanup( pNew );
394 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
395 // check the resulting network
396 if ( !Aig_ManCheck(pNew) )
397 printf( "Aig_ManDupSimple(): The check has failed.\n" );
398 return pNew;
399}
void Aig_ManCleanData(Aig_Man_t *p)
Definition aigUtil.c:205
unsigned Level
Definition aig.h:82
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◆ Aig_ManDupDfs()

Aig_Man_t * Aig_ManDupDfs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 563 of file aigDup.c.

564{
565 Aig_Man_t * pNew;
566 Aig_Obj_t * pObj, * pObjNew = NULL;
567 int i, nNodes;
568 // create the new manager
569 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
570 pNew->pName = Abc_UtilStrsav( p->pName );
571 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
572 pNew->nAsserts = p->nAsserts;
573 pNew->nConstrs = p->nConstrs;
574 pNew->nBarBufs = p->nBarBufs;
575 if ( p->vFlopNums )
576 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
577 // duplicate representation of choice nodes
578 if ( p->pEquivs )
579 pNew->pEquivs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
580 if ( p->pReprs )
581 pNew->pReprs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
582 // create the PIs
584 // duplicate internal nodes
585 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
586 Aig_ManForEachObj( p, pObj, i )
587 {
588 if ( Aig_ObjIsCi(pObj) )
589 {
590 pObjNew = Aig_ObjCreateCi( pNew );
591 pObjNew->Level = pObj->Level;
592 pObj->pData = pObjNew;
593 }
594 else if ( Aig_ObjIsCo(pObj) )
595 {
596 Aig_ManDupDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );
597// assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
598 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
599 pObj->pData = pObjNew;
600 }
601 }
602 assert( p->pEquivs != NULL || Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
603 if ( p->pEquivs == NULL && p->pReprs == NULL && (nNodes = Aig_ManCleanup( pNew )) )
604 printf( "Aig_ManDupDfs(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
605 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
606 // duplicate the timing manager
607 if ( p->pManTime )
608 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
609 // check the resulting network
610 if ( !Aig_ManCheck(pNew) )
611 printf( "Aig_ManDupDfs(): The check has failed.\n" );
612 return pNew;
613}
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
Aig_Obj_t * Aig_ManDupDfs_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigDup.c:529
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◆ Aig_ManDupDfsGuided()

Aig_Man_t * Aig_ManDupDfsGuided ( Aig_Man_t * p,
Vec_Ptr_t * vPios )
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 694 of file aigDup.c.

695{
696 Aig_Man_t * pNew;
697 Aig_Obj_t * pObj, * pObjNew = NULL;
698 int i, nNodes;
699 // create the new manager
700 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
701 pNew->pName = Abc_UtilStrsav( p->pName );
702 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
703 pNew->nAsserts = p->nAsserts;
704 pNew->nConstrs = p->nConstrs;
705 pNew->nBarBufs = p->nBarBufs;
706 if ( p->vFlopNums )
707 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
708 // duplicate representation of choice nodes
709 if ( p->pEquivs )
710 {
711 pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
712 memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
713 }
714 if ( p->pReprs )
715 {
716 pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
717 memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
718 }
719 // create the PIs
721 // duplicate internal nodes
722 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
723 Vec_PtrForEachEntry( Aig_Obj_t *, vPios, pObj, i )
724 {
725 if ( Aig_ObjIsCi(pObj) )
726 {
727 pObjNew = Aig_ObjCreateCi( pNew );
728 pObjNew->Level = pObj->Level;
729 pObj->pData = pObjNew;
730 }
731 else if ( Aig_ObjIsCo(pObj) )
732 {
733 Aig_ManDupDfsGuided_rec( pNew, p, Aig_ObjFanin0(pObj) );
734// assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
735 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
736 pObj->pData = pObjNew;
737 }
738 }
739// assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
740 if ( p->pEquivs == NULL && p->pReprs == NULL && (nNodes = Aig_ManCleanup( pNew )) )
741 printf( "Aig_ManDupDfs(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
742 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
743 // duplicate the timing manager
744 if ( p->pManTime )
745 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
746 // check the resulting network
747 if ( !Aig_ManCheck(pNew) )
748 printf( "Aig_ManDupDfs(): The check has failed.\n" );
749 return pNew;
750}
Aig_Obj_t * Aig_ManDupDfsGuided_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigDup.c:657
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◆ Aig_ManDupExor()

Aig_Man_t * Aig_ManDupExor ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager to have EXOR gates.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 462 of file aigDup.c.

463{
464 Aig_Man_t * pNew;
465 Aig_Obj_t * pObj, * pObjNew = NULL;
466 int i;
467 // create the new manager
468 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
469 pNew->fCatchExor = 1;
470 pNew->pName = Abc_UtilStrsav( p->pName );
471 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
472 pNew->nAsserts = p->nAsserts;
473 pNew->nConstrs = p->nConstrs;
474 pNew->nBarBufs = p->nBarBufs;
475 if ( p->vFlopNums )
476 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
477 // create the PIs
479 // duplicate internal nodes
480 Aig_ManForEachObj( p, pObj, i )
481 {
482 if ( Aig_ObjIsBuf(pObj) )
483 {
484 pObjNew = Aig_ObjChild0Copy(pObj);
485 }
486 else if ( Aig_ObjIsNode(pObj) )
487 {
488 pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
489 }
490 else if ( Aig_ObjIsCi(pObj) )
491 {
492 pObjNew = Aig_ObjCreateCi( pNew );
493 pObjNew->Level = pObj->Level;
494 }
495 else if ( Aig_ObjIsCo(pObj) )
496 {
497 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
498 }
499 else if ( Aig_ObjIsConst1(pObj) )
500 {
501 pObjNew = Aig_ManConst1(pNew);
502 }
503 else
504 assert( 0 );
505 pObj->pData = pObjNew;
506 }
507 Aig_ManCleanup( pNew );
508 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
509 // duplicate the timing manager
510 if ( p->pManTime )
511 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
512 // check the resulting network
513 if ( !Aig_ManCheck(pNew) )
514 printf( "Aig_ManDupExor(): The check has failed.\n" );
515 return pNew;
516}
Aig_Obj_t * Aig_Oper(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1, Aig_Type_t Type)
Definition aigOper.c:83
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◆ Aig_ManDupFlopsOnly()

Aig_Man_t * Aig_ManDupFlopsOnly ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of nodes.]

SideEffects []

SeeAlso []

Definition at line 871 of file aigDup.c.

872{
873 Aig_Man_t * pNew;
874 Aig_Obj_t * pObj = NULL;
875 int i;
876 pNew = Aig_ManDupWithoutPos( p );
877 Saig_ManForEachLi( p, pObj, i )
878 pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
879 Aig_ManCleanup( pNew );
880 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
881 if ( !Aig_ManCheck(pNew) )
882 printf( "Aig_ManDupFlopsOnly(): The check has failed.\n" );
883 return pNew;
884
885}
Aig_Man_t * Aig_ManDupWithoutPos(Aig_Man_t *p)
Definition aigDup.c:835
#define Saig_ManForEachLi(p, pObj, i)
Definition saig.h:98
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◆ Aig_ManDupLevelized()

Aig_Man_t * Aig_ManDupLevelized ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 763 of file aigDup.c.

764{
765 Vec_Vec_t * vLevels;
766 Aig_Man_t * pNew;
767 Aig_Obj_t * pObj, * pObjNew = NULL;
768 int i, k;
769 // create the new manager
770 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
771 pNew->pName = Abc_UtilStrsav( p->pName );
772 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
773 pNew->nAsserts = p->nAsserts;
774 pNew->nConstrs = p->nConstrs;
775 pNew->nBarBufs = p->nBarBufs;
776 if ( p->vFlopNums )
777 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
778 // duplicate representation of choice nodes
779 if ( p->pEquivs )
780 {
781 pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
782 memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
783 }
784 if ( p->pReprs )
785 {
786 pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
787 memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
788 }
789 // create the PIs
790 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
791 Aig_ManForEachCi( p, pObj, i )
792 {
793 pObjNew = Aig_ObjCreateCi( pNew );
794 pObjNew->Level = pObj->Level;
795 pObj->pData = pObjNew;
796 }
797 // duplicate internal nodes
798 vLevels = Aig_ManLevelize( p );
799 Vec_VecForEachEntry( Aig_Obj_t *, vLevels, pObj, i, k )
800 {
801 pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
802 pObj->pData = pObjNew;
803 }
804 Vec_VecFree( vLevels );
805 // duplicate POs
806 Aig_ManForEachCo( p, pObj, i )
807 {
808 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
809 pObj->pData = pObjNew;
810 }
811 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
812// if ( (nNodes = Aig_ManCleanup( pNew )) )
813// printf( "Aig_ManDupLevelized(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
814 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
815 // duplicate the timing manager
816 if ( p->pManTime )
817 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
818 // check the resulting network
819 if ( !Aig_ManCheck(pNew) )
820 printf( "Aig_ManDupLevelized(): The check has failed.\n" );
821 return pNew;
822}
Vec_Vec_t * Aig_ManLevelize(Aig_Man_t *p)
Definition aigDfs.c:321
#define Vec_VecForEachEntry(Type, vGlob, pEntry, i, k)
Definition vecVec.h:87
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◆ Aig_ManDupNodes()

Aig_Man_t * Aig_ManDupNodes ( Aig_Man_t * pMan,
Vec_Ptr_t * vArray )
extern

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1302 of file aigDup.c.

1303{
1304 Aig_Man_t * pNew;
1305 Vec_Ptr_t * vObjs;
1306 Aig_Obj_t * pObj = NULL;
1307 int i;
1308 if ( Vec_PtrSize(vArray) == 0 )
1309 return NULL;
1310 vObjs = Aig_ManDfsNodes( pMan, (Aig_Obj_t **)Vec_PtrArray(vArray), Vec_PtrSize(vArray) );
1311 // create the new manager
1312 pNew = Aig_ManStart( 10000 );
1313 pNew->pName = Abc_UtilStrsav( pMan->pName );
1314 Aig_ManConst1(pMan)->pData = Aig_ManConst1(pNew);
1315 Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
1316 if ( Aig_ObjIsCi(pObj) )
1317 pObj->pData = Aig_ObjCreateCi(pNew);
1318 Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, i )
1319 if ( Aig_ObjIsNode(pObj) )
1320 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1321 Vec_PtrForEachEntry( Aig_Obj_t *, vArray, pObj, i )
1322 Aig_ObjCreateCo( pNew, (Aig_Obj_t *)pObj->pData );
1323 Aig_ManSetRegNum( pNew, 0 );
1324 Vec_PtrFree( vObjs );
1325 return pNew;
1326}
Vec_Ptr_t * Aig_ManDfsNodes(Aig_Man_t *p, Aig_Obj_t **ppNodes, int nNodes)
Definition aigDfs.c:347
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◆ Aig_ManDupOneOutput()

Aig_Man_t * Aig_ManDupOneOutput ( Aig_Man_t * p,
int iPoNum,
int fAddRegs )
extern

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1152 of file aigDup.c.

1153{
1154 Aig_Man_t * pNew;
1155 Aig_Obj_t * pObj = NULL;
1156 int i;
1157 //assert( Aig_ManRegNum(p) > 0 );
1158 assert( iPoNum < Aig_ManCoNum(p)-Aig_ManRegNum(p) );
1159 // create the new manager
1160 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
1161 pNew->pName = Abc_UtilStrsav( p->pName );
1162 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
1163 // create the PIs
1165 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
1166 Aig_ManForEachCi( p, pObj, i )
1167 pObj->pData = Aig_ObjCreateCi( pNew );
1168 // set registers
1169 pNew->nRegs = fAddRegs? p->nRegs : 0;
1170 pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
1171 pNew->nTruePos = 1;
1172 // duplicate internal nodes
1173 Aig_ManForEachNode( p, pObj, i )
1174 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1175 // create the PO
1176 pObj = Aig_ManCo( p, iPoNum );
1177 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1178 // create register inputs with MUXes
1179 if ( fAddRegs )
1180 {
1181 Aig_ManForEachLiSeq( p, pObj, i )
1182 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1183 }
1184 Aig_ManCleanup( pNew );
1185 return pNew;
1186}
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◆ Aig_ManDupOrdered()

Aig_Man_t * Aig_ManDupOrdered ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 277 of file aigDup.c.

278{
279 Aig_Man_t * pNew;
280 Aig_Obj_t * pObj, * pObjNew = NULL;
281 int i, nNodes;
282 // create the new manager
283 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
284 pNew->pName = Abc_UtilStrsav( p->pName );
285 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
286 pNew->nAsserts = p->nAsserts;
287 pNew->nConstrs = p->nConstrs;
288 pNew->nBarBufs = p->nBarBufs;
289 if ( p->vFlopNums )
290 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
291 // create the PIs
293 // duplicate internal nodes
294 Aig_ManForEachObj( p, pObj, i )
295 {
296 if ( Aig_ObjIsBuf(pObj) )
297 {
298 pObjNew = Aig_ObjChild0Copy(pObj);
299 }
300 else if ( Aig_ObjIsNode(pObj) )
301 {
302 pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
303 }
304 else if ( Aig_ObjIsCi(pObj) )
305 {
306 pObjNew = Aig_ObjCreateCi( pNew );
307 pObjNew->Level = pObj->Level;
308 }
309 else if ( Aig_ObjIsCo(pObj) )
310 {
311 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
312 }
313 else if ( Aig_ObjIsConst1(pObj) )
314 {
315 pObjNew = Aig_ManConst1(pNew);
316 }
317 else
318 assert( 0 );
319 pObj->pData = pObjNew;
320 }
321 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
322 if ( (nNodes = Aig_ManCleanup( pNew )) )
323 printf( "Aig_ManDupOrdered(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
324 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
325 // duplicate the timing manager
326 if ( p->pManTime )
327 pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
328 // check the resulting network
329 if ( !Aig_ManCheck(pNew) )
330 printf( "Aig_ManDupOrdered(): The check has failed.\n" );
331 return pNew;
332}
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◆ Aig_ManDupOrpos()

Aig_Man_t * Aig_ManDupOrpos ( Aig_Man_t * p,
int fAddRegs )
extern

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1099 of file aigDup.c.

1100{
1101 Aig_Man_t * pNew;
1102 Aig_Obj_t * pObj, * pMiter;
1103 int i;
1104 assert( Aig_ManRegNum(p) > 0 );
1105 if ( p->nConstrs > 0 )
1106 {
1107 printf( "The AIG manager should have no constraints.\n" );
1108 return NULL;
1109 }
1110 // create the new manager
1111 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
1112 pNew->pName = Abc_UtilStrsav( p->pName );
1113 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
1114 // create the PIs
1116 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
1117 Aig_ManForEachCi( p, pObj, i )
1118 pObj->pData = Aig_ObjCreateCi( pNew );
1119 // set registers
1120 pNew->nRegs = fAddRegs? p->nRegs : 0;
1121 pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
1122 pNew->nTruePos = 1;
1123 // duplicate internal nodes
1124 Aig_ManForEachNode( p, pObj, i )
1125 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1126 // create the PO
1127 pMiter = Aig_ManConst0(pNew);
1128 Aig_ManForEachPoSeq( p, pObj, i )
1129 pMiter = Aig_Or( pNew, pMiter, Aig_ObjChild0Copy(pObj) );
1130 Aig_ObjCreateCo( pNew, pMiter );
1131 // create register inputs with MUXes
1132 if ( fAddRegs )
1133 {
1134 Aig_ManForEachLiSeq( p, pObj, i )
1135 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1136 }
1137 Aig_ManCleanup( pNew );
1138 return pNew;
1139}
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◆ Aig_ManDupRepr()

Aig_Man_t * Aig_ManDupRepr ( Aig_Man_t * p,
int fOrdered )
extern

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 267 of file aigRepr.c.

268{
269 Aig_Man_t * pNew;
270 Aig_Obj_t * pObj;
271 int i;
272 // start the HOP package
273 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
274 pNew->pName = Abc_UtilStrsav( p->pName );
275 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
276 pNew->nConstrs = p->nConstrs;
277 pNew->nBarBufs = p->nBarBufs;
278 if ( p->vFlopNums )
279 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
280 // map the const and primary inputs
282 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
283 Aig_ManForEachCi( p, pObj, i )
284 pObj->pData = Aig_ObjCreateCi(pNew);
285// Aig_ManForEachCi( p, pObj, i )
286// pObj->pData = Aig_ObjGetRepr( p, pObj );
287 // map the internal nodes
288 if ( fOrdered )
289 {
290 Aig_ManForEachNode( p, pObj, i )
291 pObj->pData = Aig_And( pNew, Aig_ObjChild0Repr(p, pObj), Aig_ObjChild1Repr(p, pObj) );
292 }
293 else
294 {
295// Aig_ManForEachObj( p, pObj, i )
296// if ( p->pReprs[i] )
297// printf( "Substituting %d for %d.\n", p->pReprs[i]->Id, pObj->Id );
298
299 Aig_ManForEachCo( p, pObj, i )
300 Aig_ManDupRepr_rec( pNew, p, Aig_ObjFanin0(pObj) );
301 }
302 // transfer the POs
303 Aig_ManForEachCo( p, pObj, i )
304 Aig_ObjCreateCo( pNew, Aig_ObjChild0Repr(p, pObj) );
305 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
306 // check the new manager
307 if ( !Aig_ManCheck(pNew) )
308 printf( "Aig_ManDupRepr: Check has failed.\n" );
309 return pNew;
310}
Aig_Obj_t * Aig_ManDupRepr_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigRepr.c:241
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◆ Aig_ManDupReprBasic()

Aig_Man_t * Aig_ManDupReprBasic ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates AIG with representatives without removing registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 323 of file aigRepr.c.

324{
325 Aig_Man_t * pNew;
326 Aig_Obj_t * pObj;
327 int i;
328 assert( p->pReprs != NULL );
329 // reconstruct AIG with representatives
330 pNew = Aig_ManDupRepr( p, 0 );
331 // perfrom sequential cleanup but do not remove registers
333 // remove pointers to the dead nodes
334 Aig_ManForEachObj( p, pObj, i )
335 if ( pObj->pData && Aig_ObjIsNone((Aig_Obj_t *)pObj->pData) )
336 pObj->pData = NULL;
337 return pNew;
338}
Aig_Man_t * Aig_ManDupRepr(Aig_Man_t *p, int fOrdered)
Definition aigRepr.c:267
int Aig_ManSeqCleanupBasic(Aig_Man_t *p)
Definition aigScl.c:257
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◆ Aig_ManDupRepres()

Aig_Man_t * Aig_ManDupRepres ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 920 of file aigDup.c.

921{
922 Aig_Man_t * pNew;
923 Aig_Obj_t * pObj = NULL;
924 int i;
925 // start the HOP package
926 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
927 pNew->pName = Abc_UtilStrsav( p->pName );
928 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
929 pNew->nConstrs = p->nConstrs;
930 pNew->nBarBufs = p->nBarBufs;
931 if ( p->vFlopNums )
932 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
933 // map the const and primary inputs
935 Aig_ManForEachObj( p, pObj, i )
936 {
937 if ( Aig_ObjIsNode(pObj) )
938 pObj->pData = Aig_And( pNew, Aig_ObjChild0Repres(p, pObj), Aig_ObjChild1Repres(p, pObj) );
939 else if ( Aig_ObjIsCi(pObj) )
940 {
941 pObj->pData = Aig_ObjCreateCi(pNew);
942 pObj->pData = Aig_ObjGetRepres( p, pObj );
943 }
944 else if ( Aig_ObjIsCo(pObj) )
945 pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
946 else if ( Aig_ObjIsConst1(pObj) )
947 pObj->pData = Aig_ManConst1(pNew);
948 else
949 assert( 0 );
950 }
951 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
952 // check the new manager
953 if ( !Aig_ManCheck(pNew) )
954 printf( "Aig_ManDupRepres: Check has failed.\n" );
955 return pNew;
956}
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◆ Aig_ManDupRepresDfs()

Aig_Man_t * Aig_ManDupRepresDfs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 995 of file aigDup.c.

996{
997 Aig_Man_t * pNew;
998 Aig_Obj_t * pObj = NULL;
999 int i;
1000 // start the HOP package
1001 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
1002 pNew->pName = Abc_UtilStrsav( p->pName );
1003 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
1004 pNew->nConstrs = p->nConstrs;
1005 pNew->nBarBufs = p->nBarBufs;
1006 if ( p->vFlopNums )
1007 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
1008 // map the const and primary inputs
1010 Aig_ManForEachObj( p, pObj, i )
1011 {
1012 if ( Aig_ObjIsNode(pObj) )
1013 continue;
1014 if ( Aig_ObjIsCi(pObj) )
1015 pObj->pData = Aig_ObjCreateCi(pNew);
1016 else if ( Aig_ObjIsCo(pObj) )
1017 {
1018 Aig_ManDupRepres_rec( pNew, p, Aig_ObjFanin0(pObj) );
1019 pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Repres(p, pObj) );
1020 }
1021 else if ( Aig_ObjIsConst1(pObj) )
1022 pObj->pData = Aig_ManConst1(pNew);
1023 else
1024 assert( 0 );
1025 }
1026 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
1027 // check the new manager
1028 if ( !Aig_ManCheck(pNew) )
1029 printf( "Aig_ManDupRepresDfs: Check has failed.\n" );
1030 return pNew;
1031}
Aig_Obj_t * Aig_ManDupRepres_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigDup.c:969
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◆ Aig_ManDupSimple()

Aig_Man_t * Aig_ManDupSimple ( Aig_Man_t * p)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigDup.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG duplication (re-strashing).]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigDup.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 46 of file aigDup.c.

47{
48 Aig_Man_t * pNew;
49 Aig_Obj_t * pObj, * pObjNew = NULL;
50 int i;
51 assert( p->pManTime == NULL );
52 // create the new manager
53 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
54 pNew->pName = Abc_UtilStrsav( p->pName );
55 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
56 pNew->nAsserts = p->nAsserts;
57 pNew->nConstrs = p->nConstrs;
58 pNew->nBarBufs = p->nBarBufs;
59 if ( p->vFlopNums )
60 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
61 // create the PIs
63 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
64 Aig_ManForEachCi( p, pObj, i )
65 {
66 pObjNew = Aig_ObjCreateCi( pNew );
67 pObjNew->Level = pObj->Level;
68 pObj->pData = pObjNew;
69 }
70 // duplicate internal nodes
71 Aig_ManForEachObj( p, pObj, i )
72 if ( Aig_ObjIsBuf(pObj) )
73 {
74 pObjNew = Aig_ObjChild0Copy(pObj);
75 pObj->pData = pObjNew;
76 }
77 else if ( Aig_ObjIsNode(pObj) )
78 {
79 pObjNew = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
80 pObj->pData = pObjNew;
81 }
82 // add the POs
83 Aig_ManForEachCo( p, pObj, i )
84 {
85 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
86 pObj->pData = pObjNew;
87 }
88 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
89 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
90 // check the resulting network
91 if ( !Aig_ManCheck(pNew) )
92 printf( "Aig_ManDupSimple(): The check has failed.\n" );
93 return pNew;
94}
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◆ Aig_ManDupSimpleDfs()

Aig_Man_t * Aig_ManDupSimpleDfs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects [This procedure assumes that buffers are not used during HAIG recording. This way, each HAIG node is in one-to-one correspondence with old HAIG node. There is no need to create new nodes, just reassign the pointers. If it were not the case, we would need to create HAIG nodes for each new node duplicated. ]

SeeAlso []

Definition at line 184 of file aigDup.c.

185{
186 Aig_Man_t * pNew;
187 Aig_Obj_t * pObj, * pObjNew = NULL;
188 int i;
189 assert( p->pManTime == NULL );
190 // create the new manager
191 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
192 pNew->pName = Abc_UtilStrsav( p->pName );
193 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
194 pNew->nAsserts = p->nAsserts;
195 pNew->nConstrs = p->nConstrs;
196 pNew->nBarBufs = p->nBarBufs;
197 if ( p->vFlopNums )
198 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
199 // create the PIs
201 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
202 Aig_ManForEachCi( p, pObj, i )
203 {
204 pObjNew = Aig_ObjCreateCi( pNew );
205 pObjNew->Level = pObj->Level;
206 pObj->pData = pObjNew;
207 }
208 // duplicate internal nodes
209 Aig_ManForEachObj( p, pObj, i )
210 if ( !Aig_ObjIsCo(pObj) )
211 {
212 Aig_ManDupSimpleDfs_rec( pNew, p, pObj );
213 assert( pObj->Level == ((Aig_Obj_t*)pObj->pData)->Level );
214 }
215 // add the POs
216 Aig_ManForEachCo( p, pObj, i )
217 {
218 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
219 pObj->pData = pObjNew;
220 }
221 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
222 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
223 // check the resulting network
224 if ( !Aig_ManCheck(pNew) )
225 printf( "Aig_ManDupSimple(): The check has failed.\n" );
226 return pNew;
227}
Aig_Obj_t * Aig_ManDupSimpleDfs_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigDup.c:157
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◆ Aig_ManDupSimpleDfs_rec()

Aig_Obj_t * Aig_ManDupSimpleDfs_rec ( Aig_Man_t * pNew,
Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager recursively.]

Description []

SideEffects []

SeeAlso []

Definition at line 157 of file aigDup.c.

158{
159 if ( pObj->pData )
160 return (Aig_Obj_t *)pObj->pData;
161 Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );
162 if ( Aig_ObjIsBuf(pObj) )
163 return (Aig_Obj_t *)(pObj->pData = Aig_ObjChild0Copy(pObj));
164 Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin1(pObj) );
165 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
166 return (Aig_Obj_t *)pObj->pData;
167}
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◆ Aig_ManDupSimpleDfsPart()

Aig_Man_t * Aig_ManDupSimpleDfsPart ( Aig_Man_t * p,
Vec_Ptr_t * vPis,
Vec_Ptr_t * vPos )
extern

Function*************************************************************

Synopsis [Duplicates part of the AIG manager.]

Description [Orders nodes as follows: PIs, ANDs, POs.]

SideEffects []

SeeAlso []

Definition at line 240 of file aigDup.c.

241{
242 Aig_Man_t * pNew;
243 Aig_Obj_t * pObj, * pObjNew = NULL;
244 int i;
245 // create the new manager
246 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
247 // create the PIs
249 Aig_ManConst1(p)->pData = Aig_ManConst1( pNew );
250 Vec_PtrForEachEntry( Aig_Obj_t *, vPis, pObj, i )
251 pObj->pData = Aig_ObjCreateCi( pNew );
252 // duplicate internal nodes
253 Vec_PtrForEachEntry( Aig_Obj_t *, vPos, pObj, i )
254 {
255 pObjNew = Aig_ManDupSimpleDfs_rec( pNew, p, Aig_ObjFanin0(pObj) );
256 pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObj) );
257 Aig_ObjCreateCo( pNew, pObjNew );
258 }
259 Aig_ManSetRegNum( pNew, 0 );
260 // check the resulting network
261 if ( !Aig_ManCheck(pNew) )
262 printf( "Aig_ManDupSimple(): The check has failed.\n" );
263 return pNew;
264}
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◆ Aig_ManDupSimpleWithHints()

Aig_Man_t * Aig_ManDupSimpleWithHints ( Aig_Man_t * p,
Vec_Int_t * vHints )
extern

Function*************************************************************

Synopsis [Derives AIG with hints.]

Description []

SideEffects []

SeeAlso []

Definition at line 107 of file aigDup.c.

108{
109 Aig_Man_t * pNew;
110 Aig_Obj_t * pObj = NULL;
111 int i, Entry;
112 assert( p->nAsserts == 0 || p->nConstrs == 0 );
113 // create the new manager
114 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
115 pNew->pName = Abc_UtilStrsav( p->pName );
116 // create the PIs
118 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
119 Aig_ManForEachCi( p, pObj, i )
120 {
121 pObj->pData = Aig_ObjCreateCi( pNew );
122 Entry = Vec_IntEntry( vHints, Aig_ObjId(pObj) );
123 if ( Entry == 0 || Entry == 1 )
124 pObj->pData = Aig_NotCond( Aig_ManConst1(pNew), Entry ); // restrict to the complement of constraint!!!
125 }
126 // duplicate internal nodes
127 Aig_ManForEachNode( p, pObj, i )
128 {
129 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
130 Entry = Vec_IntEntry( vHints, Aig_ObjId(pObj) );
131 if ( Entry == 0 || Entry == 1 )
132 pObj->pData = Aig_NotCond( Aig_ManConst1(pNew), Entry ); // restrict to the complement of constraint!!!
133 }
134 // add the POs
135 Aig_ManForEachCo( p, pObj, i )
136 pObj->pData = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
137 Aig_ManCleanup( pNew );
138 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
139 // check the resulting network
140 if ( !Aig_ManCheck(pNew) )
141 printf( "Llb_ManDeriveAigWithHints(): The check has failed.\n" );
142 return pNew;
143}
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◆ Aig_ManDupTrim()

Aig_Man_t * Aig_ManDupTrim ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of the nodes.]

SideEffects []

SeeAlso []

Definition at line 413 of file aigDup.c.

414{
415 Aig_Man_t * pNew;
416 Aig_Obj_t * pObj, * pObjNew = NULL;
417 int i, nNodes;
418 // create the new manager
419 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
420 pNew->pName = Abc_UtilStrsav( p->pName );
421 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
422 pNew->nConstrs = p->nConstrs;
423 pNew->nBarBufs = p->nBarBufs;
424 // create the PIs
426 // duplicate internal nodes
427 Aig_ManForEachObj( p, pObj, i )
428 {
429 if ( Aig_ObjIsNode(pObj) )
430 pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
431 else if ( Aig_ObjIsCi(pObj) )
432 pObjNew = (Aig_ObjRefs(pObj) > 0 || Saig_ObjIsLo(p, pObj)) ? Aig_ObjCreateCi(pNew) : NULL;
433 else if ( Aig_ObjIsCo(pObj) )
434 pObjNew = Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
435 else if ( Aig_ObjIsConst1(pObj) )
436 pObjNew = Aig_ManConst1(pNew);
437 else
438 assert( 0 );
439 pObj->pData = pObjNew;
440 }
441 assert( Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
442 if ( (nNodes = Aig_ManCleanup( pNew )) )
443 printf( "Aig_ManDupTrim(): Cleanup after AIG duplication removed %d nodes.\n", nNodes );
444 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
445 // check the resulting network
446 if ( !Aig_ManCheck(pNew) )
447 printf( "Aig_ManDupTrim(): The check has failed.\n" );
448 return pNew;
449}
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◆ Aig_ManDupUnsolvedOutputs()

Aig_Man_t * Aig_ManDupUnsolvedOutputs ( Aig_Man_t * p,
int fAddRegs )
extern

Function*************************************************************

Synopsis [Duplicates AIG with only one primary output.]

Description []

SideEffects []

SeeAlso []

Definition at line 1199 of file aigDup.c.

1200{
1201 Aig_Man_t * pNew;
1202 Aig_Obj_t * pObj = NULL;
1203 int i, nOuts = 0;
1204 assert( Aig_ManRegNum(p) > 0 );
1205 if ( p->nConstrs > 0 )
1206 {
1207 printf( "The AIG manager should have no constraints.\n" );
1208 return NULL;
1209 }
1210 // create the new manager
1211 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
1212 pNew->pName = Abc_UtilStrsav( p->pName );
1213 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
1214 // create the PIs
1216 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
1217 Aig_ManForEachCi( p, pObj, i )
1218 pObj->pData = Aig_ObjCreateCi( pNew );
1219 // create the POs
1220 nOuts = 0;
1221 Aig_ManForEachPoSeq( p, pObj, i )
1222 nOuts += ( Aig_ObjFanin0(pObj) != Aig_ManConst1(p) );
1223 // set registers
1224 pNew->nRegs = fAddRegs? p->nRegs : 0;
1225 pNew->nTruePis = fAddRegs? p->nTruePis : p->nTruePis + p->nRegs;
1226 pNew->nTruePos = nOuts;
1227 // duplicate internal nodes
1228 Aig_ManForEachNode( p, pObj, i )
1229 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
1230 // create the PO
1231 Aig_ManForEachPoSeq( p, pObj, i )
1232 if ( Aig_ObjFanin0(pObj) != Aig_ManConst1(p) )
1233 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1234 // create register inputs with MUXes
1235 if ( fAddRegs )
1236 {
1237 Aig_ManForEachLiSeq( p, pObj, i )
1238 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
1239 }
1240 Aig_ManCleanup( pNew );
1241 return pNew;
1242}
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◆ Aig_ManDupWithoutPos()

Aig_Man_t * Aig_ManDupWithoutPos ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [Assumes topological ordering of nodes.]

SideEffects []

SeeAlso []

Definition at line 835 of file aigDup.c.

836{
837 Aig_Man_t * pNew;
838 Aig_Obj_t * pObj = NULL;
839 int i;
840 // create the new manager
841 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
842 pNew->pName = Abc_UtilStrsav( p->pName );
843 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
844 // create the PIs
846 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
847 Aig_ManForEachCi( p, pObj, i )
848 pObj->pData = Aig_ObjCreateCi( pNew );
849 // duplicate internal nodes
850 Aig_ManForEachObj( p, pObj, i )
851 {
852 assert( !Aig_ObjIsBuf(pObj) );
853 if ( Aig_ObjIsNode(pObj) )
854 pObj->pData = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
855 }
856 assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
857 return pNew;
858}
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◆ Aig_ManExtractMiter()

Aig_Man_t * Aig_ManExtractMiter ( Aig_Man_t * p,
Aig_Obj_t * pNode1,
Aig_Obj_t * pNode2 )
extern

Function*************************************************************

Synopsis [Extracts the miter composed of XOR of the two nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 147 of file aigMan.c.

148{
149 Aig_Man_t * pNew;
150 Aig_Obj_t * pObj;
151 int i;
152 // create the new manager
153 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
154 pNew->pName = Abc_UtilStrsav( p->pName );
155 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
156 // create the PIs
158 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
159 Aig_ManForEachCi( p, pObj, i )
160 pObj->pData = Aig_ObjCreateCi(pNew);
161 // dump the nodes
162 Aig_ManDup_rec( pNew, p, pNode1 );
163 Aig_ManDup_rec( pNew, p, pNode2 );
164 // construct the EXOR
165 pObj = Aig_Exor( pNew, (Aig_Obj_t *)pNode1->pData, (Aig_Obj_t *)pNode2->pData );
166 pObj = Aig_NotCond( pObj, Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) );
167 // add the PO
168 Aig_ObjCreateCo( pNew, pObj );
169 // check the resulting network
170 if ( !Aig_ManCheck(pNew) )
171 printf( "Aig_ManExtractMiter(): The check has failed.\n" );
172 return pNew;
173}
Aig_Obj_t * Aig_ManDup_rec(Aig_Man_t *pNew, Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigMan.c:123
ABC_NAMESPACE_IMPL_START Aig_Man_t * Aig_ManStart(int nNodesMax)
DECLARATIONS ///.
Definition aigMan.c:47
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◆ Aig_ManFanoutStart()

void Aig_ManFanoutStart ( Aig_Man_t * p)
extern

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Create fanout for all objects in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 56 of file aigFanout.c.

57{
58 Aig_Obj_t * pObj;
59 int i;
60 assert( Aig_ManBufNum(p) == 0 );
61 // allocate fanout datastructure
62 assert( p->pFanData == NULL );
63 p->nFansAlloc = 2 * Aig_ManObjNumMax(p);
64 if ( p->nFansAlloc < (1<<12) )
65 p->nFansAlloc = (1<<12);
66 p->pFanData = ABC_ALLOC( int, 5 * p->nFansAlloc );
67 memset( p->pFanData, 0, sizeof(int) * 5 * p->nFansAlloc );
68 // add fanouts for all objects
69 Aig_ManForEachObj( p, pObj, i )
70 {
71 if ( Aig_ObjChild0(pObj) )
72 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
73 if ( Aig_ObjChild1(pObj) )
74 Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj );
75 }
76}
void Aig_ObjAddFanout(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFanout)
Definition aigFanout.c:107
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◆ Aig_ManFanoutStop()

void Aig_ManFanoutStop ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Deletes fanout for all objects in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 89 of file aigFanout.c.

90{
91 assert( p->pFanData != NULL );
92 ABC_FREE( p->pFanData );
93 p->nFansAlloc = 0;
94}
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◆ Aig_ManFindCut()

void Aig_ManFindCut ( Aig_Obj_t * pRoot,
Vec_Ptr_t * vFront,
Vec_Ptr_t * vVisited,
int nSizeLimit,
int nFanoutLimit )
extern

Function*************************************************************

Synopsis [Computes one sequential cut of the given size.]

Description []

SideEffects []

SeeAlso []

Definition at line 145 of file aigWin.c.

146{
147 Aig_Obj_t * pNode;
148 int i;
149
150 assert( !Aig_IsComplement(pRoot) );
151 assert( Aig_ObjIsNode(pRoot) );
152 assert( Aig_ObjChild0(pRoot) );
153 assert( Aig_ObjChild1(pRoot) );
154
155 // start the cut
156 Vec_PtrClear( vFront );
157 Vec_PtrPush( vFront, Aig_ObjFanin0(pRoot) );
158 Vec_PtrPush( vFront, Aig_ObjFanin1(pRoot) );
159
160 // start the visited nodes
161 Vec_PtrClear( vVisited );
162 Vec_PtrPush( vVisited, pRoot );
163 Vec_PtrPush( vVisited, Aig_ObjFanin0(pRoot) );
164 Vec_PtrPush( vVisited, Aig_ObjFanin1(pRoot) );
165
166 // mark these nodes
167 assert( !pRoot->fMarkA );
168 assert( !Aig_ObjFanin0(pRoot)->fMarkA );
169 assert( !Aig_ObjFanin1(pRoot)->fMarkA );
170 pRoot->fMarkA = 1;
171 Aig_ObjFanin0(pRoot)->fMarkA = 1;
172 Aig_ObjFanin1(pRoot)->fMarkA = 1;
173
174 // compute the cut
175 while ( Aig_ManFindCut_int( vFront, vVisited, nSizeLimit, nFanoutLimit ) );
176 assert( Vec_PtrSize(vFront) <= nSizeLimit );
177
178 // clean the visit markings
179 Vec_PtrForEachEntry( Aig_Obj_t *, vVisited, pNode, i )
180 pNode->fMarkA = 0;
181}
int Aig_ManFindCut_int(Vec_Ptr_t *vFront, Vec_Ptr_t *vVisited, int nSizeLimit, int nFanoutLimit)
Definition aigWin.c:80
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◆ Aig_ManFlipFirstPo()

void Aig_ManFlipFirstPo ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 457 of file aigMan.c.

458{
459 Aig_ObjChild0Flip( Aig_ManCo(p, 0) );
460}
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◆ Aig_ManFraigPartitioned()

Aig_Man_t * Aig_ManFraigPartitioned ( Aig_Man_t * pAig,
int nPartSize,
int nConfMax,
int nLevelMax,
int fVerbose )
extern

Function*************************************************************

Synopsis [Performs partitioned choice computation.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1379 of file aigPart.c.

1380{
1381// extern Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax );
1382
1383 Aig_Man_t * pAigPart, * pAigTemp;
1384 Vec_Int_t * vPart;
1385 Vec_Ptr_t * vParts;
1386 Aig_Obj_t * pObj;
1387 void ** ppData;
1388 int i, k;
1389
1390 // partition the outputs of the AIG
1391 vParts = Aig_ManPartitionNaive( pAig, nPartSize );
1392
1393 // start the equivalence classes
1394 Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
1395
1396 // set the PI numbers
1397 Aig_ManSetCioIds( pAig );
1398
1399 // create the total fraiged AIG
1400 Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
1401 {
1402 // derive the partition AIG
1403 pAigPart = Aig_ManDupPartAll( pAig, vPart );
1404 // store contents of pData pointers
1405 ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
1406 Aig_ManForEachObj( pAigPart, pObj, k )
1407 ppData[k] = pObj->pData;
1408 // report the process
1409 if ( fVerbose )
1410 printf( "Part %4d (out of %4d) PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r",
1411 i+1, Vec_PtrSize(vParts), Aig_ManCiNum(pAigPart), Aig_ManCoNum(pAigPart),
1412 Aig_ManNodeNum(pAigPart), Aig_ManLevelNum(pAigPart) );
1413 // compute equivalence classes (to be stored in pNew->pReprs)
1414 pAigTemp = Fra_FraigChoice( pAigPart, nConfMax, nLevelMax );
1415 Aig_ManStop( pAigTemp );
1416 // reset the pData pointers
1417 Aig_ManForEachObj( pAigPart, pObj, k )
1418 pObj->pData = ppData[k];
1419 ABC_FREE( ppData );
1420 // transfer representatives to the total AIG
1421 if ( pAigPart->pReprs )
1422 Aig_ManTransferRepr( pAig, pAigPart );
1423 Aig_ManStop( pAigPart );
1424 }
1425 if ( fVerbose )
1426 printf( " \r" );
1427 Vec_VecFree( (Vec_Vec_t *)vParts );
1428
1429 // clear the PI numbers
1430 Aig_ManCleanCioIds( pAig );
1431
1432 // derive the result of choicing
1433 return Aig_ManDupRepr( pAig, 0 );
1434}
Aig_Man_t * Aig_ManDupPartAll(Aig_Man_t *pOld, Vec_Int_t *vPart)
Definition aigPart.c:1098
Vec_Ptr_t * Aig_ManPartitionNaive(Aig_Man_t *p, int nPartSize)
Definition aigPart.c:941
Aig_Man_t * Aig_ManDupRepr(Aig_Man_t *p, int fOrdered)
Definition aigRepr.c:267
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◆ Aig_ManFrames()

Aig_Man_t * Aig_ManFrames ( Aig_Man_t * pAig,
int nFs,
int fInit,
int fOuts,
int fRegs,
int fEnlarge,
Aig_Obj_t *** ppObjMap )
extern

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Performs timeframe expansion of the AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 51 of file aigFrames.c.

52{
53 Aig_Man_t * pFrames;
54 Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pObjNew;
55 Aig_Obj_t ** pObjMap;
56 int i, f;
57
58 // create mapping for the frames nodes
59 pObjMap = ABC_ALLOC( Aig_Obj_t *, nFs * Aig_ManObjNumMax(pAig) );
60 memset( pObjMap, 0, sizeof(Aig_Obj_t *) * nFs * Aig_ManObjNumMax(pAig) );
61
62 // start the fraig package
63 pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFs );
64 pFrames->pName = Abc_UtilStrsav( pAig->pName );
65 pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
66 // map constant nodes
67 for ( f = 0; f < nFs; f++ )
68 Aig_ObjSetFrames( pObjMap, nFs, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
69 // create PI nodes for the frames
70 for ( f = 0; f < nFs; f++ )
71 Aig_ManForEachPiSeq( pAig, pObj, i )
72 Aig_ObjSetFrames( pObjMap, nFs, pObj, f, Aig_ObjCreateCi(pFrames) );
73 // set initial state for the latches
74 if ( fInit )
75 {
76 Aig_ManForEachLoSeq( pAig, pObj, i )
77 Aig_ObjSetFrames( pObjMap, nFs, pObj, 0, Aig_ManConst0(pFrames) );
78 }
79 else
80 {
81 Aig_ManForEachLoSeq( pAig, pObj, i )
82 Aig_ObjSetFrames( pObjMap, nFs, pObj, 0, Aig_ObjCreateCi(pFrames) );
83 }
84
85 // add timeframes
86 for ( f = 0; f < nFs; f++ )
87 {
88// printf( "Frame = %d.\n", f );
89 // add internal nodes of this frame
90 Aig_ManForEachNode( pAig, pObj, i )
91 {
92// Aig_Obj_t * pFanin0 = Aig_ObjChild0Frames(pObjMap,nFs,pObj,f);
93// Aig_Obj_t * pFanin1 = Aig_ObjChild1Frames(pObjMap,nFs,pObj,f);
94// printf( "Node = %3d. Fanin0 = %3d. Fanin1 = %3d.\n", pObj->Id, Aig_Regular(pFanin0)->Id, Aig_Regular(pFanin1)->Id );
95 pObjNew = Aig_And( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,f), Aig_ObjChild1Frames(pObjMap,nFs,pObj,f) );
96 Aig_ObjSetFrames( pObjMap, nFs, pObj, f, pObjNew );
97 }
98 // set the latch inputs and copy them into the latch outputs of the next frame
99 Aig_ManForEachLiLoSeq( pAig, pObjLi, pObjLo, i )
100 {
101 pObjNew = Aig_ObjChild0Frames(pObjMap,nFs,pObjLi,f);
102 if ( f < nFs - 1 )
103 Aig_ObjSetFrames( pObjMap, nFs, pObjLo, f+1, pObjNew );
104 }
105 }
106 if ( fOuts )
107 {
108 for ( f = fEnlarge?nFs-1:0; f < nFs; f++ )
109 Aig_ManForEachPoSeq( pAig, pObj, i )
110 {
111 pObjNew = Aig_ObjCreateCo( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,f) );
112 Aig_ObjSetFrames( pObjMap, nFs, pObj, f, pObjNew );
113 }
114 }
115 if ( fRegs )
116 {
117 pFrames->nRegs = pAig->nRegs;
118 Aig_ManForEachLiSeq( pAig, pObj, i )
119 {
120 pObjNew = Aig_ObjCreateCo( pFrames, Aig_ObjChild0Frames(pObjMap,nFs,pObj,fEnlarge?0:nFs-1) );
121 Aig_ObjSetFrames( pObjMap, nFs, pObj, nFs-1, pObjNew );
122 }
123 Aig_ManSetRegNum( pFrames, Aig_ManRegNum(pAig) );
124 }
125 Aig_ManCleanup( pFrames );
126 // return the new manager
127 if ( ppObjMap )
128 *ppObjMap = pObjMap;
129 else
130 ABC_FREE( pObjMap );
131 return pFrames;
132}
#define Aig_ManForEachLoSeq(p, pObj, i)
Definition aig.h:441
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◆ Aig_ManHasNoGaps()

int Aig_ManHasNoGaps ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Make sure AIG has not gaps in the numeric order.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigUtil.c.

87{
88 return (int)(Aig_ManObjNum(p) == Aig_ManCiNum(p) + Aig_ManCoNum(p) + Aig_ManNodeNum(p) + 1);
89}

◆ Aig_ManIncrementTravId()

void Aig_ManIncrementTravId ( Aig_Man_t * p)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigUtil.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Various procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigUtil.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Increments the current traversal ID of the network.]

Description []

SideEffects []

SeeAlso []

Definition at line 44 of file aigUtil.c.

45{
46 if ( p->nTravIds >= (1<<30)-1 )
48 p->nTravIds++;
49}
void Aig_ManCleanData(Aig_Man_t *p)
Definition aigUtil.c:205
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◆ Aig_ManInvertConstraints()

void Aig_ManInvertConstraints ( Aig_Man_t * pAig)
extern

Function*************************************************************

Synopsis [Complements the constraint outputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 1561 of file aigUtil.c.

1562{
1563 Aig_Obj_t * pObj;
1564 int i;
1565 if ( Aig_ManConstrNum(pAig) == 0 )
1566 return;
1567 Saig_ManForEachPo( pAig, pObj, i )
1568 {
1569 if ( i >= Saig_ManPoNum(pAig) - Aig_ManConstrNum(pAig) )
1570 Aig_ObjChild0Flip( pObj );
1571 }
1572}
#define Saig_ManForEachPo(p, pObj, i)
Definition saig.h:93
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◆ Aig_ManLevelize()

Vec_Vec_t * Aig_ManLevelize ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Levelizes the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 321 of file aigDfs.c.

322{
323 Aig_Obj_t * pObj;
324 Vec_Vec_t * vLevels;
325 int nLevels, i;
326 nLevels = Aig_ManLevelNum( p );
327 vLevels = Vec_VecStart( nLevels + 1 );
328 Aig_ManForEachObj( p, pObj, i )
329 {
330 assert( (int)pObj->Level <= nLevels );
331 Vec_VecPush( vLevels, pObj->Level, pObj );
332 }
333 return vLevels;
334}
int Aig_ManLevelNum(Aig_Man_t *p)
Definition aigDfs.c:500
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◆ Aig_ManLevelNum()

int Aig_ManLevelNum ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Computes the max number of levels in the manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 500 of file aigDfs.c.

501{
502 Aig_Obj_t * pObj;
503 int i, LevelsMax;
504 LevelsMax = 0;
505 Aig_ManForEachCo( p, pObj, i )
506 LevelsMax = Abc_MaxInt( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
507 return LevelsMax;
508}
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◆ Aig_ManLevels()

int Aig_ManLevels ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Collect the latches.]

Description []

SideEffects []

SeeAlso []

Definition at line 102 of file aigUtil.c.

103{
104 Aig_Obj_t * pObj;
105 int i, LevelMax = 0;
106 Aig_ManForEachCo( p, pObj, i )
107 LevelMax = Abc_MaxInt( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
108 return LevelMax;
109}
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◆ Aig_ManMarkValidChoices()

void Aig_ManMarkValidChoices ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Marks the nodes that are Creates choices.]

Description [The input AIG is assumed to have representatives assigned.]

SideEffects []

SeeAlso []

Definition at line 481 of file aigRepr.c.

482{
483 Aig_Obj_t * pObj, * pRepr;
484 int i;
485 assert( p->pReprs != NULL );
486 // create equivalent nodes in the manager
487 assert( p->pEquivs == NULL );
488 p->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
489 memset( p->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
490 // make the choice nodes
491 Aig_ManForEachNode( p, pObj, i )
492 {
493 pRepr = Aig_ObjFindRepr( p, pObj );
494 if ( pRepr == NULL )
495 continue;
496 // skip constant and PI classes
497 if ( !Aig_ObjIsNode(pRepr) )
498 {
499 Aig_ObjClearRepr( p, pObj );
500 continue;
501 }
502 // skip choices with combinatinal loops
503 if ( Aig_ObjCheckTfi( p, pObj, pRepr ) )
504 {
505 Aig_ObjClearRepr( p, pObj );
506 continue;
507 }
508//printf( "Node %d is represented by node %d.\n", pObj->Id, pRepr->Id );
509 // add choice to the choice node
510 if ( pObj->nRefs > 0 )
511 {
512 Aig_ObjClearRepr( p, pObj );
513 continue;
514 }
515 assert( pObj->nRefs == 0 );
516 p->pEquivs[pObj->Id] = p->pEquivs[pRepr->Id];
517 p->pEquivs[pRepr->Id] = pObj;
518 }
519}
int Aig_ObjCheckTfi(Aig_Man_t *p, Aig_Obj_t *pNew, Aig_Obj_t *pOld)
Definition aigRepr.c:435
unsigned int nRefs
Definition aig.h:81
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◆ Aig_ManMiterPartitioned()

Vec_Ptr_t * Aig_ManMiterPartitioned ( Aig_Man_t * p1,
Aig_Man_t * p2,
int nPartSize,
int fSmart )
extern

Function*************************************************************

Synopsis [Create partitioned miter of the two AIGs.]

Description [Assumes that each output in the second AIG cannot have more supp vars than the same output in the first AIG.]

SideEffects []

SeeAlso []

Definition at line 1189 of file aigPart.c.

1190{
1191 Aig_Man_t * pNew;
1192 Aig_Obj_t * pMiter;
1193 Vec_Ptr_t * vMiters, * vNodes1, * vNodes2;
1194 Vec_Ptr_t * vParts, * vPartSupps;
1195 Vec_Int_t * vPart, * vPartSupp;
1196 int i, k;
1197 // partition the first manager
1198 if ( fSmart )
1199 vParts = Aig_ManPartitionSmart( p1, nPartSize, 0, &vPartSupps );
1200 else
1201 {
1202 vParts = Aig_ManPartitionNaive( p1, nPartSize );
1203 vPartSupps = Aig_ManSupportNodes( p1, vParts );
1204 }
1205 // derive miters
1206 vMiters = Vec_PtrAlloc( Vec_PtrSize(vParts) );
1207 for ( i = 0; i < Vec_PtrSize(vParts); i++ )
1208 {
1209 // get partition and its support
1210 vPart = (Vec_Int_t *)Vec_PtrEntry( vParts, i );
1211 vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSupps, i );
1212 // create the new miter
1213 pNew = Aig_ManStart( 1000 );
1214 // create the PIs
1215 for ( k = 0; k < Vec_IntSize(vPartSupp); k++ )
1216 Aig_ObjCreateCi( pNew );
1217 // copy the components
1218 vNodes1 = Aig_ManDupPart( pNew, p1, vPart, vPartSupp, 0 );
1219 vNodes2 = Aig_ManDupPart( pNew, p2, vPart, vPartSupp, 0 );
1220 // create the miter
1221 pMiter = Aig_MiterTwo( pNew, vNodes1, vNodes2 );
1222 Vec_PtrFree( vNodes1 );
1223 Vec_PtrFree( vNodes2 );
1224 // create the output
1225 Aig_ObjCreateCo( pNew, pMiter );
1226 // clean up
1227 Aig_ManCleanup( pNew );
1228 Vec_PtrPush( vMiters, pNew );
1229 }
1230 Vec_VecFree( (Vec_Vec_t *)vParts );
1231 Vec_VecFree( (Vec_Vec_t *)vPartSupps );
1232 return vMiters;
1233}
Vec_Ptr_t * Aig_ManSupportNodes(Aig_Man_t *p, Vec_Ptr_t *vParts)
Definition aigPart.c:1156
Aig_Obj_t * Aig_MiterTwo(Aig_Man_t *p, Vec_Ptr_t *vNodes1, Vec_Ptr_t *vNodes2)
Definition aigOper.c:453
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◆ Aig_ManMuxesCollect()

Vec_Ptr_t * Aig_ManMuxesCollect ( Aig_Man_t * pAig)
extern

Function*************************************************************

Synopsis [Collects muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1478 of file aigUtil.c.

1479{
1480 Vec_Ptr_t * vMuxes;
1481 Aig_Obj_t * pObj;
1482 int i;
1483 vMuxes = Vec_PtrAlloc( 100 );
1484 Aig_ManForEachNode( pAig, pObj, i )
1485 if ( Aig_ObjIsMuxType(pObj) )
1486 Vec_PtrPush( vMuxes, pObj );
1487 return vMuxes;
1488}
int Aig_ObjIsMuxType(Aig_Obj_t *pNode)
Definition aigUtil.c:307
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◆ Aig_ManMuxesDeref()

void Aig_ManMuxesDeref ( Aig_Man_t * pAig,
Vec_Ptr_t * vMuxes )
extern

Function*************************************************************

Synopsis [Dereferences muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1501 of file aigUtil.c.

1502{
1503 Aig_Obj_t * pObj, * pNodeT, * pNodeE, * pNodeC;
1504 int i;
1505 Vec_PtrForEachEntry( Aig_Obj_t *, vMuxes, pObj, i )
1506 {
1507 if ( Aig_ObjRecognizeExor( pObj, &pNodeT, &pNodeE ) )
1508 {
1509 pNodeT->nRefs--;
1510 pNodeE->nRefs--;
1511 }
1512 else
1513 {
1514 pNodeC = Aig_ObjRecognizeMux( pObj, &pNodeT, &pNodeE );
1515 pNodeC->nRefs--;
1516 }
1517 }
1518}
int Aig_ObjRecognizeExor(Aig_Obj_t *pObj, Aig_Obj_t **ppFan0, Aig_Obj_t **ppFan1)
Definition aigUtil.c:343
Aig_Obj_t * Aig_ObjRecognizeMux(Aig_Obj_t *pNode, Aig_Obj_t **ppNodeT, Aig_Obj_t **ppNodeE)
Definition aigUtil.c:387
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◆ Aig_ManMuxesRef()

void Aig_ManMuxesRef ( Aig_Man_t * pAig,
Vec_Ptr_t * vMuxes )
extern

Function*************************************************************

Synopsis [References muxes.]

Description []

SideEffects []

SeeAlso []

Definition at line 1531 of file aigUtil.c.

1532{
1533 Aig_Obj_t * pObj, * pNodeT, * pNodeE, * pNodeC;
1534 int i;
1535 Vec_PtrForEachEntry( Aig_Obj_t *, vMuxes, pObj, i )
1536 {
1537 if ( Aig_ObjRecognizeExor( pObj, &pNodeT, &pNodeE ) )
1538 {
1539 pNodeT->nRefs++;
1540 pNodeE->nRefs++;
1541 }
1542 else
1543 {
1544 pNodeC = Aig_ObjRecognizeMux( pObj, &pNodeT, &pNodeE );
1545 pNodeC->nRefs++;
1546 }
1547 }
1548}
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◆ Aig_ManOrderPios()

Vec_Ptr_t * Aig_ManOrderPios ( Aig_Man_t * p,
Aig_Man_t * pOrder )
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description [This duplicator works for AIGs with choices.]

SideEffects []

SeeAlso []

Definition at line 626 of file aigDup.c.

627{
628 Vec_Ptr_t * vPios;
629 Aig_Obj_t * pObj = NULL;
630 int i;
631 assert( Aig_ManCiNum(p) == Aig_ManCiNum(pOrder) );
632 assert( Aig_ManCoNum(p) == Aig_ManCoNum(pOrder) );
633 Aig_ManSetCioIds( pOrder );
634 vPios = Vec_PtrAlloc( Aig_ManCiNum(p) + Aig_ManCoNum(p) );
635 Aig_ManForEachObj( pOrder, pObj, i )
636 {
637 if ( Aig_ObjIsCi(pObj) )
638 Vec_PtrPush( vPios, Aig_ManCi(p, Aig_ObjCioId(pObj)) );
639 else if ( Aig_ObjIsCo(pObj) )
640 Vec_PtrPush( vPios, Aig_ManCo(p, Aig_ObjCioId(pObj)) );
641 }
642 Aig_ManCleanCioIds( pOrder );
643 return vPios;
644}
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◆ Aig_ManOrderStart()

void Aig_ManOrderStart ( Aig_Man_t * p)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigOrder.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Dynamically updated topological order.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigOrder.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Initializes the order datastructure.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigOrder.c.

46{
47 Aig_Obj_t * pObj;
48 int i;
49 assert( Aig_ManBufNum(p) == 0 );
50 // allocate order datastructure
51 assert( p->pOrderData == NULL );
52 p->nOrderAlloc = 2 * Aig_ManObjNumMax(p);
53 if ( p->nOrderAlloc < (1<<12) )
54 p->nOrderAlloc = (1<<12);
55 p->pOrderData = ABC_ALLOC( unsigned, 2 * p->nOrderAlloc );
56 memset( p->pOrderData, 0xFF, sizeof(unsigned) * 2 * p->nOrderAlloc );
57 // add the constant node
58 p->pOrderData[0] = p->pOrderData[1] = 0;
59 p->iPrev = p->iNext = 0;
60 // add the internal nodes
61 Aig_ManForEachNode( p, pObj, i )
62 Aig_ObjOrderInsert( p, pObj->Id );
63}
void Aig_ObjOrderInsert(Aig_Man_t *p, int ObjId)
Definition aigOrder.c:95
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◆ Aig_ManOrderStop()

void Aig_ManOrderStop ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Deletes the order datastructure.]

Description []

SideEffects []

SeeAlso []

Definition at line 76 of file aigOrder.c.

77{
78 assert( p->pOrderData );
79 ABC_FREE( p->pOrderData );
80 p->nOrderAlloc = 0;
81 p->iPrev = p->iNext = 0;
82}

◆ Aig_ManPartDivide()

void Aig_ManPartDivide ( Vec_Ptr_t * vResult,
Vec_Int_t * vDomain,
int nPartSize,
int nOverSize )
extern

Function*************************************************************

Synopsis [Divides a large partition into several ones.]

Description []

SideEffects []

SeeAlso []

Definition at line 513 of file aigPartReg.c.

514{
515 Vec_Int_t * vPart;
516 int i, Counter;
517 assert( nPartSize && Vec_IntSize(vDomain) > nPartSize );
518 if ( nOverSize >= nPartSize )
519 {
520 printf( "Overlap size (%d) is more or equal than the partition size (%d).\n", nOverSize, nPartSize );
521 printf( "Adjusting it to be equal to half of the partition size.\n" );
522 nOverSize = nPartSize/2;
523 }
524 assert( nOverSize < nPartSize );
525 for ( Counter = 0; Counter < Vec_IntSize(vDomain); Counter -= nOverSize )
526 {
527 vPart = Vec_IntAlloc( nPartSize );
528 for ( i = 0; i < nPartSize; i++, Counter++ )
529 if ( Counter < Vec_IntSize(vDomain) )
530 Vec_IntPush( vPart, Vec_IntEntry(vDomain, Counter) );
531 if ( Vec_IntSize(vPart) <= nOverSize )
532 Vec_IntFree(vPart);
533 else
534 Vec_PtrPush( vResult, vPart );
535 }
536}
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◆ Aig_ManPartitionNaive()

Vec_Ptr_t * Aig_ManPartitionNaive ( Aig_Man_t * p,
int nPartSize )
extern

Function*************************************************************

Synopsis [Perform the naive partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 941 of file aigPart.c.

942{
943 Vec_Ptr_t * vParts;
944 Aig_Obj_t * pObj;
945 int nParts, i;
946 nParts = (Aig_ManCoNum(p) / nPartSize) + ((Aig_ManCoNum(p) % nPartSize) > 0);
947 vParts = (Vec_Ptr_t *)Vec_VecStart( nParts );
948 Aig_ManForEachCo( p, pObj, i )
949 Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(vParts, i / nPartSize), i );
950 return vParts;
951}
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◆ Aig_ManPartitionSmart()

Vec_Ptr_t * Aig_ManPartitionSmart ( Aig_Man_t * p,
int nSuppSizeLimit,
int fVerbose,
Vec_Ptr_t ** pvPartSupps )
extern

Function*************************************************************

Synopsis [Perform the smart partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 686 of file aigPart.c.

687{
688 Vec_Ptr_t * vPartSuppsBit;
689 Vec_Ptr_t * vSupports, * vPartsAll, * vPartsAll2, * vPartSuppsAll;//, * vPartPtr;
690 Vec_Int_t * vOne, * vPart, * vPartSupp, * vTemp;
691 int i, iPart, iOut;
692 abctime clk;
693
694 // compute the supports for all outputs
695clk = Abc_Clock();
696 vSupports = Aig_ManSupports( p );
697if ( fVerbose )
698{
699ABC_PRT( "Supps", Abc_Clock() - clk );
700}
701 // start char-based support representation
702 vPartSuppsBit = Vec_PtrAlloc( 1000 );
703
704 // create partitions
705clk = Abc_Clock();
706 vPartsAll = Vec_PtrAlloc( 256 );
707 vPartSuppsAll = Vec_PtrAlloc( 256 );
708 Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
709 {
710 // get the output number
711 iOut = Vec_IntPop(vOne);
712 // find closely matching part
713 iPart = Aig_ManPartitionSmartFindPart( vPartSuppsAll, vPartsAll, vPartSuppsBit, nSuppSizeLimit, vOne );
714 if ( iPart == -1 )
715 {
716 // create new partition
717 vPart = Vec_IntAlloc( 32 );
718 Vec_IntPush( vPart, iOut );
719 // create new partition support
720 vPartSupp = Vec_IntDup( vOne );
721 // add this partition and its support
722 Vec_PtrPush( vPartsAll, vPart );
723 Vec_PtrPush( vPartSuppsAll, vPartSupp );
724
725 Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Aig_ManCiNum(p)) );
726 }
727 else
728 {
729 // add output to this partition
730 vPart = (Vec_Int_t *)Vec_PtrEntry( vPartsAll, iPart );
731 Vec_IntPush( vPart, iOut );
732 // merge supports
733 vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSuppsAll, iPart );
734 vPartSupp = Vec_IntTwoMerge( vTemp = vPartSupp, vOne );
735 Vec_IntFree( vTemp );
736 // reinsert new support
737 Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp );
738
739 Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Aig_ManCiNum(p) );
740 }
741 }
742
743 // stop char-based support representation
744 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsBit, vTemp, i )
745 ABC_FREE( vTemp );
746 Vec_PtrFree( vPartSuppsBit );
747
748//printf( "\n" );
749if ( fVerbose )
750{
751ABC_PRT( "Parts", Abc_Clock() - clk );
752}
753
754clk = Abc_Clock();
755 // reorder partitions in the decreasing order of support sizes
756 // remember partition number in each partition support
757 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
758 Vec_IntPush( vOne, i );
759 // sort the supports in the decreasing order
760 Vec_VecSort( (Vec_Vec_t *)vPartSuppsAll, 1 );
761 // reproduce partitions
762 vPartsAll2 = Vec_PtrAlloc( 256 );
763 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
764 Vec_PtrPush( vPartsAll2, Vec_PtrEntry(vPartsAll, Vec_IntPop(vOne)) );
765 Vec_PtrFree( vPartsAll );
766 vPartsAll = vPartsAll2;
767
768 // compact small partitions
769// Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
770 Aig_ManPartitionCompact( vPartsAll, vPartSuppsAll, nSuppSizeLimit );
771 if ( fVerbose )
772// Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
773 printf( "Created %d partitions.\n", Vec_PtrSize(vPartsAll) );
774
775if ( fVerbose )
776{
777//ABC_PRT( "Comps", Abc_Clock() - clk );
778}
779
780 // cleanup
781 Vec_VecFree( (Vec_Vec_t *)vSupports );
782 if ( pvPartSupps == NULL )
783 Vec_VecFree( (Vec_Vec_t *)vPartSuppsAll );
784 else
785 *pvPartSupps = vPartSuppsAll;
786/*
787 // converts from intergers to nodes
788 Vec_PtrForEachEntry( Vec_Int_t *, vPartsAll, vPart, iPart )
789 {
790 vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
791 Vec_IntForEachEntry( vPart, iOut, i )
792 Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
793 Vec_IntFree( vPart );
794 Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
795 }
796*/
797 return vPartsAll;
798}
int Aig_ManPartitionSmartFindPart(Vec_Ptr_t *vPartSuppsAll, Vec_Ptr_t *vPartsAll, Vec_Ptr_t *vPartSuppsBit, int nSuppSizeLimit, Vec_Int_t *vOne)
Definition aigPart.c:536
unsigned * Aig_ManSuppCharStart(Vec_Int_t *vOne, int nPis)
Definition aigPart.c:470
Vec_Ptr_t * Aig_ManSupports(Aig_Man_t *pMan)
Definition aigPart.c:273
void Aig_ManPartitionCompact(Vec_Ptr_t *vPartsAll, Vec_Ptr_t *vPartSuppsAll, int nSuppSizeLimit)
Definition aigPart.c:614
void Aig_ManSuppCharAdd(unsigned *pBuffer, Vec_Int_t *vOne, int nPis)
Definition aigPart.c:496
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◆ Aig_ManPartitionSmartRegisters()

Vec_Ptr_t * Aig_ManPartitionSmartRegisters ( Aig_Man_t * pAig,
int nSuppSizeLimit,
int fVerbose )
extern

Function*************************************************************

Synopsis [Perform the smart partitioning.]

Description []

SideEffects []

SeeAlso []

Definition at line 811 of file aigPart.c.

812{
813 Vec_Ptr_t * vPartSuppsBit;
814 Vec_Ptr_t * vSupports, * vPartsAll, * vPartsAll2, * vPartSuppsAll;
815 Vec_Int_t * vOne, * vPart, * vPartSupp, * vTemp;
816 int i, iPart, iOut;
817 abctime clk;
818
819 // add output number to each
820clk = Abc_Clock();
821 vSupports = Aig_ManSupportsRegisters( pAig );
822 assert( Vec_PtrSize(vSupports) == Aig_ManRegNum(pAig) );
823 Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
824 Vec_IntPush( vOne, i );
825if ( fVerbose )
826{
827ABC_PRT( "Supps", Abc_Clock() - clk );
828}
829
830 // start char-based support representation
831 vPartSuppsBit = Vec_PtrAlloc( 1000 );
832
833 // create partitions
834clk = Abc_Clock();
835 vPartsAll = Vec_PtrAlloc( 256 );
836 vPartSuppsAll = Vec_PtrAlloc( 256 );
837 Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vOne, i )
838 {
839 // get the output number
840 iOut = Vec_IntPop(vOne);
841 // find closely matching part
842 iPart = Aig_ManPartitionSmartFindPart( vPartSuppsAll, vPartsAll, vPartSuppsBit, nSuppSizeLimit, vOne );
843 if ( iPart == -1 )
844 {
845 // create new partition
846 vPart = Vec_IntAlloc( 32 );
847 Vec_IntPush( vPart, iOut );
848 // create new partition support
849 vPartSupp = Vec_IntDup( vOne );
850 // add this partition and its support
851 Vec_PtrPush( vPartsAll, vPart );
852 Vec_PtrPush( vPartSuppsAll, vPartSupp );
853
854 Vec_PtrPush( vPartSuppsBit, Aig_ManSuppCharStart(vOne, Vec_PtrSize(vSupports)) );
855 }
856 else
857 {
858 // add output to this partition
859 vPart = (Vec_Int_t *)Vec_PtrEntry( vPartsAll, iPart );
860 Vec_IntPush( vPart, iOut );
861 // merge supports
862 vPartSupp = (Vec_Int_t *)Vec_PtrEntry( vPartSuppsAll, iPart );
863 vPartSupp = Vec_IntTwoMerge( vTemp = vPartSupp, vOne );
864 Vec_IntFree( vTemp );
865 // reinsert new support
866 Vec_PtrWriteEntry( vPartSuppsAll, iPart, vPartSupp );
867
868 Aig_ManSuppCharAdd( (unsigned *)Vec_PtrEntry(vPartSuppsBit, iPart), vOne, Vec_PtrSize(vSupports) );
869 }
870 }
871
872 // stop char-based support representation
873 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsBit, vTemp, i )
874 ABC_FREE( vTemp );
875 Vec_PtrFree( vPartSuppsBit );
876
877//printf( "\n" );
878if ( fVerbose )
879{
880ABC_PRT( "Parts", Abc_Clock() - clk );
881}
882
883clk = Abc_Clock();
884 // reorder partitions in the decreasing order of support sizes
885 // remember partition number in each partition support
886 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
887 Vec_IntPush( vOne, i );
888 // sort the supports in the decreasing order
889 Vec_VecSort( (Vec_Vec_t *)vPartSuppsAll, 1 );
890 // reproduce partitions
891 vPartsAll2 = Vec_PtrAlloc( 256 );
892 Vec_PtrForEachEntry( Vec_Int_t *, vPartSuppsAll, vOne, i )
893 Vec_PtrPush( vPartsAll2, Vec_PtrEntry(vPartsAll, Vec_IntPop(vOne)) );
894 Vec_PtrFree( vPartsAll );
895 vPartsAll = vPartsAll2;
896
897 // compact small partitions
898// Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
899 Aig_ManPartitionCompact( vPartsAll, vPartSuppsAll, nSuppSizeLimit );
900 if ( fVerbose )
901// Aig_ManPartitionPrint( p, vPartsAll, vPartSuppsAll );
902 printf( "Created %d partitions.\n", Vec_PtrSize(vPartsAll) );
903
904if ( fVerbose )
905{
906//ABC_PRT( "Comps", Abc_Clock() - clk );
907}
908
909 // cleanup
910 Vec_VecFree( (Vec_Vec_t *)vSupports );
911// if ( pvPartSupps == NULL )
912 Vec_VecFree( (Vec_Vec_t *)vPartSuppsAll );
913// else
914// *pvPartSupps = vPartSuppsAll;
915
916/*
917 // converts from intergers to nodes
918 Vec_PtrForEachEntry( Vec_Int_t *, vPartsAll, vPart, iPart )
919 {
920 vPartPtr = Vec_PtrAlloc( Vec_IntSize(vPart) );
921 Vec_IntForEachEntry( vPart, iOut, i )
922 Vec_PtrPush( vPartPtr, Aig_ManCo(p, iOut) );
923 Vec_IntFree( vPart );
924 Vec_PtrWriteEntry( vPartsAll, iPart, vPartPtr );
925 }
926*/
927 return vPartsAll;
928}
Vec_Ptr_t * Aig_ManSupportsRegisters(Aig_Man_t *p)
Definition aigPart.c:418
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◆ Aig_ManPrintStats()

void Aig_ManPrintStats ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 379 of file aigMan.c.

380{
381 int nChoices = Aig_ManChoiceNum(p);
382 printf( "%-15s : ", p->pName );
383 printf( "pi = %5d ", Aig_ManCiNum(p)-Aig_ManRegNum(p) );
384 printf( "po = %5d ", Aig_ManCoNum(p)-Aig_ManRegNum(p) );
385 if ( Aig_ManRegNum(p) )
386 printf( "lat = %5d ", Aig_ManRegNum(p) );
387 printf( "and = %7d ", Aig_ManAndNum(p) );
388// printf( "Eq = %7d ", Aig_ManHaigCounter(p) );
389 if ( Aig_ManExorNum(p) )
390 printf( "xor = %5d ", Aig_ManExorNum(p) );
391 if ( nChoices )
392 printf( "ch = %5d ", nChoices );
393 if ( Aig_ManBufNum(p) )
394 printf( "buf = %5d ", Aig_ManBufNum(p) );
395// printf( "Cre = %6d ", p->nCreated );
396// printf( "Del = %6d ", p->nDeleted );
397// printf( "Lev = %3d ", Aig_ManLevelNum(p) );
398// printf( "Max = %7d ", Aig_ManObjNumMax(p) );
399 printf( "lev = %3d", Aig_ManLevels(p) );
400 printf( "\n" );
401 fflush( stdout );
402}
int Aig_ManChoiceNum(Aig_Man_t *p)
Definition aigUtil.c:1020
int Aig_ManLevels(Aig_Man_t *p)
Definition aigUtil.c:102
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◆ Aig_ManPrintVerbose()

void Aig_ManPrintVerbose ( Aig_Man_t * p,
int fHaig )
extern

Function*************************************************************

Synopsis [Prints node in HAIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 698 of file aigUtil.c.

699{
700 Vec_Ptr_t * vNodes;
701 Aig_Obj_t * pObj;
702 int i;
703 printf( "PIs: " );
704 Aig_ManForEachCi( p, pObj, i )
705 printf( " %p", pObj );
706 printf( "\n" );
707 vNodes = Aig_ManDfs( p, 0 );
708 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
709 Aig_ObjPrintVerbose( pObj, fHaig ), printf( "\n" );
710 printf( "\n" );
711 Vec_PtrFree( vNodes );
712}
void Aig_ObjPrintVerbose(Aig_Obj_t *pObj, int fHaig)
Definition aigUtil.c:653
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◆ Aig_ManRandom()

unsigned Aig_ManRandom ( int fReset)
extern

Function*************************************************************

Synopsis [Creates a sequence of random numbers.]

Description []

SideEffects []

SeeAlso [http://www.codeproject.com/KB/recipes/SimpleRNG.aspx]

Definition at line 1170 of file aigUtil.c.

1171{
1172#ifdef _MSC_VER
1173 static unsigned int m_z = NUMBER1;
1174 static unsigned int m_w = NUMBER2;
1175#else
1176 static __thread unsigned int m_z = NUMBER1;
1177 static __thread unsigned int m_w = NUMBER2;
1178#endif
1179 if ( fReset )
1180 {
1181 m_z = NUMBER1;
1182 m_w = NUMBER2;
1183 }
1184 m_z = 36969 * (m_z & 65535) + (m_z >> 16);
1185 m_w = 18000 * (m_w & 65535) + (m_w >> 16);
1186 return (m_z << 16) + m_w;
1187}
#define NUMBER2
Definition aigUtil.c:1157
#define NUMBER1
Definition aigUtil.c:1156
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◆ Aig_ManRandom64()

word Aig_ManRandom64 ( int fReset)
extern

Function*************************************************************

Synopsis [Creates a sequence of random numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 1200 of file aigUtil.c.

1201{
1202 word Res = (word)Aig_ManRandom(fReset);
1203 return Res | ((word)Aig_ManRandom(0) << 32);
1204}
unsigned Aig_ManRandom(int fReset)
GLOBAL VARIABLES ///.
Definition aigUtil.c:1170
unsigned __int64 word
DECLARATIONS ///.
Definition kitPerm.c:36
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◆ Aig_ManRandomInfo()

void Aig_ManRandomInfo ( Vec_Ptr_t * vInfo,
int iInputStart,
int iWordStart,
int iWordStop )
extern

Function*************************************************************

Synopsis [Creates random info for the primary inputs.]

Description []

SideEffects []

SeeAlso []

Definition at line 1218 of file aigUtil.c.

1219{
1220 unsigned * pInfo;
1221 int i, w;
1222 Vec_PtrForEachEntryStart( unsigned *, vInfo, pInfo, i, iInputStart )
1223 for ( w = iWordStart; w < iWordStop; w++ )
1224 pInfo[w] = Aig_ManRandom(0);
1225}
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◆ Aig_ManReduceLaches()

Aig_Man_t * Aig_ManReduceLaches ( Aig_Man_t * p,
int fVerbose )
extern

Function*************************************************************

Synopsis [Reduces the latches.]

Description []

SideEffects []

SeeAlso []

Definition at line 455 of file aigScl.c.

456{
457 Aig_Man_t * pTemp;
458 Vec_Ptr_t * vMap;
459 int nSaved, nCur;
460 if ( fVerbose )
461 printf( "Performing combinational register sweep:\n" );
462 for ( nSaved = 0; (nCur = Aig_ManReduceLachesCount(p)); nSaved += nCur )
463 {
464// printf( "Reducible = %d\n", nCur );
465 vMap = Aig_ManReduceLachesOnce( p );
466 p = Aig_ManRemap( pTemp = p, vMap );
467 Vec_PtrFree( vMap );
469 if ( fVerbose )
470 Aig_ManReportImprovement( pTemp, p );
471 Aig_ManStop( pTemp );
472 if ( p->nRegs == 0 )
473 break;
474 }
475 return p;
476}
int Aig_ManSeqCleanup(Aig_Man_t *p)
Definition aigScl.c:158
ABC_NAMESPACE_IMPL_START Aig_Man_t * Aig_ManRemap(Aig_Man_t *p, Vec_Ptr_t *vMap)
DECLARATIONS ///.
Definition aigScl.c:46
int Aig_ManReduceLachesCount(Aig_Man_t *p)
Definition aigScl.c:347
Vec_Ptr_t * Aig_ManReduceLachesOnce(Aig_Man_t *p)
Definition aigScl.c:394
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◆ Aig_ManRegCreatePart()

Aig_Man_t * Aig_ManRegCreatePart ( Aig_Man_t * pAig,
Vec_Int_t * vPart,
int * pnCountPis,
int * pnCountRegs,
int ** ppMapBack )
extern

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 308 of file aigPartReg.c.

309{
310 Aig_Man_t * pNew;
311 Aig_Obj_t * pObj, * pObjNew;
312 Vec_Ptr_t * vNodes;
313 Vec_Ptr_t * vRoots;
314 int nOffset, iOut, i;
315 int nCountPis, nCountRegs;
316 int * pMapBack;
317 // collect roots
318 vRoots = Vec_PtrAlloc( Vec_IntSize(vPart) );
319 nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
320 Vec_IntForEachEntry( vPart, iOut, i )
321 {
322 pObj = Aig_ManCo(pAig, nOffset+iOut);
323 Vec_PtrPush( vRoots, Aig_ObjFanin0(pObj) );
324 }
325 // collect/mark nodes/PIs in the DFS order
326 vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(vRoots), Vec_PtrSize(vRoots) );
327 Vec_PtrFree( vRoots );
328 // unmark register outputs
329 nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
330 Vec_IntForEachEntry( vPart, iOut, i )
331 {
332 pObj = Aig_ManCi(pAig, nOffset+iOut);
333 Aig_ObjSetTravIdPrevious( pAig, pObj );
334 }
335 // count pure PIs
336 nCountPis = nCountRegs = 0;
337 Aig_ManForEachPiSeq( pAig, pObj, i )
338 nCountPis += Aig_ObjIsTravIdCurrent(pAig, pObj);
339 // count outputs of other registers
340 Aig_ManForEachLoSeq( pAig, pObj, i )
341 nCountRegs += Aig_ObjIsTravIdCurrent(pAig, pObj);
342 if ( pnCountPis )
343 *pnCountPis = nCountPis;
344 if ( pnCountRegs )
345 *pnCountRegs = nCountRegs;
346 // create the new manager
347 pNew = Aig_ManStart( Vec_PtrSize(vNodes) );
348 Aig_ManConst1(pAig)->pData = Aig_ManConst1(pNew);
349 // create the PIs
350 Aig_ManForEachCi( pAig, pObj, i )
351 if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
352 pObj->pData = Aig_ObjCreateCi(pNew);
353 // add variables for the register outputs
354 // create fake POs to hold the register outputs
355 nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
356 Vec_IntForEachEntry( vPart, iOut, i )
357 {
358 pObj = Aig_ManCi(pAig, nOffset+iOut);
359 pObj->pData = Aig_ObjCreateCi(pNew);
360 Aig_ObjCreateCo( pNew, (Aig_Obj_t *)pObj->pData );
361 Aig_ObjSetTravIdCurrent( pAig, pObj ); // added
362 }
363 // create the nodes
364 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
365 if ( Aig_ObjIsNode(pObj) )
366 pObj->pData = Aig_And(pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
367 // add real POs for the registers
368 nOffset = Aig_ManCoNum(pAig)-Aig_ManRegNum(pAig);
369 Vec_IntForEachEntry( vPart, iOut, i )
370 {
371 pObj = Aig_ManCo( pAig, nOffset+iOut );
372 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
373 }
374 pNew->nRegs = Vec_IntSize(vPart);
375 // create map
376 if ( ppMapBack )
377 {
378 pMapBack = ABC_ALLOC( int, Aig_ManObjNumMax(pNew) );
379 memset( pMapBack, 0xff, sizeof(int) * Aig_ManObjNumMax(pNew) );
380 // map constant nodes
381 pMapBack[0] = 0;
382 // logic cones of register outputs
383 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
384 {
385 pObjNew = Aig_Regular((Aig_Obj_t *)pObj->pData);
386 pMapBack[pObjNew->Id] = pObj->Id;
387 }
388 // map register outputs
389 nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
390 Vec_IntForEachEntry( vPart, iOut, i )
391 {
392 pObj = Aig_ManCi(pAig, nOffset+iOut);
393 pObjNew = (Aig_Obj_t *)pObj->pData;
394 pMapBack[pObjNew->Id] = pObj->Id;
395 }
396 *ppMapBack = pMapBack;
397 }
398 Vec_PtrFree( vNodes );
399 return pNew;
400}
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◆ Aig_ManRegPartitionSimple()

Vec_Ptr_t * Aig_ManRegPartitionSimple ( Aig_Man_t * pAig,
int nPartSize,
int nOverSize )
extern

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 474 of file aigPartReg.c.

475{
476 Vec_Ptr_t * vResult;
477 Vec_Int_t * vPart;
478 int i, Counter;
479 if ( nOverSize >= nPartSize )
480 {
481 printf( "Overlap size (%d) is more or equal than the partition size (%d).\n", nOverSize, nPartSize );
482 printf( "Adjusting it to be equal to half of the partition size.\n" );
483 nOverSize = nPartSize/2;
484 }
485 assert( nOverSize < nPartSize );
486 vResult = Vec_PtrAlloc( 100 );
487 for ( Counter = 0; Counter < Aig_ManRegNum(pAig); Counter -= nOverSize )
488 {
489 vPart = Vec_IntAlloc( nPartSize );
490 for ( i = 0; i < nPartSize; i++, Counter++ )
491 if ( Counter < Aig_ManRegNum(pAig) )
492 Vec_IntPush( vPart, Counter );
493 if ( Vec_IntSize(vPart) <= nOverSize )
494 Vec_IntFree(vPart);
495 else
496 Vec_PtrPush( vResult, vPart );
497 }
498 return vResult;
499}
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◆ Aig_ManRegPartitionSmart()

Vec_Ptr_t * Aig_ManRegPartitionSmart ( Aig_Man_t * pAig,
int nPartSize )
extern

Function*************************************************************

Synopsis [Computes partitioning of registers.]

Description []

SideEffects []

SeeAlso []

Definition at line 413 of file aigPartReg.c.

414{
415 extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
416
417 Aig_ManPre_t * p;
418 Vec_Ptr_t * vResult;
419 int iSeed, iNext, i, k;
420 // create the manager
421 p = Aig_ManRegManStart( pAig, nPartSize );
422 // add partitions as long as registers remain
423 for ( i = 0; (iSeed = Aig_ManRegFindSeed(p)) >= 0; i++ )
424 {
425//printf( "Seed variable = %d.\n", iSeed );
426 // clean the current partition information
427 Vec_IntClear( p->vRegs );
428 Vec_IntClear( p->vUniques );
429 Vec_IntClear( p->vFreeVars );
430 Vec_FltClear( p->vPartCost );
431 memset( p->pfPartVars, 0, sizeof(char) * Aig_ManRegNum(p->pAig) );
432 // add the register and its partition support
433 Aig_ManRegPartitionAdd( p, iSeed );
434 // select the best var to add
435 for ( k = 0; Vec_IntSize(p->vRegs) < p->nRegsMax; k++ )
436 {
437 // get the next best variable
438 iNext = Aig_ManRegFindBestVar( p );
439 if ( iNext == -1 )
440 break;
441 // add the register to the support of the partition
442 Aig_ManRegPartitionAdd( p, iNext );
443 // report the result
444//printf( "Part %3d Reg %3d : Free = %4d. Total = %4d. Ratio = %6.2f. Unique = %4d.\n", i, k,
445// Vec_IntSize(p->vFreeVars), Vec_IntSize(p->vRegs),
446// 1.0*Vec_IntSize(p->vFreeVars)/Vec_IntSize(p->vRegs), Vec_IntSize(p->vUniques) );
447 // quit if there are not free variables
448 if ( Vec_IntSize(p->vFreeVars) == 0 )
449 break;
450 }
451 // add this partition to the set
452 Vec_PtrPush( p->vParts, Vec_IntDup(p->vRegs) );
453printf( "Part %3d SUMMARY: Free = %4d. Total = %4d. Ratio = %6.2f. Unique = %4d.\n", i,
454 Vec_IntSize(p->vFreeVars), Vec_IntSize(p->vRegs),
455 1.0*Vec_IntSize(p->vFreeVars)/Vec_IntSize(p->vRegs), Vec_IntSize(p->vUniques) );
456//printf( "\n" );
457 }
458 vResult = p->vParts; p->vParts = NULL;
460 return vResult;
461}
typedefABC_NAMESPACE_IMPL_START struct Aig_ManPre_t_ Aig_ManPre_t
DECLARATIONS ///.
Definition aigPartReg.c:31
int Aig_ManRegFindBestVar(Aig_ManPre_t *p)
Definition aigPartReg.c:156
Aig_ManPre_t * Aig_ManRegManStart(Aig_Man_t *pAig, int nPartSize)
FUNCTION DEFINITIONS ///.
Definition aigPartReg.c:66
void Aig_ManRegManStop(Aig_ManPre_t *p)
Definition aigPartReg.c:96
void Aig_ManRegPartitionAdd(Aig_ManPre_t *p, int iReg)
Definition aigPartReg.c:200
int Aig_ManRegFindSeed(Aig_ManPre_t *p)
Definition aigPartReg.c:122
void Ioa_WriteAiger(Aig_Man_t *pMan, char *pFileName, int fWriteSymbols, int fCompact)
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◆ Aig_ManRegProjectOnehots()

Vec_Ptr_t * Aig_ManRegProjectOnehots ( Aig_Man_t * pAig,
Aig_Man_t * pPart,
Vec_Ptr_t * vOnehots,
int fVerbose )
extern

Function*************************************************************

Synopsis [Creates projection of 1-hot registers onto the given partition.]

Description [Assumes that the relevant register outputs are labeled with the current traversal ID.]

SideEffects []

SeeAlso []

Definition at line 248 of file aigPartReg.c.

249{
250 Vec_Ptr_t * vOnehotsPart = NULL;
251 Vec_Int_t * vGroup, * vGroupNew;
252 Aig_Obj_t * pObj, * pObjNew;
253 int nOffset, iReg, i, k;
254 // set the PI numbers
255 Aig_ManForEachCi( pPart, pObj, i )
256 pObj->iData = i;
257 // go through each group and check if registers are involved in this one
258 nOffset = Aig_ManCiNum(pAig)-Aig_ManRegNum(pAig);
259 Vec_PtrForEachEntry( Vec_Int_t *, vOnehots, vGroup, i )
260 {
261 vGroupNew = NULL;
262 Vec_IntForEachEntry( vGroup, iReg, k )
263 {
264 pObj = Aig_ManCi( pAig, nOffset+iReg );
265 if ( !Aig_ObjIsTravIdCurrent(pAig, pObj) )
266 continue;
267 if ( vGroupNew == NULL )
268 vGroupNew = Vec_IntAlloc( Vec_IntSize(vGroup) );
269 pObjNew = (Aig_Obj_t *)pObj->pData;
270 Vec_IntPush( vGroupNew, pObjNew->iData );
271 }
272 if ( vGroupNew == NULL )
273 continue;
274 if ( Vec_IntSize(vGroupNew) > 1 )
275 {
276 if ( vOnehotsPart == NULL )
277 vOnehotsPart = Vec_PtrAlloc( 100 );
278 Vec_PtrPush( vOnehotsPart, vGroupNew );
279 }
280 else
281 Vec_IntFree( vGroupNew );
282 }
283 // clear the PI numbers
284 Aig_ManForEachCi( pPart, pObj, i )
285 pObj->iData = 0;
286 // print out
287 if ( vOnehotsPart && fVerbose )
288 {
289 printf( "Partition contains %d groups of 1-hot registers: { ", Vec_PtrSize(vOnehotsPart) );
290 Vec_PtrForEachEntry( Vec_Int_t *, vOnehotsPart, vGroup, k )
291 printf( "%d ", Vec_IntSize(vGroup) );
292 printf( "}\n" );
293 }
294 return vOnehotsPart;
295}
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◆ Aig_ManRehash()

Aig_Man_t * Aig_ManRehash ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Iteratively rehashes the AIG.]

Description [The input AIG is assumed to have representatives assigned.]

SideEffects []

SeeAlso []

Definition at line 454 of file aigRepr.c.

455{
456 Aig_Man_t * pTemp;
457 int i, nFanouts;
458 assert( p->pReprs != NULL );
459 for ( i = 0; (nFanouts = Aig_ManRemapRepr( p )); i++ )
460 {
461// printf( "Iter = %3d. Fanouts = %6d. Nodes = %7d.\n", i+1, nFanouts, Aig_ManNodeNum(p) );
462 p = Aig_ManDupRepr( pTemp = p, 1 );
463 Aig_ManReprStart( p, Aig_ManObjNumMax(p) );
464 Aig_ManTransferRepr( p, pTemp );
465 Aig_ManStop( pTemp );
466 }
467 return p;
468}
void Aig_ManTransferRepr(Aig_Man_t *pNew, Aig_Man_t *pOld)
Definition aigRepr.c:211
int Aig_ManRemapRepr(Aig_Man_t *p)
Definition aigRepr.c:351
ABC_NAMESPACE_IMPL_START void Aig_ManReprStart(Aig_Man_t *p, int nIdMax)
DECLARATIONS ///.
Definition aigRepr.c:45
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◆ Aig_ManReleaseData()

void * Aig_ManReleaseData ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 473 of file aigMan.c.

474{
475 void * pD = p->pData;
476 p->pData = NULL;
477 return pD;
478}

◆ Aig_ManRemap()

Aig_Man_t * Aig_ManRemap ( Aig_Man_t * p,
Vec_Ptr_t * vMap )
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigScl.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Sequential cleanup.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigScl.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Remaps the manager.]

Description [Map in the array specifies for each CI node the node that should be used after remapping.]

SideEffects []

SeeAlso []

Definition at line 46 of file aigScl.c.

47{
48 Aig_Man_t * pNew;
49 Aig_Obj_t * pObj, * pObjMapped;
50 int i, nTruePis;
51 // create the new manager
52 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
53 pNew->pName = Abc_UtilStrsav( p->pName );
54 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
55 pNew->nAsserts = p->nAsserts;
56 pNew->nConstrs = p->nConstrs;
57 pNew->nBarBufs = p->nBarBufs;
58 assert( p->vFlopNums == NULL || Vec_IntSize(p->vFlopNums) == p->nRegs );
59 if ( p->vFlopNums )
60 pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
61 if ( p->vFlopReprs )
62 pNew->vFlopReprs = Vec_IntDup( p->vFlopReprs );
63 // create the PIs
65 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
66 Aig_ManForEachCi( p, pObj, i )
67 pObj->pData = Aig_ObjCreateCi(pNew);
68 // implement the mapping
69 nTruePis = Aig_ManCiNum(p)-Aig_ManRegNum(p);
70 if ( p->vFlopReprs )
71 {
72 Aig_ManForEachLoSeq( p, pObj, i )
73 pObj->pNext = (Aig_Obj_t *)(long)Vec_IntEntry( p->vFlopNums, i-nTruePis );
74 }
75 Aig_ManForEachCi( p, pObj, i )
76 {
77 pObjMapped = (Aig_Obj_t *)Vec_PtrEntry( vMap, i );
78 pObj->pData = Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pObjMapped)->pData, Aig_IsComplement(pObjMapped) );
79 if ( pNew->vFlopReprs && i >= nTruePis && pObj != pObjMapped )
80 {
81 Vec_IntPush( pNew->vFlopReprs, Aig_ObjCioId(pObj) );
82 if ( Aig_ObjIsConst1( Aig_Regular(pObjMapped) ) )
83 Vec_IntPush( pNew->vFlopReprs, -1 );
84 else
85 {
86 assert( !Aig_IsComplement(pObjMapped) );
87 assert( Aig_ObjIsCi(pObjMapped) );
88 assert( Aig_ObjCioId(pObj) != Aig_ObjCioId(pObjMapped) );
89 Vec_IntPush( pNew->vFlopReprs, Aig_ObjCioId(pObjMapped) );
90 }
91 }
92 }
93 if ( p->vFlopReprs )
94 {
95 Aig_ManForEachLoSeq( p, pObj, i )
96 pObj->pNext = NULL;
97 }
98 // duplicate internal nodes
99 Aig_ManForEachObj( p, pObj, i )
100 if ( Aig_ObjIsBuf(pObj) )
101 pObj->pData = Aig_ObjChild0Copy(pObj);
102 else if ( Aig_ObjIsNode(pObj) )
103 pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
104 // add the POs
105 Aig_ManForEachCo( p, pObj, i )
106 Aig_ObjCreateCo( pNew, Aig_ObjChild0Copy(pObj) );
107 assert( Aig_ManNodeNum(p) >= Aig_ManNodeNum(pNew) );
108 Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
109 // check the resulting network
110 if ( !Aig_ManCheck(pNew) )
111 printf( "Aig_ManRemap(): The check has failed.\n" );
112 return pNew;
113}
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◆ Aig_ManReportImprovement()

void Aig_ManReportImprovement ( Aig_Man_t * p,
Aig_Man_t * pNew )
extern

Function*************************************************************

Synopsis [Reports the reduction of the AIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 415 of file aigMan.c.

416{
417 printf( "REG: Beg = %5d. End = %5d. (R =%5.1f %%) ",
418 Aig_ManRegNum(p), Aig_ManRegNum(pNew),
419 Aig_ManRegNum(p)? 100.0*(Aig_ManRegNum(p)-Aig_ManRegNum(pNew))/Aig_ManRegNum(p) : 0.0 );
420 printf( "AND: Beg = %6d. End = %6d. (R =%5.1f %%)",
421 Aig_ManNodeNum(p), Aig_ManNodeNum(pNew),
422 Aig_ManNodeNum(p)? 100.0*(Aig_ManNodeNum(p)-Aig_ManNodeNum(pNew))/Aig_ManNodeNum(p) : 0.0 );
423 printf( "\n" );
424}
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◆ Aig_ManReprStart()

void Aig_ManReprStart ( Aig_Man_t * p,
int nIdMax )
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigRepr.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Handing node representatives.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigRepr.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Starts the array of representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigRepr.c.

46{
47 assert( Aig_ManBufNum(p) == 0 );
48 assert( p->pReprs == NULL );
49 p->nReprsAlloc = nIdMax;
50 p->pReprs = ABC_ALLOC( Aig_Obj_t *, p->nReprsAlloc );
51 memset( p->pReprs, 0, sizeof(Aig_Obj_t *) * p->nReprsAlloc );
52}
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◆ Aig_ManReprStop()

void Aig_ManReprStop ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Stop the array of representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 65 of file aigRepr.c.

66{
67 assert( p->pReprs != NULL );
68 ABC_FREE( p->pReprs );
69 p->nReprsAlloc = 0;
70}

◆ Aig_ManResetRefs()

void Aig_ManResetRefs ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Reset reference counters.]

Description []

SideEffects []

SeeAlso []

Definition at line 122 of file aigUtil.c.

123{
124 Aig_Obj_t * pObj;
125 int i;
126 Aig_ManForEachObj( p, pObj, i )
127 pObj->nRefs = 0;
128 Aig_ManForEachObj( p, pObj, i )
129 {
130 if ( Aig_ObjFanin0(pObj) )
131 Aig_ObjFanin0(pObj)->nRefs++;
132 if ( Aig_ObjFanin1(pObj) )
133 Aig_ObjFanin1(pObj)->nRefs++;
134 }
135}
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◆ Aig_ManRetimeFrontier()

Aig_Man_t * Aig_ManRetimeFrontier ( Aig_Man_t * p,
int nStepsMax )
extern

Function*************************************************************

Synopsis [Performs forward retiming.]

Description []

SideEffects []

SeeAlso []

Definition at line 125 of file aigRetF.c.

126{
127 Aig_Obj_t * pObj, * pObjNew, * pObjLo, * pObjLo0, * pObjLo1, * pObjLi, * pObjLi0, * pObjLi1;//, * pObjLi0_, * pObjLi1_, * pObjLi0__, * pObjLi1__;
128 int i, Counter, fCompl, fChange;
129 assert( Aig_ManRegNum(p) > 0 );
130 // remove structural hashing table
131 Aig_TableClear( p );
132 // mark the retimable nodes
134 // mark the register outputs
135 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
136 {
137 pObjLo->fMarkA = 1;
138 pObjLo->pNext = pObjLi;
139 pObjLi->pNext = pObjLo;
140 }
141 // go through the nodes and find retimable ones
142 Counter = 0;
143 fChange = 1;
144 while ( fChange )
145 {
146 fChange = 0;
147 Aig_ManForEachNode( p, pObj, i )
148 {
149 if ( !pObj->fMarkB )
150 continue;
151 if ( Aig_ObjIsBuf(pObj) )
152 continue;
153 // get the real inputs of the node (skipping the buffers)
154 pObjLo0 = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
155 pObjLo1 = Aig_ObjReal_rec( Aig_ObjChild1(pObj) );
156 if ( !Aig_Regular(pObjLo0)->fMarkA || !Aig_Regular(pObjLo1)->fMarkA )
157 continue;
158 // remember complemented attribute
159 fCompl = Aig_IsComplement(pObjLo0) & Aig_IsComplement(pObjLo1);
160 // get the register inputs
161// pObjLi0_ = Aig_Regular(pObjLo0)->pNext;
162// pObjLi1_ = Aig_Regular(pObjLo1)->pNext;
163// pObjLi0__ = Aig_ObjChild0(Aig_Regular(pObjLo0)->pNext);
164// pObjLi1__ = Aig_ObjChild0(Aig_Regular(pObjLo1)->pNext);
165 pObjLi0 = Aig_NotCond( Aig_ObjChild0(Aig_Regular(pObjLo0)->pNext), Aig_IsComplement(pObjLo0) );
166 pObjLi1 = Aig_NotCond( Aig_ObjChild0(Aig_Regular(pObjLo1)->pNext), Aig_IsComplement(pObjLo1) );
167 // create new node
168 pObjNew = Aig_And( p, pObjLi0, pObjLi1 );
169 pObjNew->fMarkB = 1;
170 // create new register
171 pObjLo = Aig_ObjCreateCi(p);
172 pObjLo->fMarkA = 1;
173 pObjLi = Aig_ObjCreateCo( p, Aig_NotCond(pObjNew, fCompl) );
174 p->nRegs++;
175 pObjLo->pNext = pObjLi;
176 pObjLi->pNext = pObjLo;
177 // add the buffer
178 Aig_ObjDisconnect( p, pObj );
179 pObj->Type = AIG_OBJ_BUF;
180 p->nObjs[AIG_OBJ_AND]--;
181 p->nObjs[AIG_OBJ_BUF]++;
182 Aig_ObjConnect( p, pObj, Aig_NotCond(pObjLo, fCompl), NULL );
183 // create HAIG if defined
184 // mark the change
185 fChange = 1;
186 // check the limit
187 if ( ++Counter >= nStepsMax )
188 {
189 fChange = 0;
190 break;
191 }
192 }
193 }
194 // clean the markings
195 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
196 {
197 pObjLo->fMarkA = 0;
198 pObjLo->pNext = pObjLi->pNext = NULL;
199 }
200 Aig_ManForEachObj( p, pObj, i )
201 pObj->fMarkB = 0;
202 // remove useless registers
204 // rehash the nodes
205 return Aig_ManDupOrdered( p );
206}
void Aig_ManRetimeMark(Aig_Man_t *p)
Definition aigRetF.c:73
void Aig_ObjConnect(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFan0, Aig_Obj_t *pFan1)
Definition aigObj.c:126
void Aig_TableClear(Aig_Man_t *p)
Definition aigTable.c:265
Aig_Obj_t * Aig_ObjReal_rec(Aig_Obj_t *pObj)
Definition aigUtil.c:476
unsigned int Type
Definition aig.h:77
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◆ Aig_ManScl()

Aig_Man_t * Aig_ManScl ( Aig_Man_t * pAig,
int fLatchConst,
int fLatchEqual,
int fUseMvSweep,
int nFramesSymb,
int nFramesSatur,
int fVerbose,
int fVeryVerbose )
extern

Function*************************************************************

Synopsis [Gives the current ABC network to AIG manager for processing.]

Description []

SideEffects []

SeeAlso []

Definition at line 650 of file aigScl.c.

651{
652 extern void Saig_ManReportUselessRegisters( Aig_Man_t * pAig );
653 extern int Saig_ManReportComplements( Aig_Man_t * p );
654
655 Aig_Man_t * pAigInit, * pAigNew;
656 Aig_Obj_t * pFlop1, * pFlop2;
657 int i, Entry1, Entry2, nTruePis;//, nRegs;
658
659 if ( pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0 )
660 return Aig_ManSclPart( pAig, fLatchConst, fLatchEqual, fVerbose);
661
662 // store the original AIG
663 assert( pAig->vFlopNums == NULL );
664 pAigInit = pAig;
665 pAig = Aig_ManDupSimple( pAig );
666 // create storage for latch numbers
667 pAig->vFlopNums = Vec_IntStartNatural( pAig->nRegs );
668 pAig->vFlopReprs = Vec_IntAlloc( 100 );
669 Aig_ManSeqCleanup( pAig );
670 if ( fLatchConst && pAig->nRegs )
671 pAig = Aig_ManConstReduce( pAig, fUseMvSweep, nFramesSymb, nFramesSatur, fVerbose, fVeryVerbose );
672 if ( fLatchEqual && pAig->nRegs )
673 pAig = Aig_ManReduceLaches( pAig, fVerbose );
674 // translate pairs into reprs
675 nTruePis = Aig_ManCiNum(pAigInit)-Aig_ManRegNum(pAigInit);
676 Aig_ManReprStart( pAigInit, Aig_ManObjNumMax(pAigInit) );
677 Vec_IntForEachEntry( pAig->vFlopReprs, Entry1, i )
678 {
679 Entry2 = Vec_IntEntry( pAig->vFlopReprs, ++i );
680 pFlop1 = Aig_ManCi( pAigInit, nTruePis + Entry1 );
681 pFlop2 = (Entry2 == -1)? Aig_ManConst1(pAigInit) : Aig_ManCi( pAigInit, nTruePis + Entry2 );
682 assert( pFlop1 != pFlop2 );
683 if ( pFlop1->Id > pFlop2->Id )
684 pAigInit->pReprs[pFlop1->Id] = pFlop2;
685 else
686 pAigInit->pReprs[pFlop2->Id] = pFlop1;
687 }
688 Aig_ManStop( pAig );
689// Aig_ManSeqCleanup( pAigInit );
690 pAigNew = Aig_ManDupRepr( pAigInit, 0 );
691 Aig_ManSeqCleanup( pAigNew );
692
693// Saig_ManReportUselessRegisters( pAigNew );
694 if ( Aig_ManRegNum(pAigNew) == 0 )
695 return pAigNew;
696// nRegs = Saig_ManReportComplements( pAigNew );
697// if ( nRegs )
698// printf( "The number of complemented registers = %d.\n", nRegs );
699 return pAigNew;
700}
Aig_Man_t * Aig_ManReduceLaches(Aig_Man_t *p, int fVerbose)
Definition aigScl.c:455
Aig_Man_t * Aig_ManSclPart(Aig_Man_t *pAig, int fLatchConst, int fLatchEqual, int fVerbose)
Definition aigScl.c:598
Aig_Man_t * Aig_ManDupSimple(Aig_Man_t *p)
DECLARATIONS ///.
Definition aigDup.c:46
Aig_Man_t * Aig_ManConstReduce(Aig_Man_t *p, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)
Definition aigTsim.c:498
int Saig_ManReportComplements(Aig_Man_t *p)
Definition saigScl.c:85
void Saig_ManReportUselessRegisters(Aig_Man_t *pAig)
DECLARATIONS ///.
Definition saigScl.c:45
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◆ Aig_ManSeqCleanup()

int Aig_ManSeqCleanup ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description []

SideEffects []

SeeAlso []

Definition at line 158 of file aigScl.c.

159{
160 Vec_Ptr_t * vNodes, * vCis, * vCos;
161 Aig_Obj_t * pObj, * pObjLi, * pObjLo;
162 int i, nTruePis, nTruePos;
163// assert( Aig_ManBufNum(p) == 0 );
164
165 // mark the PIs
167 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
168 Aig_ManForEachPiSeq( p, pObj, i )
169 Aig_ObjSetTravIdCurrent( p, pObj );
170
171 // prepare to collect nodes reachable from POs
172 vNodes = Vec_PtrAlloc( 100 );
173 Aig_ManForEachPoSeq( p, pObj, i )
174 Vec_PtrPush( vNodes, pObj );
175
176 // remember latch inputs in latch outputs
177 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
178 pObjLo->pNext = pObjLi;
179 // mark the nodes reachable from these nodes
180 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
181 Aig_ManSeqCleanup_rec( p, pObj, vNodes );
182 assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
183 // clean latch output pointers
184 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
185 pObjLo->pNext = NULL;
186
187 // if some latches are removed, update PIs/POs
188 if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
189 {
190 if ( p->vFlopNums )
191 {
192 int nTruePos = Aig_ManCoNum(p)-Aig_ManRegNum(p);
193 int iNum, k = 0;
194 Aig_ManForEachCo( p, pObj, i )
195 if ( i >= nTruePos && Aig_ObjIsTravIdCurrent(p, pObj) )
196 {
197 iNum = Vec_IntEntry( p->vFlopNums, i - nTruePos );
198 Vec_IntWriteEntry( p->vFlopNums, k++, iNum );
199 }
200 assert( k == Vec_PtrSize(vNodes) - nTruePos );
201 Vec_IntShrink( p->vFlopNums, k );
202 }
203 // collect new CIs/COs
204 vCis = Vec_PtrAlloc( Aig_ManCiNum(p) );
205 Aig_ManForEachCi( p, pObj, i )
206 if ( Aig_ObjIsTravIdCurrent(p, pObj) )
207 Vec_PtrPush( vCis, pObj );
208 else
209 {
210 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
211// Aig_ManRecycleMemory( p, pObj );
212 }
213 vCos = Vec_PtrAlloc( Aig_ManCoNum(p) );
214 Aig_ManForEachCo( p, pObj, i )
215 if ( Aig_ObjIsTravIdCurrent(p, pObj) )
216 Vec_PtrPush( vCos, pObj );
217 else
218 {
219 Aig_ObjDisconnect( p, pObj );
220 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
221// Aig_ManRecycleMemory( p, pObj );
222 }
223 // remember the number of true PIs/POs
224 nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
225 nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
226 // set the new number of registers
227 p->nRegs -= Aig_ManCoNum(p) - Vec_PtrSize(vNodes);
228 // create new PIs/POs
229 assert( Vec_PtrSize(vCis) == nTruePis + p->nRegs );
230 assert( Vec_PtrSize(vCos) == nTruePos + p->nRegs );
231 Vec_PtrFree( p->vCis ); p->vCis = vCis;
232 Vec_PtrFree( p->vCos ); p->vCos = vCos;
233 p->nObjs[AIG_OBJ_CI] = Vec_PtrSize( p->vCis );
234 p->nObjs[AIG_OBJ_CO] = Vec_PtrSize( p->vCos );
235
236 }
237 Vec_PtrFree( vNodes );
238 p->nTruePis = Aig_ManCiNum(p) - Aig_ManRegNum(p);
239 p->nTruePos = Aig_ManCoNum(p) - Aig_ManRegNum(p);
241 // remove dangling nodes
242 return Aig_ManCleanup( p );
243}
void Aig_ManSeqCleanup_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vNodes)
Definition aigScl.c:126
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◆ Aig_ManSeqCleanupBasic()

int Aig_ManSeqCleanupBasic ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Returns the number of dangling nodes removed.]

Description [This cleanup procedure is different in that it removes logic but does not remove the dangling latches.]

SideEffects []

SeeAlso []

Definition at line 257 of file aigScl.c.

258{
259 Vec_Ptr_t * vNodes;
260 Aig_Obj_t * pObj, * pObjLi, * pObjLo;
261 int i;
262// assert( Aig_ManBufNum(p) == 0 );
263
264 // mark the PIs
266 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
267 Aig_ManForEachPiSeq( p, pObj, i )
268 Aig_ObjSetTravIdCurrent( p, pObj );
269
270 // prepare to collect nodes reachable from POs
271 vNodes = Vec_PtrAlloc( 100 );
272 Aig_ManForEachPoSeq( p, pObj, i )
273 Vec_PtrPush( vNodes, pObj );
274
275 // remember latch inputs in latch outputs
276 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
277 pObjLo->pNext = pObjLi;
278 // mark the nodes reachable from these nodes
279 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
280 Aig_ManSeqCleanup_rec( p, pObj, vNodes );
281 assert( Vec_PtrSize(vNodes) <= Aig_ManCoNum(p) );
282 // clean latch output pointers
283 Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
284 pObjLo->pNext = NULL;
285
286 // if some latches are removed, update PIs/POs
287 if ( Vec_PtrSize(vNodes) < Aig_ManCoNum(p) )
288 {
289 // add constant drivers to the dangling latches
290 Aig_ManForEachCo( p, pObj, i )
291 if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
292 Aig_ObjPatchFanin0( p, pObj, Aig_ManConst0(p) );
293 }
294 Vec_PtrFree( vNodes );
295 // remove dangling nodes
296 return Aig_ManCleanup( p );
297}
void Aig_ObjPatchFanin0(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFaninNew)
Definition aigObj.c:282
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◆ Aig_ManSetCioIds()

void Aig_ManSetCioIds ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Sets the PI/PO numbers.]

Description []

SideEffects []

SeeAlso []

Definition at line 978 of file aigUtil.c.

979{
980 Aig_Obj_t * pObj;
981 int i;
982 Aig_ManForEachCi( p, pObj, i )
983 pObj->CioId = i;
984 Aig_ManForEachCo( p, pObj, i )
985 pObj->CioId = i;
986}
int CioId
Definition aig.h:73
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◆ Aig_ManSetPhase()

void Aig_ManSetPhase ( Aig_Man_t * pAig)
extern

Function*************************************************************

Synopsis [Handle the counter-example.]

Description []

SideEffects []

SeeAlso []

Definition at line 1449 of file aigUtil.c.

1450{
1451 Aig_Obj_t * pObj;
1452 int i;
1453 // set the PI simulation information
1454 Aig_ManConst1( pAig )->fPhase = 1;
1455 Aig_ManForEachCi( pAig, pObj, i )
1456 pObj->fPhase = 0;
1457 // simulate internal nodes
1458 Aig_ManForEachNode( pAig, pObj, i )
1459 pObj->fPhase = ( Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj) )
1460 & ( Aig_ObjFanin1(pObj)->fPhase ^ Aig_ObjFaninC1(pObj) );
1461 // simulate PO nodes
1462 Aig_ManForEachCo( pAig, pObj, i )
1463 pObj->fPhase = Aig_ObjFanin0(pObj)->fPhase ^ Aig_ObjFaninC0(pObj);
1464}
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◆ Aig_ManSetRegNum()

void Aig_ManSetRegNum ( Aig_Man_t * p,
int nRegs )
extern

Function*************************************************************

Synopsis [Sets the number of registers in the AIG manager.]

Description [This procedure should be called after the manager is fully constructed.]

SideEffects []

SeeAlso []

Definition at line 438 of file aigMan.c.

439{
440 p->nRegs = nRegs;
441 p->nTruePis = Aig_ManCiNum(p) - nRegs;
442 p->nTruePos = Aig_ManCoNum(p) - nRegs;
444}
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◆ Aig_ManShow()

void Aig_ManShow ( Aig_Man_t * pMan,
int fHaig,
Vec_Ptr_t * vBold )
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 341 of file aigShow.c.

342{
343 extern void Abc_ShowFile( char * FileNameDot, int fKeepDot );
344 char FileNameDot[200];
345 FILE * pFile;
346 // create the file name
347 sprintf( FileNameDot, "%s", Extra_FileNameGenericAppend(pMan->pName ? pMan->pName : (char *)"unknown", ".dot") );
348 // check that the file can be opened
349 if ( (pFile = fopen( FileNameDot, "w" )) == NULL )
350 {
351 fprintf( stdout, "Cannot open the intermediate file \"%s\".\n", FileNameDot );
352 return;
353 }
354 fclose( pFile );
355 // generate the file
356 Aig_WriteDotAig( pMan, FileNameDot, fHaig, vBold );
357 // visualize the file
358 Abc_ShowFile( FileNameDot, 0 );
359}
ABC_NAMESPACE_IMPL_START void Abc_ShowFile(char *FileNameDot, int fKeepDot)
DECLARATIONS ///.
Definition abcShow.c:326
ABC_NAMESPACE_IMPL_START void Aig_WriteDotAig(Aig_Man_t *pMan, char *pFileName, int fHaig, Vec_Ptr_t *vBold)
DECLARATIONS ///.
Definition aigShow.c:47
char * Extra_FileNameGenericAppend(char *pBase, char *pSuffix)
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◆ Aig_ManStart()

Aig_Man_t * Aig_ManStart ( int nNodesMax)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigMan.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [AIG manager.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigMan.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Starts the AIG manager.]

Description [The argument of this procedure is a soft limit on the the number of nodes, or 0 if the limit is unknown.]

SideEffects []

SeeAlso []

Definition at line 47 of file aigMan.c.

48{
49 Aig_Man_t * p;
50 if ( nNodesMax <= 0 )
51 nNodesMax = 10007;
52 // start the manager
53 p = ABC_ALLOC( Aig_Man_t, 1 );
54 memset( p, 0, sizeof(Aig_Man_t) );
55 // perform initializations
56 p->nTravIds = 1;
57 p->fCatchExor = 0;
58 // allocate arrays for nodes
59 p->vCis = Vec_PtrAlloc( 100 );
60 p->vCos = Vec_PtrAlloc( 100 );
61 p->vObjs = Vec_PtrAlloc( 1000 );
62 p->vBufs = Vec_PtrAlloc( 100 );
63 //--jlong -- begin
64 p->unfold2_type_I = Vec_PtrAlloc( 4);
65 p->unfold2_type_II = Vec_PtrAlloc( 4);
66 //--jlong -- end
67 // prepare the internal memory manager
68 p->pMemObjs = Aig_MmFixedStart( sizeof(Aig_Obj_t), nNodesMax );
69 // create the constant node
70 p->pConst1 = Aig_ManFetchMemory( p );
71 p->pConst1->Type = AIG_OBJ_CONST1;
72 p->pConst1->fPhase = 1;
73 p->nObjs[AIG_OBJ_CONST1]++;
74 // start the table
75 p->nTableSize = Abc_PrimeCudd( nNodesMax );
76 p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
77 memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
78 return p;
79}
Aig_MmFixed_t * Aig_MmFixedStart(int nEntrySize, int nEntriesMax)
FUNCTION DEFINITIONS ///.
Definition aigMem.c:96
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◆ Aig_ManStartFrom()

Aig_Man_t * Aig_ManStartFrom ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Duplicates the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 92 of file aigMan.c.

93{
94 Aig_Man_t * pNew;
95 Aig_Obj_t * pObj, * pObjNew;
96 int i;
97 // create the new manager
98 pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
99 pNew->pName = Abc_UtilStrsav( p->pName );
100 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
101 // create the PIs
102 Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
103 Aig_ManForEachCi( p, pObj, i )
104 {
105 pObjNew = Aig_ObjCreateCi( pNew );
106 pObjNew->Level = pObj->Level;
107 pObj->pData = pObjNew;
108 }
109 return pNew;
110}
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◆ Aig_ManStartMemory()

void Aig_ManStartMemory ( Aig_Man_t * p)
extern

◆ Aig_ManStartReverseLevels()

void Aig_ManStartReverseLevels ( Aig_Man_t * p,
int nMaxLevelIncrease )
extern

Function*************************************************************

Synopsis [Prepares for the computation of required levels.]

Description [This procedure should be called before the required times are used. It starts internal data structures, which records the level from the COs of the network nodes in reverse topologogical order.]

SideEffects []

SeeAlso []

Definition at line 142 of file aigTiming.c.

143{
144 Vec_Ptr_t * vNodes;
145 Aig_Obj_t * pObj;
146 int i;
147 assert( p->pFanData != NULL );
148 assert( p->vLevelR == NULL );
149 // remember the maximum number of direct levels
150 p->nLevelMax = Aig_ManLevels(p) + nMaxLevelIncrease;
151 // start the reverse levels
152 p->vLevelR = Vec_IntAlloc( 0 );
153 Vec_IntFill( p->vLevelR, Aig_ManObjNumMax(p), 0 );
154 // compute levels in reverse topological order
155 vNodes = Aig_ManDfsReverse( p );
156 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
157 {
158 assert( pObj->fMarkA == 0 );
159 Aig_ObjSetReverseLevel( p, pObj, Aig_ObjReverseLevelNew(p, pObj) );
160 }
161 Vec_PtrFree( vNodes );
162}
int Aig_ObjReverseLevelNew(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigTiming.c:117
Vec_Ptr_t * Aig_ManDfsReverse(Aig_Man_t *p)
Definition aigDfs.c:472
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◆ Aig_ManStop()

void Aig_ManStop ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 187 of file aigMan.c.

188{
189 Aig_Obj_t * pObj;
190 int i;
191 if ( p->time1 ) { ABC_PRT( "time1", p->time1 ); }
192 if ( p->time2 ) { ABC_PRT( "time2", p->time2 ); }
193 // make sure the nodes have clean marks
194 Aig_ManForEachObj( p, pObj, i )
195 assert( !pObj->fMarkA && !pObj->fMarkB );
196 Tim_ManStopP( (Tim_Man_t **)&p->pManTime );
197 if ( p->pFanData )
199 if ( p->pManExdc )
200 Aig_ManStop( p->pManExdc );
201// Aig_TableProfile( p );
202 Aig_MmFixedStop( p->pMemObjs, 0 );
203 Vec_PtrFreeP( &p->vCis );
204 Vec_PtrFreeP( &p->vCos );
205 Vec_PtrFreeP( &p->vObjs );
206 Vec_PtrFreeP( &p->vBufs );
207 //--jlong -- begin
208 Vec_PtrFreeP( &p->unfold2_type_I );
209 Vec_PtrFreeP( &p->unfold2_type_II );
210 //--jlong -- end
211 Vec_IntFreeP( &p->vLevelR );
212 Vec_VecFreeP( &p->vLevels );
213 Vec_IntFreeP( &p->vFlopNums );
214 Vec_IntFreeP( &p->vFlopReprs );
215 Vec_VecFreeP( (Vec_Vec_t **)&p->vOnehots );
216 Vec_VecFreeP( &p->vClockDoms );
217 Vec_IntFreeP( &p->vProbs );
218 Vec_IntFreeP( &p->vCiNumsOrig );
219 Vec_PtrFreeP( &p->vMapped );
220 if ( p->vSeqModelVec )
221 Vec_PtrFreeFree( p->vSeqModelVec );
222 ABC_FREE( p->pTerSimData );
223 ABC_FREE( p->pFastSim );
224 ABC_FREE( p->pData );
225 ABC_FREE( p->pSeqModel );
226 ABC_FREE( p->pName );
227 ABC_FREE( p->pSpec );
228 ABC_FREE( p->pObjCopies );
229 ABC_FREE( p->pReprs );
230 ABC_FREE( p->pEquivs );
231 ABC_FREE( p->pTable );
232 ABC_FREE( p );
233}
void Aig_ManStop(Aig_Man_t *p)
Definition aigMan.c:187
void Aig_ManFanoutStop(Aig_Man_t *p)
Definition aigFanout.c:89
void Tim_ManStopP(Tim_Man_t **p)
Definition timMan.c:387
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◆ Aig_ManStopMemory()

void Aig_ManStopMemory ( Aig_Man_t * p)
extern

◆ Aig_ManStopP()

void Aig_ManStopP ( Aig_Man_t ** p)
extern

Function*************************************************************

Synopsis [Stops the AIG manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 246 of file aigMan.c.

247{
248 if ( *p == NULL )
249 return;
250 Aig_ManStop( *p );
251 *p = NULL;
252}
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◆ Aig_ManStopReverseLevels()

void Aig_ManStopReverseLevels ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Cleans the data structures used to compute required levels.]

Description []

SideEffects []

SeeAlso []

Definition at line 175 of file aigTiming.c.

176{
177 assert( p->vLevelR != NULL );
178 Vec_IntFree( p->vLevelR );
179 p->vLevelR = NULL;
180 p->nLevelMax = 0;
181
182}
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◆ Aig_ManSupports()

Vec_Ptr_t * Aig_ManSupports ( Aig_Man_t * pMan)
extern

Function*************************************************************

Synopsis [Computes supports of the POs in the multi-output AIG.]

Description [Returns the array of integer arrays containing indices of the primary inputs for each primary output.]

SideEffects [Adds the integer PO number at end of each array.]

SeeAlso []

Definition at line 273 of file aigPart.c.

274{
275 Vec_Ptr_t * vSupports;
276 Vec_Int_t * vSupp;
277 Part_Man_t * p;
278 Part_One_t * pPart0, * pPart1;
279 Aig_Obj_t * pObj;
280 int i, Counter = 0;
281 // set the number of PIs/POs
282 Aig_ManForEachCi( pMan, pObj, i )
283 pObj->pNext = (Aig_Obj_t *)(long)i;
284 Aig_ManForEachCo( pMan, pObj, i )
285 pObj->pNext = (Aig_Obj_t *)(long)i;
286 // start the support computation manager
287 p = Part_ManStart( 1 << 20, 1 << 6 );
288 // consider objects in the topological order
289 vSupports = Vec_PtrAlloc( Aig_ManCoNum(pMan) );
290 Aig_ManCleanData(pMan);
291 Aig_ManForEachObj( pMan, pObj, i )
292 {
293 if ( Aig_ObjIsNode(pObj) )
294 {
295 pPart0 = (Part_One_t *)Aig_ObjFanin0(pObj)->pData;
296 pPart1 = (Part_One_t *)Aig_ObjFanin1(pObj)->pData;
297 pObj->pData = Part_ManMergeEntry( p, pPart0, pPart1, pObj->nRefs );
298 assert( pPart0->nRefs > 0 );
299 if ( --pPart0->nRefs == 0 )
300 Part_ManRecycleEntry( p, pPart0 );
301 assert( pPart1->nRefs > 0 );
302 if ( --pPart1->nRefs == 0 )
303 Part_ManRecycleEntry( p, pPart1 );
304 if ( ((Part_One_t *)pObj->pData)->nOuts <= 16 )
305 Counter++;
306 continue;
307 }
308 if ( Aig_ObjIsCo(pObj) )
309 {
310 pPart0 = (Part_One_t *)Aig_ObjFanin0(pObj)->pData;
311 vSupp = Part_ManTransferEntry(pPart0);
312 Vec_IntPush( vSupp, (int)(long)pObj->pNext );
313 Vec_PtrPush( vSupports, vSupp );
314 assert( pPart0->nRefs > 0 );
315 if ( --pPart0->nRefs == 0 )
316 Part_ManRecycleEntry( p, pPart0 );
317 continue;
318 }
319 if ( Aig_ObjIsCi(pObj) )
320 {
321 if ( pObj->nRefs )
322 {
323 pPart0 = Part_ManFetchEntry( p, 1, pObj->nRefs );
324 pPart0->pOuts[ pPart0->nOuts++ ] = (int)(long)pObj->pNext;
325 pObj->pData = pPart0;
326 }
327 continue;
328 }
329 if ( Aig_ObjIsConst1(pObj) )
330 {
331 if ( pObj->nRefs )
332 pObj->pData = Part_ManFetchEntry( p, 0, pObj->nRefs );
333 continue;
334 }
335 assert( 0 );
336 }
337//printf( "Memory usage = %d MB.\n", Vec_PtrSize(p->vMemory) * p->nChunkSize / (1<<20) );
338 Part_ManStop( p );
339 // sort supports by size
340 Vec_VecSort( (Vec_Vec_t *)vSupports, 1 );
341 // clear the number of PIs/POs
342 Aig_ManForEachCi( pMan, pObj, i )
343 pObj->pNext = NULL;
344 Aig_ManForEachCo( pMan, pObj, i )
345 pObj->pNext = NULL;
346/*
347 Aig_ManForEachCo( pMan, pObj, i )
348 printf( "%d ", Vec_IntSize( Vec_VecEntryInt(vSupports, i) ) );
349 printf( "\n" );
350*/
351// printf( "%d \n", Counter );
352 return vSupports;
353}
void Part_ManStop(Part_Man_t *p)
Definition aigPart.c:94
struct Part_One_t_ Part_One_t
Definition aigPart.c:43
Part_Man_t * Part_ManStart(int nChunkSize, int nStepSize)
FUNCTION DEFINITIONS ///.
Definition aigPart.c:71
typedefABC_NAMESPACE_IMPL_START struct Part_Man_t_ Part_Man_t
DECLARATIONS ///.
Definition aigPart.c:32
Part_One_t * Part_ManMergeEntry(Part_Man_t *pMan, Part_One_t *p1, Part_One_t *p2, int nRefs)
Definition aigPart.c:212
Vec_Int_t * Part_ManTransferEntry(Part_One_t *p)
Definition aigPart.c:251
int nRefs
Definition aigPart.c:46
int pOuts[0]
Definition aigPart.c:49
int nOuts
Definition aigPart.c:47
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◆ Aig_ManSupportsInverse()

Vec_Ptr_t * Aig_ManSupportsInverse ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Computes the set of outputs for each input.]

Description [Returns the array of integer arrays containing indices of the primary outputsf for each primary input.]

SideEffects []

SeeAlso []

Definition at line 385 of file aigPart.c.

386{
387 Vec_Ptr_t * vSupps, * vSuppsInv;
388 Vec_Int_t * vSupp;
389 int i, k, iIn, iOut;
390 // get structural supports for each output
391 vSupps = Aig_ManSupports( p );
392 // start the inverse supports
393 vSuppsInv = Vec_PtrAlloc( Aig_ManCiNum(p) );
394 for ( i = 0; i < Aig_ManCiNum(p); i++ )
395 Vec_PtrPush( vSuppsInv, Vec_IntAlloc(8) );
396 // transforms the supports into the inverse supports
397 Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vSupp, i )
398 {
399 iOut = Vec_IntPop( vSupp );
400 Vec_IntForEachEntry( vSupp, iIn, k )
401 Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(vSuppsInv, iIn), iOut );
402 }
403 Vec_VecFree( (Vec_Vec_t *)vSupps );
404 return vSuppsInv;
405}
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◆ Aig_ManSupportsRegisters()

Vec_Ptr_t * Aig_ManSupportsRegisters ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Returns the register dependency matrix.]

Description []

SideEffects []

SeeAlso []

Definition at line 418 of file aigPart.c.

419{
420 Vec_Ptr_t * vSupports, * vMatrix;
421 Vec_Int_t * vSupp;
422 int iOut, iIn, k, m, i;
423 // get structural supports for each output
424 vSupports = Aig_ManSupports( p );
425 // transforms the supports into the latch dependency matrix
426 vMatrix = Vec_PtrStart( Aig_ManRegNum(p) );
427 Vec_PtrForEachEntry( Vec_Int_t *, vSupports, vSupp, i )
428 {
429 // skip true POs
430 iOut = Vec_IntPop( vSupp );
431 iOut -= Aig_ManCoNum(p) - Aig_ManRegNum(p);
432 if ( iOut < 0 )
433 {
434 Vec_IntFree( vSupp );
435 continue;
436 }
437 // remove PIs
438 m = 0;
439 Vec_IntForEachEntry( vSupp, iIn, k )
440 {
441 iIn -= Aig_ManCiNum(p) - Aig_ManRegNum(p);
442 if ( iIn < 0 )
443 continue;
444 assert( iIn < Aig_ManRegNum(p) );
445 Vec_IntWriteEntry( vSupp, m++, iIn );
446 }
447 Vec_IntShrink( vSupp, m );
448 // store support in the matrix
449 assert( iOut < Aig_ManRegNum(p) );
450 Vec_PtrWriteEntry( vMatrix, iOut, vSupp );
451 }
452 Vec_PtrFree( vSupports );
453 // check that all supports are used
454 Vec_PtrForEachEntry( Vec_Int_t *, vMatrix, vSupp, i )
455 assert( vSupp != NULL );
456 return vMatrix;
457}
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◆ Aig_ManTransferRepr()

void Aig_ManTransferRepr ( Aig_Man_t * pNew,
Aig_Man_t * pOld )
extern

Function*************************************************************

Synopsis [Duplicates AIG while substituting representatives.]

Description []

SideEffects []

SeeAlso []

Definition at line 211 of file aigRepr.c.

212{
213 Aig_Obj_t * pObj, * pRepr;
214 int k;
215 assert( pNew->pReprs != NULL );
216 // extend storage to fix pNew
217 if ( pNew->nReprsAlloc < Aig_ManObjNumMax(pNew) )
218 {
219 int nReprsAllocNew = 2 * Aig_ManObjNumMax(pNew);
220 pNew->pReprs = ABC_REALLOC( Aig_Obj_t *, pNew->pReprs, nReprsAllocNew );
221 memset( pNew->pReprs + pNew->nReprsAlloc, 0, sizeof(Aig_Obj_t *) * (nReprsAllocNew-pNew->nReprsAlloc) );
222 pNew->nReprsAlloc = nReprsAllocNew;
223 }
224 // go through the nodes which have representatives
225 Aig_ManForEachObj( pOld, pObj, k )
226 if ( (pRepr = Aig_ObjFindRepr(pOld, pObj)) )
227 Aig_ObjSetRepr_( pNew, Aig_Regular((Aig_Obj_t *)pRepr->pData), Aig_Regular((Aig_Obj_t *)pObj->pData) );
228}
#define ABC_REALLOC(type, obj, num)
Definition abc_global.h:268
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◆ Aig_ManUpdateLevel()

void Aig_ManUpdateLevel ( Aig_Man_t * p,
Aig_Obj_t * pObjNew )
extern

Function*************************************************************

Synopsis [Incrementally updates level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 195 of file aigTiming.c.

196{
197 Aig_Obj_t * pFanout, * pTemp;
198 int iFanout = -1, LevelOld, Lev, k, m;
199 assert( p->pFanData != NULL );
200 assert( Aig_ObjIsNode(pObjNew) );
201 // allocate level if needed
202 if ( p->vLevels == NULL )
203 p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 );
204 // check if level has changed
205 LevelOld = Aig_ObjLevel(pObjNew);
206 if ( LevelOld == Aig_ObjLevelNew(pObjNew) )
207 return;
208 // start the data structure for level update
209 // we cannot fail to visit a node when using this structure because the
210 // nodes are stored by their _old_ levels, which are assumed to be correct
211 Vec_VecClear( p->vLevels );
212 Vec_VecPush( p->vLevels, LevelOld, pObjNew );
213 pObjNew->fMarkA = 1;
214 // recursively update level
215 Vec_VecForEachEntryStart( Aig_Obj_t *, p->vLevels, pTemp, Lev, k, LevelOld )
216 {
217 pTemp->fMarkA = 0;
218 assert( Aig_ObjLevel(pTemp) == Lev );
219 pTemp->Level = Aig_ObjLevelNew(pTemp);
220 // if the level did not change, no need to check the fanout levels
221 if ( Aig_ObjLevel(pTemp) == Lev )
222 continue;
223 // schedule fanout for level update
224 Aig_ObjForEachFanout( p, pTemp, pFanout, iFanout, m )
225 {
226 if ( Aig_ObjIsNode(pFanout) && !pFanout->fMarkA )
227 {
228 assert( Aig_ObjLevel(pFanout) >= Lev );
229 Vec_VecPush( p->vLevels, Aig_ObjLevel(pFanout), pFanout );
230 pFanout->fMarkA = 1;
231 }
232 }
233 }
234}
#define Aig_ObjForEachFanout(p, pObj, pFanout, iFan, i)
Definition aig.h:427
#define Vec_VecForEachEntryStart(Type, vGlob, pEntry, i, k, LevelStart)
Definition vecVec.h:92
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◆ Aig_ManUpdateReverseLevel()

void Aig_ManUpdateReverseLevel ( Aig_Man_t * p,
Aig_Obj_t * pObjNew )
extern

Function*************************************************************

Synopsis [Incrementally updates level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 247 of file aigTiming.c.

248{
249 Aig_Obj_t * pFanin, * pTemp;
250 int LevelOld, LevFanin, Lev, k;
251 assert( p->vLevelR != NULL );
252 assert( Aig_ObjIsNode(pObjNew) );
253 // allocate level if needed
254 if ( p->vLevels == NULL )
255 p->vLevels = Vec_VecAlloc( Aig_ManLevels(p) + 8 );
256 // check if level has changed
257 LevelOld = Aig_ObjReverseLevel(p, pObjNew);
258 if ( LevelOld == Aig_ObjReverseLevelNew(p, pObjNew) )
259 return;
260 // start the data structure for level update
261 // we cannot fail to visit a node when using this structure because the
262 // nodes are stored by their _old_ levels, which are assumed to be correct
263 Vec_VecClear( p->vLevels );
264 Vec_VecPush( p->vLevels, LevelOld, pObjNew );
265 pObjNew->fMarkA = 1;
266 // recursively update level
267 Vec_VecForEachEntryStart( Aig_Obj_t *, p->vLevels, pTemp, Lev, k, LevelOld )
268 {
269 pTemp->fMarkA = 0;
270 LevelOld = Aig_ObjReverseLevel(p, pTemp);
271 assert( LevelOld == Lev );
272 Aig_ObjSetReverseLevel( p, pTemp, Aig_ObjReverseLevelNew(p, pTemp) );
273 // if the level did not change, to need to check the fanout levels
274 if ( Aig_ObjReverseLevel(p, pTemp) == Lev )
275 continue;
276 // schedule fanins for level update
277 pFanin = Aig_ObjFanin0(pTemp);
278 if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA )
279 {
280 LevFanin = Aig_ObjReverseLevel( p, pFanin );
281 assert( LevFanin >= Lev );
282 Vec_VecPush( p->vLevels, LevFanin, pFanin );
283 pFanin->fMarkA = 1;
284 }
285 pFanin = Aig_ObjFanin1(pTemp);
286 if ( Aig_ObjIsNode(pFanin) && !pFanin->fMarkA )
287 {
288 LevFanin = Aig_ObjReverseLevel( p, pFanin );
289 assert( LevFanin >= Lev );
290 Vec_VecPush( p->vLevels, LevFanin, pFanin );
291 pFanin->fMarkA = 1;
292 }
293 }
294}
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◆ Aig_ManVerifyLevel()

void Aig_ManVerifyLevel ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Verifies direct level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 307 of file aigTiming.c.

308{
309 Aig_Obj_t * pObj;
310 int i, Counter = 0;
311 assert( p->pFanData );
312 Aig_ManForEachNode( p, pObj, i )
313 if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) )
314 {
315 printf( "Level of node %6d should be %4d instead of %4d.\n",
316 pObj->Id, Aig_ObjLevelNew(pObj), Aig_ObjLevel(pObj) );
317 Counter++;
318 }
319 if ( Counter )
320 printf( "Levels of %d nodes are incorrect.\n", Counter );
321}

◆ Aig_ManVerifyReverseLevel()

void Aig_ManVerifyReverseLevel ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Verifies reverse level of the nodes.]

Description []

SideEffects []

SeeAlso []

Definition at line 334 of file aigTiming.c.

335{
336 Aig_Obj_t * pObj;
337 int i, Counter = 0;
338 assert( p->vLevelR );
339 Aig_ManForEachNode( p, pObj, i )
340 if ( Aig_ObjLevel(pObj) != Aig_ObjLevelNew(pObj) )
341 {
342 printf( "Reverse level of node %6d should be %4d instead of %4d.\n",
343 pObj->Id, Aig_ObjReverseLevelNew(p, pObj), Aig_ObjReverseLevel(p, pObj) );
344 Counter++;
345 }
346 if ( Counter )
347 printf( "Reverse levels of %d nodes are incorrect.\n", Counter );
348}
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◆ Aig_ManVerifyTopoOrder()

int Aig_ManVerifyTopoOrder ( Aig_Man_t * p)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigDfs.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [DFS traversal procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigDfs.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Verifies that the objects are in a topo order.]

Description []

SideEffects []

SeeAlso []

Definition at line 46 of file aigDfs.c.

47{
48 Aig_Obj_t * pObj, * pNext;
49 int i, k, iBox, iTerm1, nTerms;
52 Aig_ManForEachObj( p, pObj, i )
53 {
54 if ( Aig_ObjIsNode(pObj) )
55 {
56 pNext = Aig_ObjFanin0(pObj);
57 if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
58 {
59 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
60 return 0;
61 }
62 pNext = Aig_ObjFanin1(pObj);
63 if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
64 {
65 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
66 return 0;
67 }
68 }
69 else if ( Aig_ObjIsCo(pObj) || Aig_ObjIsBuf(pObj) )
70 {
71 pNext = Aig_ObjFanin0(pObj);
72 if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
73 {
74 printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
75 return 0;
76 }
77 }
78 else if ( Aig_ObjIsCi(pObj) )
79 {
80 if ( p->pManTime )
81 {
82 iBox = Tim_ManBoxForCi( (Tim_Man_t *)p->pManTime, Aig_ObjCioId(pObj) );
83 if ( iBox >= 0 ) // this is not a true PI
84 {
85 iTerm1 = Tim_ManBoxInputFirst( (Tim_Man_t *)p->pManTime, iBox );
86 nTerms = Tim_ManBoxInputNum( (Tim_Man_t *)p->pManTime, iBox );
87 for ( k = 0; k < nTerms; k++ )
88 {
89 pNext = Aig_ManCo( p, iTerm1 + k );
90 assert( Tim_ManBoxForCo( (Tim_Man_t *)p->pManTime, Aig_ObjCioId(pNext) ) == iBox );
91 if ( !Aig_ObjIsTravIdCurrent(p,pNext) )
92 {
93 printf( "Box %d has input %d that is not in a topological order.\n", iBox, pNext->Id );
94 return 0;
95 }
96 }
97 }
98 }
99 }
100 else if ( !Aig_ObjIsConst1(pObj) )
101 assert( 0 );
102 Aig_ObjSetTravIdCurrent( p, pObj );
103 }
105 return 1;
106}
int Tim_ManBoxForCi(Tim_Man_t *p, int iCo)
Definition timBox.c:87
int Tim_ManBoxForCo(Tim_Man_t *p, int iCi)
Definition timBox.c:105
int Tim_ManBoxInputFirst(Tim_Man_t *p, int iBox)
Definition timBox.c:123
int Tim_ManBoxInputNum(Tim_Man_t *p, int iBox)
Definition timBox.c:187
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◆ Aig_Miter()

Aig_Obj_t * Aig_Miter ( Aig_Man_t * p,
Vec_Ptr_t * vPairs )
extern

Function*************************************************************

Synopsis [Implements the miter.]

Description []

SideEffects []

SeeAlso []

Definition at line 431 of file aigOper.c.

432{
433 int i;
434 assert( vPairs->nSize > 0 );
435 assert( vPairs->nSize % 2 == 0 );
436 for ( i = 0; i < vPairs->nSize; i += 2 )
437 vPairs->pArray[i/2] = Aig_Not( Aig_Exor( p, (Aig_Obj_t *)vPairs->pArray[i], (Aig_Obj_t *)vPairs->pArray[i+1] ) );
438 vPairs->nSize = vPairs->nSize/2;
439 return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vPairs->pArray, vPairs->nSize, AIG_OBJ_AND ) );
440}
Aig_Obj_t * Aig_Multi_rec(Aig_Man_t *p, Aig_Obj_t **ppObjs, int nObjs, Aig_Type_t Type)
Definition aigOper.c:392
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◆ Aig_MiterTwo()

Aig_Obj_t * Aig_MiterTwo ( Aig_Man_t * p,
Vec_Ptr_t * vNodes1,
Vec_Ptr_t * vNodes2 )
extern

Function*************************************************************

Synopsis [Implements the miter.]

Description []

SideEffects []

SeeAlso []

Definition at line 453 of file aigOper.c.

454{
455 int i;
456 assert( vNodes1->nSize > 0 && vNodes2->nSize > 0 );
457 assert( vNodes1->nSize == vNodes2->nSize );
458 for ( i = 0; i < vNodes1->nSize; i++ )
459 vNodes1->pArray[i] = Aig_Not( Aig_Exor( p, (Aig_Obj_t *)vNodes1->pArray[i], (Aig_Obj_t *)vNodes2->pArray[i] ) );
460 return Aig_Not( Aig_Multi_rec( p, (Aig_Obj_t **)vNodes1->pArray, vNodes1->nSize, AIG_OBJ_AND ) );
461}
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◆ Aig_MmFixedEntryFetch()

char * Aig_MmFixedEntryFetch ( Aig_MmFixed_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 161 of file aigMem.c.

162{
163 char * pTemp;
164 int i;
165
166 // check if there are still free entries
167 if ( p->nEntriesUsed == p->nEntriesAlloc )
168 { // need to allocate more entries
169 assert( p->pEntriesFree == NULL );
170 if ( p->nChunks == p->nChunksAlloc )
171 {
172 p->nChunksAlloc *= 2;
173 p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
174 }
175 p->pEntriesFree = ABC_ALLOC( char, p->nEntrySize * p->nChunkSize );
176 p->nMemoryAlloc += p->nEntrySize * p->nChunkSize;
177 // transform these entries into a linked list
178 pTemp = p->pEntriesFree;
179 for ( i = 1; i < p->nChunkSize; i++ )
180 {
181 *((char **)pTemp) = pTemp + p->nEntrySize;
182 pTemp += p->nEntrySize;
183 }
184 // set the last link
185 *((char **)pTemp) = NULL;
186 // add the chunk to the chunk storage
187 p->pChunks[ p->nChunks++ ] = p->pEntriesFree;
188 // add to the number of entries allocated
189 p->nEntriesAlloc += p->nChunkSize;
190 }
191 // incrememt the counter of used entries
192 p->nEntriesUsed++;
193 if ( p->nEntriesMax < p->nEntriesUsed )
194 p->nEntriesMax = p->nEntriesUsed;
195 // return the first entry in the free entry list
196 pTemp = p->pEntriesFree;
197 p->pEntriesFree = *((char **)pTemp);
198 return pTemp;
199}
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◆ Aig_MmFixedEntryRecycle()

void Aig_MmFixedEntryRecycle ( Aig_MmFixed_t * p,
char * pEntry )
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 212 of file aigMem.c.

213{
214 // decrement the counter of used entries
215 p->nEntriesUsed--;
216 // add the entry to the linked list of free entries
217 *((char **)pEntry) = p->pEntriesFree;
218 p->pEntriesFree = pEntry;
219}
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◆ Aig_MmFixedReadMaxEntriesUsed()

int Aig_MmFixedReadMaxEntriesUsed ( Aig_MmFixed_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 287 of file aigMem.c.

288{
289 return p->nEntriesMax;
290}

◆ Aig_MmFixedReadMemUsage()

int Aig_MmFixedReadMemUsage ( Aig_MmFixed_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 271 of file aigMem.c.

272{
273 return p->nMemoryAlloc;
274}
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◆ Aig_MmFixedRestart()

void Aig_MmFixedRestart ( Aig_MmFixed_t * p)
extern

Function*************************************************************

Synopsis []

Description [Relocates all the memory except the first chunk.]

SideEffects []

SeeAlso []

Definition at line 232 of file aigMem.c.

233{
234 int i;
235 char * pTemp;
236 if ( p->nChunks == 0 )
237 return;
238 // deallocate all chunks except the first one
239 for ( i = 1; i < p->nChunks; i++ )
240 ABC_FREE( p->pChunks[i] );
241 p->nChunks = 1;
242 // transform these entries into a linked list
243 pTemp = p->pChunks[0];
244 for ( i = 1; i < p->nChunkSize; i++ )
245 {
246 *((char **)pTemp) = pTemp + p->nEntrySize;
247 pTemp += p->nEntrySize;
248 }
249 // set the last link
250 *((char **)pTemp) = NULL;
251 // set the free entry list
252 p->pEntriesFree = p->pChunks[0];
253 // set the correct statistics
254 p->nMemoryAlloc = p->nEntrySize * p->nChunkSize;
255 p->nMemoryUsed = 0;
256 p->nEntriesAlloc = p->nChunkSize;
257 p->nEntriesUsed = 0;
258}
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◆ Aig_MmFixedStart()

Aig_MmFixed_t * Aig_MmFixedStart ( int nEntrySize,
int nEntriesMax )
extern

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Allocates memory pieces of fixed size.]

Description [The size of the chunk is computed as the minimum of 1024 entries and 64K. Can only work with entry size at least 4 byte long.]

SideEffects []

SeeAlso []

Definition at line 96 of file aigMem.c.

97{
99
100 p = ABC_ALLOC( Aig_MmFixed_t, 1 );
101 memset( p, 0, sizeof(Aig_MmFixed_t) );
102
103 p->nEntrySize = nEntrySize;
104 p->nEntriesAlloc = 0;
105 p->nEntriesUsed = 0;
106 p->pEntriesFree = NULL;
107
108 p->nChunkSize = nEntriesMax / 8;
109 if ( p->nChunkSize < 8 )
110 p->nChunkSize = 8;
111
112 p->nChunksAlloc = 64;
113 p->nChunks = 0;
114 p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
115
116 p->nMemoryUsed = 0;
117 p->nMemoryAlloc = 0;
118 return p;
119}
struct Aig_MmFixed_t_ Aig_MmFixed_t
Definition aig.h:52
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◆ Aig_MmFixedStop()

void Aig_MmFixedStop ( Aig_MmFixed_t * p,
int fVerbose )
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 132 of file aigMem.c.

133{
134 int i;
135 if ( p == NULL )
136 return;
137 if ( fVerbose )
138 {
139 printf( "Fixed memory manager: Entry = %5d. Chunk = %5d. Chunks used = %5d.\n",
140 p->nEntrySize, p->nChunkSize, p->nChunks );
141 printf( " Entries used = %8d. Entries peak = %8d. Memory used = %8d. Memory alloc = %8d.\n",
142 p->nEntriesUsed, p->nEntriesMax, p->nEntrySize * p->nEntriesUsed, p->nMemoryAlloc );
143 }
144 for ( i = 0; i < p->nChunks; i++ )
145 ABC_FREE( p->pChunks[i] );
146 ABC_FREE( p->pChunks );
147 ABC_FREE( p );
148}
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◆ Aig_MmFlexEntryFetch()

char * Aig_MmFlexEntryFetch ( Aig_MmFlex_t * p,
int nBytes )
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 366 of file aigMem.c.

367{
368 char * pTemp;
369#ifdef ABC_MEMALIGN
370 // extend size to max alignment
371 nBytes += (ABC_MEMALIGN - nBytes % ABC_MEMALIGN) % ABC_MEMALIGN;
372#endif
373 // check if there are still free entries
374 if ( p->pCurrent == NULL || p->pCurrent + nBytes > p->pEnd )
375 { // need to allocate more entries
376 if ( p->nChunks == p->nChunksAlloc )
377 {
378 p->nChunksAlloc *= 2;
379 p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
380 }
381 if ( nBytes > p->nChunkSize )
382 {
383 // resize the chunk size if more memory is requested than it can give
384 // (ideally, this should never happen)
385 p->nChunkSize = 2 * nBytes;
386 }
387 p->pCurrent = ABC_ALLOC( char, p->nChunkSize );
388 p->pEnd = p->pCurrent + p->nChunkSize;
389 p->nMemoryAlloc += p->nChunkSize;
390 // add the chunk to the chunk storage
391 p->pChunks[ p->nChunks++ ] = p->pCurrent;
392 }
393 assert( p->pCurrent + nBytes <= p->pEnd );
394 // increment the counter of used entries
395 p->nEntriesUsed++;
396 // keep track of the memory used
397 p->nMemoryUsed += nBytes;
398 // return the next entry
399 pTemp = p->pCurrent;
400 p->pCurrent += nBytes;
401 return pTemp;
402}
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◆ Aig_MmFlexReadMemUsage()

int Aig_MmFlexReadMemUsage ( Aig_MmFlex_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 443 of file aigMem.c.

444{
445 return p->nMemoryUsed;
446}

◆ Aig_MmFlexRestart()

void Aig_MmFlexRestart ( Aig_MmFlex_t * p)
extern

Function*************************************************************

Synopsis []

Description [Relocates all the memory except the first chunk.]

SideEffects []

SeeAlso []

Definition at line 415 of file aigMem.c.

416{
417 int i;
418 if ( p->nChunks == 0 )
419 return;
420 // deallocate all chunks except the first one
421 for ( i = 1; i < p->nChunks; i++ )
422 ABC_FREE( p->pChunks[i] );
423 p->nChunks = 1;
424 p->nMemoryAlloc = p->nChunkSize;
425 // transform these entries into a linked list
426 p->pCurrent = p->pChunks[0];
427 p->pEnd = p->pCurrent + p->nChunkSize;
428 p->nEntriesUsed = 0;
429 p->nMemoryUsed = 0;
430}
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◆ Aig_MmFlexStart()

Aig_MmFlex_t * Aig_MmFlexStart ( )
extern

Function*************************************************************

Synopsis [Allocates entries of flexible size.]

Description [Can only work with entry size at least 4 byte long.]

SideEffects []

SeeAlso []

Definition at line 305 of file aigMem.c.

306{
307 Aig_MmFlex_t * p;
308
309 p = ABC_ALLOC( Aig_MmFlex_t, 1 );
310 memset( p, 0, sizeof(Aig_MmFlex_t) );
311
312 p->nEntriesUsed = 0;
313 p->pCurrent = NULL;
314 p->pEnd = NULL;
315
316 p->nChunkSize = (1 << 18);
317 p->nChunksAlloc = 64;
318 p->nChunks = 0;
319 p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
320
321 p->nMemoryUsed = 0;
322 p->nMemoryAlloc = 0;
323 return p;
324}
struct Aig_MmFlex_t_ Aig_MmFlex_t
Definition aig.h:53
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◆ Aig_MmFlexStop()

void Aig_MmFlexStop ( Aig_MmFlex_t * p,
int fVerbose )
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 337 of file aigMem.c.

338{
339 int i;
340 if ( p == NULL )
341 return;
342 if ( fVerbose )
343 {
344 printf( "Flexible memory manager: Chunk size = %d. Chunks used = %d.\n",
345 p->nChunkSize, p->nChunks );
346 printf( " Entries used = %d. Memory used = %d. Memory alloc = %d.\n",
347 p->nEntriesUsed, p->nMemoryUsed, p->nMemoryAlloc );
348 }
349 for ( i = 0; i < p->nChunks; i++ )
350 ABC_FREE( p->pChunks[i] );
351 ABC_FREE( p->pChunks );
352 ABC_FREE( p );
353}
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◆ Aig_MmStepEntryFetch()

char * Aig_MmStepEntryFetch ( Aig_MmStep_t * p,
int nBytes )
extern

Function*************************************************************

Synopsis [Creates the entry.]

Description []

SideEffects []

SeeAlso []

Definition at line 538 of file aigMem.c.

539{
540 if ( nBytes == 0 )
541 return NULL;
542#ifdef ABC_MEMALIGN
543 // extend size to max alignment
544 nBytes += (ABC_MEMALIGN - nBytes % ABC_MEMALIGN) % ABC_MEMALIGN;
545#endif
546 if ( nBytes > p->nMapSize )
547 {
548 if ( p->nChunks == p->nChunksAlloc )
549 {
550 p->nChunksAlloc *= 2;
551 p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
552 }
553 p->pChunks[ p->nChunks++ ] = ABC_ALLOC( char, nBytes );
554 return p->pChunks[p->nChunks-1];
555 }
556 return Aig_MmFixedEntryFetch( p->pMap[nBytes] );
557}
char * Aig_MmFixedEntryFetch(Aig_MmFixed_t *p)
Definition aigMem.c:161
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◆ Aig_MmStepEntryRecycle()

void Aig_MmStepEntryRecycle ( Aig_MmStep_t * p,
char * pEntry,
int nBytes )
extern

Function*************************************************************

Synopsis [Recycles the entry.]

Description []

SideEffects []

SeeAlso []

Definition at line 571 of file aigMem.c.

572{
573 if ( nBytes == 0 )
574 return;
575#ifdef ABC_MEMALIGN
576 // extend size to max alignment
577 nBytes += (ABC_MEMALIGN - nBytes % ABC_MEMALIGN) % ABC_MEMALIGN;
578#endif
579 if ( nBytes > p->nMapSize )
580 {
581// ABC_FREE( pEntry );
582 return;
583 }
584 Aig_MmFixedEntryRecycle( p->pMap[nBytes], pEntry );
585}
void Aig_MmFixedEntryRecycle(Aig_MmFixed_t *p, char *pEntry)
Definition aigMem.c:212
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◆ Aig_MmStepReadMemUsage()

int Aig_MmStepReadMemUsage ( Aig_MmStep_t * p)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 598 of file aigMem.c.

599{
600 int i, nMemTotal = 0;
601 for ( i = 0; i < p->nMems; i++ )
602 nMemTotal += p->pMems[i]->nMemoryAlloc;
603 return nMemTotal;
604}

◆ Aig_MmStepStart()

Aig_MmStep_t * Aig_MmStepStart ( int nSteps)
extern

Function*************************************************************

Synopsis [Starts the hierarchical memory manager.]

Description [This manager can allocate entries of any size. Iternally they are mapped into the entries with the number of bytes equal to the power of 2. The smallest entry size is 8 bytes. The next one is 16 bytes etc. So, if the user requests 6 bytes, he gets 8 byte entry. If we asks for 25 bytes, he gets 32 byte entry etc. The input parameters "nSteps" says how many fixed memory managers are employed internally. Calling this procedure with nSteps equal to 10 results in 10 hierarchically arranged internal memory managers, which can allocate up to 4096 (1Kb) entries. Requests for larger entries are handed over to malloc() and then ABC_FREE()ed.]

SideEffects []

SeeAlso []

Definition at line 472 of file aigMem.c.

473{
474 Aig_MmStep_t * p;
475 int i, k;
476 p = ABC_ALLOC( Aig_MmStep_t, 1 );
477 memset( p, 0, sizeof(Aig_MmStep_t) );
478 p->nMems = nSteps;
479 // start the fixed memory managers
480 p->pMems = ABC_ALLOC( Aig_MmFixed_t *, p->nMems );
481 for ( i = 0; i < p->nMems; i++ )
482 p->pMems[i] = Aig_MmFixedStart( (8<<i), (1<<13) );
483 // set up the mapping of the required memory size into the corresponding manager
484 p->nMapSize = (4<<p->nMems);
485 p->pMap = ABC_ALLOC( Aig_MmFixed_t *, p->nMapSize+1 );
486 p->pMap[0] = NULL;
487 for ( k = 1; k <= 4; k++ )
488 p->pMap[k] = p->pMems[0];
489 for ( i = 0; i < p->nMems; i++ )
490 for ( k = (4<<i)+1; k <= (8<<i); k++ )
491 p->pMap[k] = p->pMems[i];
492//for ( i = 1; i < 100; i ++ )
493//printf( "%10d: size = %10d\n", i, p->pMap[i]->nEntrySize );
494 p->nChunksAlloc = 64;
495 p->nChunks = 0;
496 p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
497 return p;
498}
struct Aig_MmStep_t_ Aig_MmStep_t
Definition aig.h:54
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◆ Aig_MmStepStop()

void Aig_MmStepStop ( Aig_MmStep_t * p,
int fVerbose )
extern

Function*************************************************************

Synopsis [Stops the memory manager.]

Description []

SideEffects []

SeeAlso []

Definition at line 511 of file aigMem.c.

512{
513 int i;
514 for ( i = 0; i < p->nMems; i++ )
515 Aig_MmFixedStop( p->pMems[i], fVerbose );
516 if ( p->nChunksAlloc )
517 {
518 for ( i = 0; i < p->nChunks; i++ )
519 ABC_FREE( p->pChunks[i] );
520 ABC_FREE( p->pChunks );
521 }
522 ABC_FREE( p->pMems );
523 ABC_FREE( p->pMap );
524 ABC_FREE( p );
525}
void Aig_MmFixedStop(Aig_MmFixed_t *p, int fVerbose)
Definition aigMem.c:132
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◆ Aig_Multi()

Aig_Obj_t * Aig_Multi ( Aig_Man_t * p,
Aig_Obj_t ** pArgs,
int nArgs,
Aig_Type_t Type )
extern

Function*************************************************************

Synopsis [Old code.]

Description []

SideEffects []

SeeAlso []

Definition at line 413 of file aigOper.c.

414{
415 assert( Type == AIG_OBJ_AND || Type == AIG_OBJ_EXOR );
416 assert( nArgs > 0 );
417 return Aig_Multi_rec( p, pArgs, nArgs, Type );
418}
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◆ Aig_Mux()

Aig_Obj_t * Aig_Mux ( Aig_Man_t * p,
Aig_Obj_t * pC,
Aig_Obj_t * p1,
Aig_Obj_t * p0 )
extern

Function*************************************************************

Synopsis [Implements ITE operation.]

Description []

SideEffects []

SeeAlso []

Definition at line 317 of file aigOper.c.

318{
319 int fUseMuxCanon = 0;
320 Aig_Obj_t * pTempA1, * pTempA2, * pTempB1, * pTempB2, * pTemp;
321 int Count0, Count1;
322 if ( !fUseMuxCanon )
323 return Aig_Mux2( p, pC, p1, p0 );
324 if ( p0 == p1 )
325 return p0;
326 if ( p1 == Aig_Not(p0) )
327 return Aig_Exor( p, pC, p0 );
328 if ( pC == Aig_ManConst0(p) )
329 return p0;
330 if ( pC == Aig_ManConst1(p) )
331 return p1;
332 if ( p0 == Aig_ManConst0(p) )
333 return Aig_And( p, pC, p1 );
334 if ( p0 == Aig_ManConst1(p) )
335 return Aig_Or( p, Aig_Not(pC), p1 );
336 if ( p1 == Aig_ManConst0(p) )
337 return Aig_And( p, Aig_Not(pC), p0 );
338 if ( p1 == Aig_ManConst1(p) )
339 return Aig_Or( p, pC, p0 );
340 // implement the first MUX (F = C * x1 + C' * x0)
341 pTempA1 = Aig_TableLookupInt( p, pC, p1 );
342 pTempA2 = Aig_TableLookupInt( p, Aig_Not(pC), p0 );
343 if ( pTempA1 && pTempA2 )
344 {
345 pTemp = Aig_TableLookupInt( p, Aig_Not(pTempA1), Aig_Not(pTempA2) );
346 if ( pTemp ) return Aig_Not(pTemp);
347 }
348 Count0 = (pTempA1 != NULL) + (pTempA2 != NULL);
349 // implement the second MUX (F' = C * x1' + C' * x0')
350 pTempB1 = Aig_TableLookupInt( p, pC, Aig_Not(p1) );
351 pTempB2 = Aig_TableLookupInt( p, Aig_Not(pC), Aig_Not(p0) );
352 if ( pTempB1 && pTempB2 )
353 {
354 pTemp = Aig_TableLookupInt( p, Aig_Not(pTempB1), Aig_Not(pTempB2) );
355 if ( pTemp ) return pTemp;
356 }
357 Count1 = (pTempB1 != NULL) + (pTempB2 != NULL);
358 // compare and decide which one to implement
359 if ( Count0 >= Count1 )
360 return Aig_Or( p, Aig_And(p, pC, p1), Aig_And(p, Aig_Not(pC), p0) );
361 return Aig_Not( Aig_Or( p, Aig_And(p, pC, Aig_Not(p1)), Aig_And(p, Aig_Not(pC), Aig_Not(p0)) ) );
362// return Aig_Or( p, Aig_And(p, pC, p1), Aig_And(p, Aig_Not(pC), p0) );
363}
Aig_Obj_t * Aig_Mux2(Aig_Man_t *p, Aig_Obj_t *pC, Aig_Obj_t *p1, Aig_Obj_t *p0)
Definition aigOper.c:301
Aig_Obj_t * Aig_TableLookupInt(Aig_Man_t *p, Aig_Obj_t *p0, Aig_Obj_t *p1)
Definition aigOper.c:275
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◆ Aig_NodeDeref_rec()

int Aig_NodeDeref_rec ( Aig_Obj_t * pNode,
unsigned LevelMin,
float * pPower,
float * pProbs )
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigMffc.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Computation of MFFCs.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigMffc.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Dereferences the node's MFFC.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigMffc.c.

46{
47 float Power0 = 0.0, Power1 = 0.0;
48 Aig_Obj_t * pFanin;
49 int Counter = 0;
50 if ( pProbs )
51 *pPower = 0.0;
52 if ( Aig_ObjIsCi(pNode) )
53 return 0;
54 // consider the first fanin
55 pFanin = Aig_ObjFanin0(pNode);
56 assert( pFanin->nRefs > 0 );
57 if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) )
58 Counter += Aig_NodeDeref_rec( pFanin, LevelMin, &Power0, pProbs );
59 if ( pProbs )
60 *pPower += Power0 + 2.0 * pProbs[pFanin->Id] * (1.0 - pProbs[pFanin->Id]);
61 // skip the buffer
62 if ( Aig_ObjIsBuf(pNode) )
63 return Counter;
64 assert( Aig_ObjIsNode(pNode) );
65 // consider the second fanin
66 pFanin = Aig_ObjFanin1(pNode);
67 assert( pFanin->nRefs > 0 );
68 if ( --pFanin->nRefs == 0 && (!LevelMin || pFanin->Level > LevelMin) )
69 Counter += Aig_NodeDeref_rec( pFanin, LevelMin, &Power1, pProbs );
70 if ( pProbs )
71 *pPower += Power1 + 2.0 * pProbs[pFanin->Id] * (1.0 - pProbs[pFanin->Id]);
72 return Counter + 1;
73}
ABC_NAMESPACE_IMPL_START int Aig_NodeDeref_rec(Aig_Obj_t *pNode, unsigned LevelMin, float *pPower, float *pProbs)
DECLARATIONS ///.
Definition aigMffc.c:45
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◆ Aig_NodeIntersectLists()

void Aig_NodeIntersectLists ( Vec_Ptr_t * vArr1,
Vec_Ptr_t * vArr2,
Vec_Ptr_t * vArr )
extern

Function*************************************************************

Synopsis [Returns the result of intersecting the two vectors.]

Description [Assumes that the vectors are sorted in the increasing order.]

SideEffects []

SeeAlso []

Definition at line 1277 of file aigUtil.c.

1278{
1279 Aig_Obj_t ** pBeg = (Aig_Obj_t **)vArr->pArray;
1280 Aig_Obj_t ** pBeg1 = (Aig_Obj_t **)vArr1->pArray;
1281 Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
1282 Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
1283 Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
1284 Vec_PtrGrow( vArr, Abc_MaxInt( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
1285 pBeg = (Aig_Obj_t **)vArr->pArray;
1286 while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
1287 {
1288 if ( (*pBeg1)->Id == (*pBeg2)->Id )
1289 *pBeg++ = *pBeg1++, pBeg2++;
1290 else if ( (*pBeg1)->Id < (*pBeg2)->Id )
1291// *pBeg++ = *pBeg1++;
1292 pBeg1++;
1293 else
1294// *pBeg++ = *pBeg2++;
1295 pBeg2++;
1296 }
1297// while ( pBeg1 < pEnd1 )
1298// *pBeg++ = *pBeg1++;
1299// while ( pBeg2 < pEnd2 )
1300// *pBeg++ = *pBeg2++;
1301 vArr->nSize = pBeg - (Aig_Obj_t **)vArr->pArray;
1302 assert( vArr->nSize <= vArr->nCap );
1303 assert( vArr->nSize <= vArr1->nSize );
1304 assert( vArr->nSize <= vArr2->nSize );
1305}

◆ Aig_NodeMffcExtendCut()

int Aig_NodeMffcExtendCut ( Aig_Man_t * p,
Aig_Obj_t * pNode,
Vec_Ptr_t * vLeaves,
Vec_Ptr_t * vResult )
extern

Function*************************************************************

Synopsis [Expands the cut by adding the most closely related node.]

Description [Returns 1 if the cut exists.]

SideEffects []

SeeAlso []

Definition at line 265 of file aigMffc.c.

266{
267 Aig_Obj_t * pObj, * pLeafBest;
268 int i, LevelMax, ConeSize1, ConeSize2, ConeCur1, ConeCur2, ConeBest;
269 // dereference the current cut
270 LevelMax = 0;
271 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
272 LevelMax = Abc_MaxInt( LevelMax, (int)pObj->Level );
273 if ( LevelMax == 0 )
274 return 0;
275 // dereference the cut
276 ConeSize1 = Aig_NodeDeref_rec( pNode, 0, NULL, NULL );
277 // try expanding each node in the boundary
278 ConeBest = ABC_INFINITY;
279 pLeafBest = NULL;
280 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
281 {
282 if ( (int)pObj->Level != LevelMax )
283 continue;
284 ConeCur1 = Aig_NodeDeref_rec( pObj, 0, NULL, NULL );
285 if ( ConeBest > ConeCur1 )
286 {
287 ConeBest = ConeCur1;
288 pLeafBest = pObj;
289 }
290 ConeCur2 = Aig_NodeRef_rec( pObj, 0 );
291 assert( ConeCur1 == ConeCur2 );
292 }
293 assert( pLeafBest != NULL );
294 assert( Aig_ObjIsNode(pLeafBest) );
295 // deref the best leaf
296 ConeCur1 = Aig_NodeDeref_rec( pLeafBest, 0, NULL, NULL );
297 // collect the cut nodes
298 Vec_PtrClear( vResult );
300 Aig_NodeMffcSupp_rec( p, pNode, 0, vResult, 1, pLeafBest );
301 // ref the nodes
302 ConeCur2 = Aig_NodeRef_rec( pLeafBest, 0 );
303 assert( ConeCur1 == ConeCur2 );
304 // ref the original node
305 ConeSize2 = Aig_NodeRef_rec( pNode, 0 );
306 assert( ConeSize1 == ConeSize2 );
307 return 1;
308}
#define ABC_INFINITY
MACRO DEFINITIONS ///.
Definition abc_global.h:250
void Aig_NodeMffcSupp_rec(Aig_Man_t *p, Aig_Obj_t *pNode, unsigned LevelMin, Vec_Ptr_t *vSupp, int fTopmost, Aig_Obj_t *pObjSkip)
Definition aigMffc.c:150
int Aig_NodeRef_rec(Aig_Obj_t *pNode, unsigned LevelMin)
Definition aigMffc.c:86
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◆ Aig_NodeMffcLabel()

int Aig_NodeMffcLabel ( Aig_Man_t * p,
Aig_Obj_t * pNode,
float * pPower )
extern

Function*************************************************************

Synopsis [Labels the nodes in the MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 211 of file aigMffc.c.

212{
213 int ConeSize1, ConeSize2;
214 assert( (pPower != NULL) == (p->vProbs != NULL) );
215 assert( !Aig_IsComplement(pNode) );
216 assert( Aig_ObjIsNode(pNode) );
218 ConeSize1 = Aig_NodeDeref_rec( pNode, 0, pPower, p->vProbs? (float *)p->vProbs->pArray : NULL );
219 ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 );
220 assert( ConeSize1 == ConeSize2 );
221 assert( ConeSize1 > 0 );
222 return ConeSize1;
223}
int Aig_NodeRefLabel_rec(Aig_Man_t *p, Aig_Obj_t *pNode, unsigned LevelMin)
Definition aigMffc.c:118
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◆ Aig_NodeMffcLabelCut()

int Aig_NodeMffcLabelCut ( Aig_Man_t * p,
Aig_Obj_t * pNode,
Vec_Ptr_t * vLeaves )
extern

Function*************************************************************

Synopsis [Labels the nodes in the MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 236 of file aigMffc.c.

237{
238 Aig_Obj_t * pObj;
239 int i, ConeSize1, ConeSize2;
240 assert( !Aig_IsComplement(pNode) );
241 assert( Aig_ObjIsNode(pNode) );
243 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
244 pObj->nRefs++;
245 ConeSize1 = Aig_NodeDeref_rec( pNode, 0, NULL, NULL );
246 ConeSize2 = Aig_NodeRefLabel_rec( p, pNode, 0 );
247 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
248 pObj->nRefs--;
249 assert( ConeSize1 == ConeSize2 );
250 assert( ConeSize1 > 0 );
251 return ConeSize1;
252}
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◆ Aig_NodeMffcSupp()

int Aig_NodeMffcSupp ( Aig_Man_t * p,
Aig_Obj_t * pNode,
int LevelMin,
Vec_Ptr_t * vSupp )
extern

Function*************************************************************

Synopsis [Collects the support of depth-limited MFFC.]

Description [Returns the number of internal nodes in the MFFC.]

SideEffects []

SeeAlso []

Definition at line 179 of file aigMffc.c.

180{
181 int ConeSize1, ConeSize2;
182 if ( vSupp ) Vec_PtrClear( vSupp );
183 if ( !Aig_ObjIsNode(pNode) )
184 {
185 if ( Aig_ObjIsCi(pNode) && vSupp )
186 Vec_PtrPush( vSupp, pNode );
187 return 0;
188 }
189 assert( !Aig_IsComplement(pNode) );
190 assert( Aig_ObjIsNode(pNode) );
192 ConeSize1 = Aig_NodeDeref_rec( pNode, LevelMin, NULL, NULL );
193 Aig_NodeMffcSupp_rec( p, pNode, LevelMin, vSupp, 1, NULL );
194 ConeSize2 = Aig_NodeRef_rec( pNode, LevelMin );
195 assert( ConeSize1 == ConeSize2 );
196 assert( ConeSize1 > 0 );
197 return ConeSize1;
198}
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◆ Aig_NodeRef_rec()

int Aig_NodeRef_rec ( Aig_Obj_t * pNode,
unsigned LevelMin )
extern

Function*************************************************************

Synopsis [References the node's MFFC.]

Description []

SideEffects []

SeeAlso []

Definition at line 86 of file aigMffc.c.

87{
88 Aig_Obj_t * pFanin;
89 int Counter = 0;
90 if ( Aig_ObjIsCi(pNode) )
91 return 0;
92 // consider the first fanin
93 pFanin = Aig_ObjFanin0(pNode);
94 if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) )
95 Counter += Aig_NodeRef_rec( pFanin, LevelMin );
96 // skip the buffer
97 if ( Aig_ObjIsBuf(pNode) )
98 return Counter;
99 assert( Aig_ObjIsNode(pNode) );
100 // consider the second fanin
101 pFanin = Aig_ObjFanin1(pNode);
102 if ( pFanin->nRefs++ == 0 && (!LevelMin || pFanin->Level > LevelMin) )
103 Counter += Aig_NodeRef_rec( pFanin, LevelMin );
104 return Counter + 1;
105}
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◆ Aig_NodeUnionLists()

void Aig_NodeUnionLists ( Vec_Ptr_t * vArr1,
Vec_Ptr_t * vArr2,
Vec_Ptr_t * vArr )
extern

Function*************************************************************

Synopsis [Returns the result of merging the two vectors.]

Description [Assumes that the vectors are sorted in the increasing order.]

SideEffects []

SeeAlso []

Definition at line 1238 of file aigUtil.c.

1239{
1240 Aig_Obj_t ** pBeg = (Aig_Obj_t **)vArr->pArray;
1241 Aig_Obj_t ** pBeg1 = (Aig_Obj_t **)vArr1->pArray;
1242 Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
1243 Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
1244 Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
1245 Vec_PtrGrow( vArr, Vec_PtrSize(vArr1) + Vec_PtrSize(vArr2) );
1246 pBeg = (Aig_Obj_t **)vArr->pArray;
1247 while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
1248 {
1249 if ( (*pBeg1)->Id == (*pBeg2)->Id )
1250 *pBeg++ = *pBeg1++, pBeg2++;
1251 else if ( (*pBeg1)->Id < (*pBeg2)->Id )
1252 *pBeg++ = *pBeg1++;
1253 else
1254 *pBeg++ = *pBeg2++;
1255 }
1256 while ( pBeg1 < pEnd1 )
1257 *pBeg++ = *pBeg1++;
1258 while ( pBeg2 < pEnd2 )
1259 *pBeg++ = *pBeg2++;
1260 vArr->nSize = pBeg - (Aig_Obj_t **)vArr->pArray;
1261 assert( vArr->nSize <= vArr->nCap );
1262 assert( vArr->nSize >= vArr1->nSize );
1263 assert( vArr->nSize >= vArr2->nSize );
1264}

◆ Aig_ObjAddFanout()

void Aig_ObjAddFanout ( Aig_Man_t * p,
Aig_Obj_t * pObj,
Aig_Obj_t * pFanout )
extern

Function*************************************************************

Synopsis [Adds fanout (pFanout) of node (pObj).]

Description []

SideEffects []

SeeAlso []

Definition at line 107 of file aigFanout.c.

108{
109 int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext;
110 assert( p->pFanData );
111 assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) );
112 assert( pFanout->Id > 0 );
113 if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc )
114 {
115 int nFansAlloc = 2 * Abc_MaxInt( pObj->Id, pFanout->Id );
116 p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
117 memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
118 p->nFansAlloc = nFansAlloc;
119 }
120 assert( pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc );
121 iFan = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) );
122 pPrevC = Aig_FanoutPrev( p->pFanData, iFan );
123 pNextC = Aig_FanoutNext( p->pFanData, iFan );
124 pFirst = Aig_FanoutObj( p->pFanData, pObj->Id );
125 if ( *pFirst == 0 )
126 {
127 *pFirst = iFan;
128 *pPrevC = iFan;
129 *pNextC = iFan;
130 }
131 else
132 {
133 pPrev = Aig_FanoutPrev( p->pFanData, *pFirst );
134 pNext = Aig_FanoutNext( p->pFanData, *pPrev );
135 assert( *pNext == *pFirst );
136 *pPrevC = *pPrev;
137 *pNextC = *pFirst;
138 *pPrev = iFan;
139 *pNext = iFan;
140 }
141}
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◆ Aig_ObjCheckTfi()

int Aig_ObjCheckTfi ( Aig_Man_t * p,
Aig_Obj_t * pNew,
Aig_Obj_t * pOld )
extern

Function*************************************************************

Synopsis [Returns 1 if pOld is in the TFI of pNew.]

Description []

SideEffects []

SeeAlso []

Definition at line 435 of file aigRepr.c.

436{
437 assert( !Aig_IsComplement(pNew) );
438 assert( !Aig_IsComplement(pOld) );
440 return Aig_ObjCheckTfi_rec( p, pNew, pOld );
441}
int Aig_ObjCheckTfi_rec(Aig_Man_t *p, Aig_Obj_t *pNode, Aig_Obj_t *pOld)
Definition aigRepr.c:400
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◆ Aig_ObjCleanData_rec()

void Aig_ObjCleanData_rec ( Aig_Obj_t * pObj)
extern

Function*************************************************************

Synopsis [Recursively cleans the data pointers in the cone of the node.]

Description [Applicable to small AIGs only because no caching is performed.]

SideEffects []

SeeAlso []

Definition at line 243 of file aigUtil.c.

244{
245 assert( !Aig_IsComplement(pObj) );
246 assert( !Aig_ObjIsCo(pObj) );
247 if ( Aig_ObjIsAnd(pObj) )
248 {
249 Aig_ObjCleanData_rec( Aig_ObjFanin0(pObj) );
250 Aig_ObjCleanData_rec( Aig_ObjFanin1(pObj) );
251 }
252 pObj->pData = NULL;
253}
void Aig_ObjCleanData_rec(Aig_Obj_t *pObj)
Definition aigUtil.c:243
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◆ Aig_ObjClearReverseLevel()

void Aig_ObjClearReverseLevel ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Resets reverse level of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 83 of file aigTiming.c.

84{
85 Aig_ObjSetReverseLevel( p, pObj, 0 );
86}
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◆ Aig_ObjCollectCut()

void Aig_ObjCollectCut ( Aig_Obj_t * pRoot,
Vec_Ptr_t * vLeaves,
Vec_Ptr_t * vNodes )
extern

Function*************************************************************

Synopsis [Computes the internal nodes of the cut.]

Description [Does not include the leaves of the cut.]

SideEffects []

SeeAlso []

Definition at line 1031 of file aigDfs.c.

1032{
1033 Aig_Obj_t * pObj;
1034 int i;
1035 // collect and mark the leaves
1036 Vec_PtrClear( vNodes );
1037 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
1038 {
1039 assert( pObj->fMarkA == 0 );
1040 pObj->fMarkA = 1;
1041// printf( "%d " , pObj->Id );
1042 }
1043//printf( "\n" );
1044 // collect and mark the nodes
1045 Aig_ObjCollectCut_rec( pRoot, vNodes );
1046 // clean the nodes
1047 Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
1048 pObj->fMarkA = 0;
1049 Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
1050 pObj->fMarkA = 0;
1051}
void Aig_ObjCollectCut_rec(Aig_Obj_t *pNode, Vec_Ptr_t *vNodes)
Definition aigDfs.c:1006
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◆ Aig_ObjCollectMulti()

void Aig_ObjCollectMulti ( Aig_Obj_t * pRoot,
Vec_Ptr_t * vSuper )
extern

Function*************************************************************

Synopsis [Detects multi-input gate rooted at this node.]

Description []

SideEffects []

SeeAlso []

Definition at line 289 of file aigUtil.c.

290{
291 assert( !Aig_IsComplement(pRoot) );
292 Vec_PtrClear( vSuper );
293 Aig_ObjCollectMulti_rec( pRoot, pRoot, vSuper );
294}
void Aig_ObjCollectMulti_rec(Aig_Obj_t *pRoot, Aig_Obj_t *pObj, Vec_Ptr_t *vSuper)
Definition aigUtil.c:267
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◆ Aig_ObjCollectSuper()

int Aig_ObjCollectSuper ( Aig_Obj_t * pObj,
Vec_Ptr_t * vSuper )
extern

Function*************************************************************

Synopsis [Collects the nodes of the supergate.]

Description []

SideEffects []

SeeAlso []

Definition at line 1111 of file aigDfs.c.

1112{
1113 int RetValue, i;
1114 assert( !Aig_IsComplement(pObj) );
1115 assert( Aig_ObjIsNode(pObj) );
1116 // collect the nodes in the implication supergate
1117 Vec_PtrClear( vSuper );
1118 RetValue = Aig_ObjCollectSuper_rec( pObj, pObj, vSuper );
1119 assert( Vec_PtrSize(vSuper) > 1 );
1120 // unmark the visited nodes
1121 Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pObj, i )
1122 Aig_Regular(pObj)->fMarkA = 0;
1123 // if we found the node and its complement in the same implication supergate,
1124 // return empty set of nodes (meaning that we should use constant-0 node)
1125 if ( RetValue == -1 )
1126 vSuper->nSize = 0;
1127 return RetValue;
1128}
int Aig_ObjCollectSuper_rec(Aig_Obj_t *pRoot, Aig_Obj_t *pObj, Vec_Ptr_t *vSuper)
Definition aigDfs.c:1065
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◆ Aig_ObjCompareIdIncrease()

int Aig_ObjCompareIdIncrease ( Aig_Obj_t ** pp1,
Aig_Obj_t ** pp2 )
extern

Function*************************************************************

Synopsis [Procedure used for sorting the nodes in increasing order of IDs.]

Description []

SideEffects []

SeeAlso []

Definition at line 496 of file aigUtil.c.

497{
498 int Diff = Aig_ObjId(*pp1) - Aig_ObjId(*pp2);
499 if ( Diff < 0 )
500 return -1;
501 if ( Diff > 0 )
502 return 1;
503 return 0;
504}
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◆ Aig_ObjConnect()

void Aig_ObjConnect ( Aig_Man_t * p,
Aig_Obj_t * pObj,
Aig_Obj_t * pFan0,
Aig_Obj_t * pFan1 )
extern

Function*************************************************************

Synopsis [Connect the object to the fanin.]

Description []

SideEffects []

SeeAlso []

Definition at line 126 of file aigObj.c.

127{
128 assert( !Aig_IsComplement(pObj) );
129 assert( !Aig_ObjIsCi(pObj) );
130 // add the first fanin
131 pObj->pFanin0 = pFan0;
132 pObj->pFanin1 = pFan1;
133 // increment references of the fanins and add their fanouts
134 if ( pFan0 != NULL )
135 {
136 assert( Aig_ObjFanin0(pObj)->Type > 0 );
137 Aig_ObjRef( Aig_ObjFanin0(pObj) );
138 if ( p->pFanData )
139 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
140 }
141 if ( pFan1 != NULL )
142 {
143 assert( Aig_ObjFanin1(pObj)->Type > 0 );
144 Aig_ObjRef( Aig_ObjFanin1(pObj) );
145 if ( p->pFanData )
146 Aig_ObjAddFanout( p, Aig_ObjFanin1(pObj), pObj );
147 }
148 // set level and phase
149 pObj->Level = Aig_ObjLevelNew( pObj );
150 pObj->fPhase = Aig_ObjPhaseReal(pFan0) & Aig_ObjPhaseReal(pFan1);
151 // add the node to the structural hash table
152 if ( p->pTable && Aig_ObjIsHash(pObj) )
153 Aig_TableInsert( p, pObj );
154 // add the node to the dynamically updated topological order
155// if ( p->pOrderData && Aig_ObjIsNode(pObj) )
156// Aig_ObjOrderInsert( p, pObj->Id );
157 assert( !Aig_ObjIsNode(pObj) || pObj->Level > 0 );
158}
void Aig_TableInsert(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigTable.c:173
void Aig_ObjAddFanout(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFanout)
Definition aigFanout.c:107
Aig_Obj_t * pFanin1
Definition aig.h:76
Aig_Obj_t * pFanin0
Definition aig.h:75
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◆ Aig_ObjCreate()

Aig_Obj_t * Aig_ObjCreate ( Aig_Man_t * p,
Aig_Obj_t * pGhost )
extern

Function*************************************************************

Synopsis [Create the new node assuming it does not exist.]

Description []

SideEffects []

SeeAlso []

Definition at line 89 of file aigObj.c.

90{
91 Aig_Obj_t * pObj;
92 assert( !Aig_IsComplement(pGhost) );
93 assert( Aig_ObjIsHash(pGhost) );
94// assert( pGhost == &p->Ghost );
95 // get memory for the new object
96 pObj = Aig_ManFetchMemory( p );
97 pObj->Type = pGhost->Type;
98 // add connections
99 Aig_ObjConnect( p, pObj, pGhost->pFanin0, pGhost->pFanin1 );
100 // update node counters of the manager
101 p->nObjs[Aig_ObjType(pObj)]++;
102 assert( pObj->pData == NULL );
103 // create the power counter
104 if ( p->vProbs )
105 {
106 float Prob0 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
107 float Prob1 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
108 Prob0 = Aig_ObjFaninC0(pObj)? 1.0 - Prob0 : Prob0;
109 Prob1 = Aig_ObjFaninC1(pObj)? 1.0 - Prob1 : Prob1;
110 Vec_IntSetEntry( p->vProbs, pObj->Id, Abc_Float2Int(Prob0 * Prob1) );
111 }
112 return pObj;
113}
void Aig_ObjConnect(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFan0, Aig_Obj_t *pFan1)
Definition aigObj.c:126
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◆ Aig_ObjCreateCi()

Aig_Obj_t * Aig_ObjCreateCi ( Aig_Man_t * p)
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [aigObj.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [AIG package.]

Synopsis [Adding/removing objects.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - April 28, 2007.]

Revision [

Id
aigObj.c,v 1.00 2007/04/28 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [Creates primary input.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file aigObj.c.

46{
47 Aig_Obj_t * pObj;
48 pObj = Aig_ManFetchMemory( p );
49 pObj->Type = AIG_OBJ_CI;
50 Vec_PtrPush( p->vCis, pObj );
51 p->nObjs[AIG_OBJ_CI]++;
52 return pObj;
53}

◆ Aig_ObjCreateCo()

Aig_Obj_t * Aig_ObjCreateCo ( Aig_Man_t * p,
Aig_Obj_t * pDriver )
extern

Function*************************************************************

Synopsis [Creates primary output with the given driver.]

Description []

SideEffects []

SeeAlso []

Definition at line 66 of file aigObj.c.

67{
68 Aig_Obj_t * pObj;
69 pObj = Aig_ManFetchMemory( p );
70 pObj->Type = AIG_OBJ_CO;
71 Vec_PtrPush( p->vCos, pObj );
72 Aig_ObjConnect( p, pObj, pDriver, NULL );
73 p->nObjs[AIG_OBJ_CO]++;
74 return pObj;
75}
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◆ Aig_ObjCreateRepr()

void Aig_ObjCreateRepr ( Aig_Man_t * p,
Aig_Obj_t * pNode1,
Aig_Obj_t * pNode2 )
extern

Function*************************************************************

Synopsis [Set the representative.]

Description []

SideEffects []

SeeAlso []

Definition at line 83 of file aigRepr.c.

84{
85 assert( p->pReprs != NULL );
86 assert( !Aig_IsComplement(pNode1) );
87 assert( !Aig_IsComplement(pNode2) );
88 assert( pNode1->Id < p->nReprsAlloc );
89 assert( pNode2->Id < p->nReprsAlloc );
90 assert( pNode1->Id < pNode2->Id );
91 p->pReprs[pNode2->Id] = pNode1;
92}
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◆ Aig_ObjDelete()

void Aig_ObjDelete ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Deletes the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 209 of file aigObj.c.

210{
211 assert( !Aig_IsComplement(pObj) );
212 assert( !Aig_ObjIsTerm(pObj) );
213 assert( Aig_ObjRefs(pObj) == 0 );
214 if ( p->pFanData && Aig_ObjIsBuf(pObj) )
215 Vec_PtrRemove( p->vBufs, pObj );
216 p->nObjs[pObj->Type]--;
217 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
218 Aig_ManRecycleMemory( p, pObj );
219}
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◆ Aig_ObjDelete_rec()

void Aig_ObjDelete_rec ( Aig_Man_t * p,
Aig_Obj_t * pObj,
int fFreeTop )
extern

Function*************************************************************

Synopsis [Deletes the MFFC of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 232 of file aigObj.c.

233{
234 Aig_Obj_t * pFanin0, * pFanin1;
235 assert( !Aig_IsComplement(pObj) );
236 if ( Aig_ObjIsConst1(pObj) || Aig_ObjIsCi(pObj) )
237 return;
238 assert( !Aig_ObjIsCo(pObj) );
239 pFanin0 = Aig_ObjFanin0(pObj);
240 pFanin1 = Aig_ObjFanin1(pObj);
241 Aig_ObjDisconnect( p, pObj );
242 if ( fFreeTop )
243 Aig_ObjDelete( p, pObj );
244 if ( pFanin0 && !Aig_ObjIsNone(pFanin0) && Aig_ObjRefs(pFanin0) == 0 )
245 Aig_ObjDelete_rec( p, pFanin0, 1 );
246 if ( pFanin1 && !Aig_ObjIsNone(pFanin1) && Aig_ObjRefs(pFanin1) == 0 )
247 Aig_ObjDelete_rec( p, pFanin1, 1 );
248}
void Aig_ObjDisconnect(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigObj.c:171
void Aig_ObjDelete_rec(Aig_Man_t *p, Aig_Obj_t *pObj, int fFreeTop)
Definition aigObj.c:232
void Aig_ObjDelete(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigObj.c:209
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◆ Aig_ObjDeletePo()

void Aig_ObjDeletePo ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Deletes the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 261 of file aigObj.c.

262{
263 assert( Aig_ObjIsCo(pObj) );
264 Aig_ObjDeref(Aig_ObjFanin0(pObj));
265 pObj->pFanin0 = NULL;
266 p->nObjs[pObj->Type]--;
267 Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
268 Aig_ManRecycleMemory( p, pObj );
269}
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◆ Aig_ObjDisconnect()

void Aig_ObjDisconnect ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Disconnects the object from the fanins.]

Description []

SideEffects []

SeeAlso []

Definition at line 171 of file aigObj.c.

172{
173 assert( !Aig_IsComplement(pObj) );
174 // remove connections
175 if ( pObj->pFanin0 != NULL )
176 {
177 if ( p->pFanData )
178 Aig_ObjRemoveFanout( p, Aig_ObjFanin0(pObj), pObj );
179 Aig_ObjDeref(Aig_ObjFanin0(pObj));
180 }
181 if ( pObj->pFanin1 != NULL )
182 {
183 if ( p->pFanData )
184 Aig_ObjRemoveFanout( p, Aig_ObjFanin1(pObj), pObj );
185 Aig_ObjDeref(Aig_ObjFanin1(pObj));
186 }
187 // remove the node from the structural hash table
188 if ( p->pTable && Aig_ObjIsHash(pObj) )
189 Aig_TableDelete( p, pObj );
190 // add the first fanin
191 pObj->pFanin0 = NULL;
192 pObj->pFanin1 = NULL;
193 // remove the node from the dynamically updated topological order
194// if ( p->pOrderData && Aig_ObjIsNode(pObj) )
195// Aig_ObjOrderRemove( p, pObj->Id );
196}
void Aig_ObjRemoveFanout(Aig_Man_t *p, Aig_Obj_t *pObj, Aig_Obj_t *pFanout)
Definition aigFanout.c:154
void Aig_TableDelete(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigTable.c:196
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◆ Aig_ObjIsMuxType()

int Aig_ObjIsMuxType ( Aig_Obj_t * pNode)
extern

Function*************************************************************

Synopsis [Returns 1 if the node is the root of MUX or EXOR/NEXOR.]

Description []

SideEffects []

SeeAlso []

Definition at line 307 of file aigUtil.c.

308{
309 Aig_Obj_t * pNode0, * pNode1;
310 // check that the node is regular
311 assert( !Aig_IsComplement(pNode) );
312 // if the node is not AND, this is not MUX
313 if ( !Aig_ObjIsAnd(pNode) )
314 return 0;
315 // if the children are not complemented, this is not MUX
316 if ( !Aig_ObjFaninC0(pNode) || !Aig_ObjFaninC1(pNode) )
317 return 0;
318 // get children
319 pNode0 = Aig_ObjFanin0(pNode);
320 pNode1 = Aig_ObjFanin1(pNode);
321 // if the children are not ANDs, this is not MUX
322 if ( !Aig_ObjIsAnd(pNode0) || !Aig_ObjIsAnd(pNode1) )
323 return 0;
324 // otherwise the node is MUX iff it has a pair of equal grandchildren
325 return (Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1))) ||
326 (Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1))) ||
327 (Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1))) ||
328 (Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1)));
329}
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◆ Aig_ObjOrderAdvance()

void Aig_ObjOrderAdvance ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Advances the order forward.]

Description []

SideEffects []

SeeAlso []

Definition at line 162 of file aigOrder.c.

163{
164 assert( p->pOrderData );
165 assert( p->pOrderData[2*p->iPrev+1] == (unsigned)p->iNext );
166 p->iPrev = p->iNext;
167 p->nAndPrev++;
168}

◆ Aig_ObjOrderInsert()

void Aig_ObjOrderInsert ( Aig_Man_t * p,
int ObjId )
extern

Function*************************************************************

Synopsis [Inserts an entry before iNext.]

Description []

SideEffects []

SeeAlso []

Definition at line 95 of file aigOrder.c.

96{
97 int iPrev;
98 assert( ObjId != 0 );
99 assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) );
100 if ( ObjId >= p->nOrderAlloc )
101 {
102 int nOrderAlloc = 2 * ObjId;
103 p->pOrderData = ABC_REALLOC( unsigned, p->pOrderData, 2 * nOrderAlloc );
104 memset( p->pOrderData + 2 * p->nOrderAlloc, 0xFF, sizeof(unsigned) * 2 * (nOrderAlloc - p->nOrderAlloc) );
105 p->nOrderAlloc = nOrderAlloc;
106 }
107 assert( p->pOrderData[2*ObjId] == 0xFFFFFFFF ); // prev
108 assert( p->pOrderData[2*ObjId+1] == 0xFFFFFFFF ); // next
109 iPrev = p->pOrderData[2*p->iNext];
110 assert( p->pOrderData[2*iPrev+1] == (unsigned)p->iNext );
111 p->pOrderData[2*ObjId] = iPrev;
112 p->pOrderData[2*iPrev+1] = ObjId;
113 p->pOrderData[2*p->iNext] = ObjId;
114 p->pOrderData[2*ObjId+1] = p->iNext;
115 p->nAndTotal++;
116}
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◆ Aig_ObjOrderRemove()

void Aig_ObjOrderRemove ( Aig_Man_t * p,
int ObjId )
extern

Function*************************************************************

Synopsis [Removes the entry.]

Description [If iPrev is removed, it slides backward. If iNext is removed, it slides forward.]

SideEffects []

SeeAlso []

Definition at line 130 of file aigOrder.c.

131{
132 int iPrev, iNext;
133 assert( ObjId != 0 );
134 assert( Aig_ObjIsNode( Aig_ManObj(p, ObjId) ) );
135 iPrev = p->pOrderData[2*ObjId];
136 iNext = p->pOrderData[2*ObjId+1];
137 p->pOrderData[2*ObjId] = 0xFFFFFFFF;
138 p->pOrderData[2*ObjId+1] = 0xFFFFFFFF;
139 p->pOrderData[2*iNext] = iPrev;
140 p->pOrderData[2*iPrev+1] = iNext;
141 if ( p->iPrev == ObjId )
142 {
143 p->nAndPrev--;
144 p->iPrev = iPrev;
145 }
146 if ( p->iNext == ObjId )
147 p->iNext = iNext;
148 p->nAndTotal--;
149}

◆ Aig_ObjPatchFanin0()

void Aig_ObjPatchFanin0 ( Aig_Man_t * p,
Aig_Obj_t * pObj,
Aig_Obj_t * pFaninNew )
extern

Function*************************************************************

Synopsis [Replaces the first fanin of the node by the new fanin.]

Description []

SideEffects []

SeeAlso []

Definition at line 282 of file aigObj.c.

283{
284 Aig_Obj_t * pFaninOld;
285 assert( !Aig_IsComplement(pObj) );
286 assert( Aig_ObjIsCo(pObj) );
287 pFaninOld = Aig_ObjFanin0(pObj);
288 // decrement ref and remove fanout
289 if ( p->pFanData )
290 Aig_ObjRemoveFanout( p, pFaninOld, pObj );
291 Aig_ObjDeref( pFaninOld );
292 // update the fanin
293 pObj->pFanin0 = pFaninNew;
294 pObj->Level = Aig_ObjLevelNew( pObj );
295 pObj->fPhase = Aig_ObjPhaseReal(pObj->pFanin0);
296 // increment ref and add fanout
297 if ( p->pFanData )
298 Aig_ObjAddFanout( p, Aig_ObjFanin0(pObj), pObj );
299 Aig_ObjRef( Aig_ObjFanin0(pObj) );
300 // get rid of old fanin
301 if ( !Aig_ObjIsCi(pFaninOld) && !Aig_ObjIsConst1(pFaninOld) && Aig_ObjRefs(pFaninOld) == 0 )
302 Aig_ObjDelete_rec( p, pFaninOld, 1 );
303}
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◆ Aig_ObjPrint()

void Aig_ObjPrint ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Verbose printing of the AIG node.]

Description []

SideEffects []

SeeAlso []

Definition at line 316 of file aigObj.c.

317{
318 int fShowFanouts = 0;
319 Aig_Obj_t * pTemp;
320 if ( pObj == NULL )
321 {
322 printf( "Object is NULL." );
323 return;
324 }
325 if ( Aig_IsComplement(pObj) )
326 {
327 printf( "Compl " );
328 pObj = Aig_Not(pObj);
329 }
330 assert( !Aig_IsComplement(pObj) );
331 printf( "Node %4d : ", Aig_ObjId(pObj) );
332 if ( Aig_ObjIsConst1(pObj) )
333 printf( "constant 1" );
334 else if ( Aig_ObjIsCi(pObj) )
335 printf( "PI" );
336 else if ( Aig_ObjIsCo(pObj) )
337 printf( "PO( %4d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
338 else if ( Aig_ObjIsBuf(pObj) )
339 printf( "BUF( %d%s )", Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
340 else
341 printf( "AND( %4d%s, %4d%s )",
342 Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " "),
343 Aig_ObjFanin1(pObj)->Id, (Aig_ObjFaninC1(pObj)? "\'" : " ") );
344 printf( " (refs = %3d)", Aig_ObjRefs(pObj) );
345 if ( fShowFanouts && p->pFanData )
346 {
347 Aig_Obj_t * pFanout;
348 int i;
349 int iFan = -1; // Suppress "might be used uninitialized"
350 printf( "\nFanouts:\n" );
351 Aig_ObjForEachFanout( p, pObj, pFanout, iFan, i )
352 {
353 printf( " " );
354 printf( "Node %4d : ", Aig_ObjId(pFanout) );
355 if ( Aig_ObjIsCo(pFanout) )
356 printf( "PO( %4d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
357 else if ( Aig_ObjIsBuf(pFanout) )
358 printf( "BUF( %d%s )", Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " ") );
359 else
360 printf( "AND( %4d%s, %4d%s )",
361 Aig_ObjFanin0(pFanout)->Id, (Aig_ObjFaninC0(pFanout)? "\'" : " "),
362 Aig_ObjFanin1(pFanout)->Id, (Aig_ObjFaninC1(pFanout)? "\'" : " ") );
363 printf( "\n" );
364 }
365 return;
366 }
367 // there are choices
368 if ( p->pEquivs && p->pEquivs[pObj->Id] )
369 {
370 // print equivalence class
371 printf( " { %4d ", pObj->Id );
372 for ( pTemp = p->pEquivs[pObj->Id]; pTemp; pTemp = p->pEquivs[pTemp->Id] )
373 printf( " %4d%s", pTemp->Id, (pTemp->fPhase != pObj->fPhase)? "\'" : " " );
374 printf( " }" );
375 return;
376 }
377 // this is a secondary node
378 if ( p->pReprs && p->pReprs[pObj->Id] )
379 printf( " class of %d", pObj->Id );
380}
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◆ Aig_ObjPrintEqn()

void Aig_ObjPrintEqn ( FILE * pFile,
Aig_Obj_t * pObj,
Vec_Vec_t * vLevels,
int Level )
extern

Function*************************************************************

Synopsis [Prints Eqn formula for the AIG rooted at this node.]

Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]

SideEffects []

SeeAlso []

Definition at line 519 of file aigUtil.c.

520{
521 Vec_Ptr_t * vSuper;
522 Aig_Obj_t * pFanin;
523 int fCompl, i;
524 // store the complemented attribute
525 fCompl = Aig_IsComplement(pObj);
526 pObj = Aig_Regular(pObj);
527 // constant case
528 if ( Aig_ObjIsConst1(pObj) )
529 {
530 fprintf( pFile, "%d", !fCompl );
531 return;
532 }
533 // PI case
534 if ( Aig_ObjIsCi(pObj) )
535 {
536 fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
537 return;
538 }
539 // AND case
540 Vec_VecExpand( vLevels, Level );
541 vSuper = Vec_VecEntry(vLevels, Level);
542 Aig_ObjCollectMulti( pObj, vSuper );
543 fprintf( pFile, "%s", (Level==0? "" : "(") );
544 Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
545 {
546 Aig_ObjPrintEqn( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 );
547 if ( i < Vec_PtrSize(vSuper) - 1 )
548 fprintf( pFile, " %s ", fCompl? "+" : "*" );
549 }
550 fprintf( pFile, "%s", (Level==0? "" : ")") );
551 return;
552}
void Aig_ObjPrintEqn(FILE *pFile, Aig_Obj_t *pObj, Vec_Vec_t *vLevels, int Level)
Definition aigUtil.c:519
void Aig_ObjCollectMulti(Aig_Obj_t *pRoot, Vec_Ptr_t *vSuper)
Definition aigUtil.c:289
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◆ Aig_ObjPrintVerbose()

void Aig_ObjPrintVerbose ( Aig_Obj_t * pObj,
int fHaig )
extern

Function*************************************************************

Synopsis [Prints node in HAIG.]

Description []

SideEffects []

SeeAlso []

Definition at line 653 of file aigUtil.c.

654{
655 assert( !Aig_IsComplement(pObj) );
656 printf( "Node %d : ", pObj->Id );
657 if ( Aig_ObjIsConst1(pObj) )
658 printf( "constant 1" );
659 else if ( Aig_ObjIsCi(pObj) )
660 printf( "CI" );
661 else if ( Aig_ObjIsCo(pObj) )
662 {
663 printf( "CO( " );
664 printf( "%d%s )",
665 Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " ") );
666 }
667 else
668 printf( "AND( %d%s, %d%s )",
669 Aig_ObjFanin0(pObj)->Id, (Aig_ObjFaninC0(pObj)? "\'" : " "),
670 Aig_ObjFanin1(pObj)->Id, (Aig_ObjFaninC1(pObj)? "\'" : " ") );
671 printf( " (refs = %3d)", Aig_ObjRefs(pObj) );
672}
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◆ Aig_ObjPrintVerilog()

void Aig_ObjPrintVerilog ( FILE * pFile,
Aig_Obj_t * pObj,
Vec_Vec_t * vLevels,
int Level )
extern

Function*************************************************************

Synopsis [Prints Verilog formula for the AIG rooted at this node.]

Description [The formula is in terms of PIs, which should have their names assigned in pObj->pData fields.]

SideEffects []

SeeAlso []

Definition at line 566 of file aigUtil.c.

567{
568 Vec_Ptr_t * vSuper;
569 Aig_Obj_t * pFanin, * pFanin0, * pFanin1, * pFaninC;
570 int fCompl, i;
571 // store the complemented attribute
572 fCompl = Aig_IsComplement(pObj);
573 pObj = Aig_Regular(pObj);
574 // constant case
575 if ( Aig_ObjIsConst1(pObj) )
576 {
577 fprintf( pFile, "1\'b%d", !fCompl );
578 return;
579 }
580 // PI case
581 if ( Aig_ObjIsCi(pObj) )
582 {
583 fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData );
584 return;
585 }
586 // EXOR case
587 if ( Aig_ObjIsExor(pObj) )
588 {
589 Vec_VecExpand( vLevels, Level );
590 vSuper = Vec_VecEntry( vLevels, Level );
591 Aig_ObjCollectMulti( pObj, vSuper );
592 fprintf( pFile, "%s", (Level==0? "" : "(") );
593 Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
594 {
595 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, (fCompl && i==0)), vLevels, Level+1 );
596 if ( i < Vec_PtrSize(vSuper) - 1 )
597 fprintf( pFile, " ^ " );
598 }
599 fprintf( pFile, "%s", (Level==0? "" : ")") );
600 return;
601 }
602 // MUX case
603 if ( Aig_ObjIsMuxType(pObj) )
604 {
605 if ( Aig_ObjRecognizeExor( pObj, &pFanin0, &pFanin1 ) )
606 {
607 fprintf( pFile, "%s", (Level==0? "" : "(") );
608 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 );
609 fprintf( pFile, " ^ " );
610 Aig_ObjPrintVerilog( pFile, pFanin1, vLevels, Level+1 );
611 fprintf( pFile, "%s", (Level==0? "" : ")") );
612 }
613 else
614 {
615 pFaninC = Aig_ObjRecognizeMux( pObj, &pFanin1, &pFanin0 );
616 fprintf( pFile, "%s", (Level==0? "" : "(") );
617 Aig_ObjPrintVerilog( pFile, pFaninC, vLevels, Level+1 );
618 fprintf( pFile, " ? " );
619 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin1, fCompl), vLevels, Level+1 );
620 fprintf( pFile, " : " );
621 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin0, fCompl), vLevels, Level+1 );
622 fprintf( pFile, "%s", (Level==0? "" : ")") );
623 }
624 return;
625 }
626 // AND case
627 Vec_VecExpand( vLevels, Level );
628 vSuper = Vec_VecEntry(vLevels, Level);
629 Aig_ObjCollectMulti( pObj, vSuper );
630 fprintf( pFile, "%s", (Level==0? "" : "(") );
631 Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
632 {
633 Aig_ObjPrintVerilog( pFile, Aig_NotCond(pFanin, fCompl), vLevels, Level+1 );
634 if ( i < Vec_PtrSize(vSuper) - 1 )
635 fprintf( pFile, " %s ", fCompl? "|" : "&" );
636 }
637 fprintf( pFile, "%s", (Level==0? "" : ")") );
638 return;
639}
void Aig_ObjPrintVerilog(FILE *pFile, Aig_Obj_t *pObj, Vec_Vec_t *vLevels, int Level)
Definition aigUtil.c:566
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◆ Aig_ObjReal_rec()

Aig_Obj_t * Aig_ObjReal_rec ( Aig_Obj_t * pObj)
extern

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 476 of file aigUtil.c.

477{
478 Aig_Obj_t * pObjNew, * pObjR = Aig_Regular(pObj);
479 if ( !Aig_ObjIsBuf(pObjR) )
480 return pObj;
481 pObjNew = Aig_ObjReal_rec( Aig_ObjChild0(pObjR) );
482 return Aig_NotCond( pObjNew, Aig_IsComplement(pObj) );
483}
Aig_Obj_t * Aig_ObjReal_rec(Aig_Obj_t *pObj)
Definition aigUtil.c:476
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◆ Aig_ObjRecognizeExor()

int Aig_ObjRecognizeExor ( Aig_Obj_t * pObj,
Aig_Obj_t ** ppFan0,
Aig_Obj_t ** ppFan1 )
extern

Function*************************************************************

Synopsis [Recognizes what nodes are inputs of the EXOR.]

Description []

SideEffects []

SeeAlso []

Definition at line 343 of file aigUtil.c.

344{
345 Aig_Obj_t * p0, * p1;
346 assert( !Aig_IsComplement(pObj) );
347 if ( !Aig_ObjIsNode(pObj) )
348 return 0;
349 if ( Aig_ObjIsExor(pObj) )
350 {
351 *ppFan0 = Aig_ObjChild0(pObj);
352 *ppFan1 = Aig_ObjChild1(pObj);
353 return 1;
354 }
355 assert( Aig_ObjIsAnd(pObj) );
356 p0 = Aig_ObjChild0(pObj);
357 p1 = Aig_ObjChild1(pObj);
358 if ( !Aig_IsComplement(p0) || !Aig_IsComplement(p1) )
359 return 0;
360 p0 = Aig_Regular(p0);
361 p1 = Aig_Regular(p1);
362 if ( !Aig_ObjIsAnd(p0) || !Aig_ObjIsAnd(p1) )
363 return 0;
364 if ( Aig_ObjFanin0(p0) != Aig_ObjFanin0(p1) || Aig_ObjFanin1(p0) != Aig_ObjFanin1(p1) )
365 return 0;
366 if ( Aig_ObjFaninC0(p0) == Aig_ObjFaninC0(p1) || Aig_ObjFaninC1(p0) == Aig_ObjFaninC1(p1) )
367 return 0;
368 *ppFan0 = Aig_ObjChild0(p0);
369 *ppFan1 = Aig_ObjChild1(p0);
370 return 1;
371}
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◆ Aig_ObjRecognizeMux()

Aig_Obj_t * Aig_ObjRecognizeMux ( Aig_Obj_t * pNode,
Aig_Obj_t ** ppNodeT,
Aig_Obj_t ** ppNodeE )
extern

Function*************************************************************

Synopsis [Recognizes what nodes are control and data inputs of a MUX.]

Description [If the node is a MUX, returns the control variable C. Assigns nodes T and E to be the then and else variables of the MUX. Node C is never complemented. Nodes T and E can be complemented. This function also recognizes EXOR/NEXOR gates as MUXes.]

SideEffects []

SeeAlso []

Definition at line 387 of file aigUtil.c.

388{
389 Aig_Obj_t * pNode0, * pNode1;
390 assert( !Aig_IsComplement(pNode) );
391 assert( Aig_ObjIsMuxType(pNode) );
392 // get children
393 pNode0 = Aig_ObjFanin0(pNode);
394 pNode1 = Aig_ObjFanin1(pNode);
395
396 // find the control variable
397 if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC1(pNode1)) )
398 {
399// if ( Fraig_IsComplement(pNode1->p2) )
400 if ( Aig_ObjFaninC1(pNode0) )
401 { // pNode2->p2 is positive phase of C
402 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
403 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
404 return Aig_ObjChild1(pNode1);//pNode2->p2;
405 }
406 else
407 { // pNode1->p2 is positive phase of C
408 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
409 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
410 return Aig_ObjChild1(pNode0);//pNode1->p2;
411 }
412 }
413 else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC0(pNode1)) )
414 {
415// if ( Fraig_IsComplement(pNode1->p1) )
416 if ( Aig_ObjFaninC0(pNode0) )
417 { // pNode2->p1 is positive phase of C
418 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
419 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
420 return Aig_ObjChild0(pNode1);//pNode2->p1;
421 }
422 else
423 { // pNode1->p1 is positive phase of C
424 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
425 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
426 return Aig_ObjChild0(pNode0);//pNode1->p1;
427 }
428 }
429 else if ( Aig_ObjFanin0(pNode0) == Aig_ObjFanin1(pNode1) && (Aig_ObjFaninC0(pNode0) ^ Aig_ObjFaninC1(pNode1)) )
430 {
431// if ( Fraig_IsComplement(pNode1->p1) )
432 if ( Aig_ObjFaninC0(pNode0) )
433 { // pNode2->p2 is positive phase of C
434 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
435 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
436 return Aig_ObjChild1(pNode1);//pNode2->p2;
437 }
438 else
439 { // pNode1->p1 is positive phase of C
440 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode0));//pNode1->p2);
441 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode1));//pNode2->p1);
442 return Aig_ObjChild0(pNode0);//pNode1->p1;
443 }
444 }
445 else if ( Aig_ObjFanin1(pNode0) == Aig_ObjFanin0(pNode1) && (Aig_ObjFaninC1(pNode0) ^ Aig_ObjFaninC0(pNode1)) )
446 {
447// if ( Fraig_IsComplement(pNode1->p2) )
448 if ( Aig_ObjFaninC1(pNode0) )
449 { // pNode2->p1 is positive phase of C
450 *ppNodeT = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
451 *ppNodeE = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
452 return Aig_ObjChild0(pNode1);//pNode2->p1;
453 }
454 else
455 { // pNode1->p2 is positive phase of C
456 *ppNodeT = Aig_Not(Aig_ObjChild0(pNode0));//pNode1->p1);
457 *ppNodeE = Aig_Not(Aig_ObjChild1(pNode1));//pNode2->p2);
458 return Aig_ObjChild1(pNode0);//pNode1->p2;
459 }
460 }
461 assert( 0 ); // this is not MUX
462 return NULL;
463}
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◆ Aig_ObjRemoveFanout()

void Aig_ObjRemoveFanout ( Aig_Man_t * p,
Aig_Obj_t * pObj,
Aig_Obj_t * pFanout )
extern

Function*************************************************************

Synopsis [Removes fanout (pFanout) of node (pObj).]

Description []

SideEffects []

SeeAlso []

Definition at line 154 of file aigFanout.c.

155{
156 int iFan, * pFirst, * pPrevC, * pNextC, * pPrev, * pNext;
157 assert( p->pFanData && pObj->Id < p->nFansAlloc && pFanout->Id < p->nFansAlloc );
158 assert( !Aig_IsComplement(pObj) && !Aig_IsComplement(pFanout) );
159 assert( pFanout->Id > 0 );
160 iFan = Aig_FanoutCreate( pFanout->Id, Aig_ObjWhatFanin(pFanout, pObj) );
161 pPrevC = Aig_FanoutPrev( p->pFanData, iFan );
162 pNextC = Aig_FanoutNext( p->pFanData, iFan );
163 pPrev = Aig_FanoutPrev( p->pFanData, *pNextC );
164 pNext = Aig_FanoutNext( p->pFanData, *pPrevC );
165 assert( *pPrev == iFan );
166 assert( *pNext == iFan );
167 pFirst = Aig_FanoutObj( p->pFanData, pObj->Id );
168 assert( *pFirst > 0 );
169 if ( *pFirst == iFan )
170 {
171 if ( *pNextC == iFan )
172 {
173 *pFirst = 0;
174 *pPrev = 0;
175 *pNext = 0;
176 *pPrevC = 0;
177 *pNextC = 0;
178 return;
179 }
180 *pFirst = *pNextC;
181 }
182 *pPrev = *pPrevC;
183 *pNext = *pNextC;
184 *pPrevC = 0;
185 *pNextC = 0;
186}
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◆ Aig_ObjReplace()

void Aig_ObjReplace ( Aig_Man_t * p,
Aig_Obj_t * pObjOld,
Aig_Obj_t * pObjNew,
int fUpdateLevel )
extern

Function*************************************************************

Synopsis [Replaces one object by another.]

Description [The new object (pObjNew) should be used instead of the old object (pObjOld). If the new object is complemented or used, the buffer is added and the new object remains in the manager; otherwise, the new object is deleted.]

SideEffects []

SeeAlso []

Definition at line 467 of file aigObj.c.

468{
469 Aig_Obj_t * pObjNewR = Aig_Regular(pObjNew);
470 // the object to be replaced cannot be complemented
471 assert( !Aig_IsComplement(pObjOld) );
472 // the object to be replaced cannot be a terminal
473 assert( !Aig_ObjIsCi(pObjOld) && !Aig_ObjIsCo(pObjOld) );
474 // the object to be used cannot be a buffer or a PO
475 assert( !Aig_ObjIsBuf(pObjNewR) && !Aig_ObjIsCo(pObjNewR) );
476 // the object cannot be the same
477 assert( pObjOld != pObjNewR );
478 // make sure object is not pointing to itself
479 assert( pObjOld != Aig_ObjFanin0(pObjNewR) );
480 assert( pObjOld != Aig_ObjFanin1(pObjNewR) );
481 if ( pObjOld == Aig_ObjFanin0(pObjNewR) || pObjOld == Aig_ObjFanin1(pObjNewR) )
482 {
483 printf( "Aig_ObjReplace(): Internal error!\n" );
484 exit(1);
485 }
486 // recursively delete the old node - but leave the object there
487 pObjNewR->nRefs++;
488 Aig_ObjDelete_rec( p, pObjOld, 0 );
489 pObjNewR->nRefs--;
490 // if the new object is complemented or already used, create a buffer
491 p->nObjs[pObjOld->Type]--;
492 if ( Aig_IsComplement(pObjNew) || Aig_ObjRefs(pObjNew) > 0 || !Aig_ObjIsNode(pObjNew) )
493 {
494 pObjOld->Type = AIG_OBJ_BUF;
495 Aig_ObjConnect( p, pObjOld, pObjNew, NULL );
496 p->nBufReplaces++;
497 }
498 else
499 {
500 Aig_Obj_t * pFanin0 = pObjNew->pFanin0;
501 Aig_Obj_t * pFanin1 = pObjNew->pFanin1;
502 int LevelOld = pObjOld->Level;
503 pObjOld->Type = pObjNew->Type;
504 Aig_ObjDisconnect( p, pObjNew );
505 Aig_ObjConnect( p, pObjOld, pFanin0, pFanin1 );
506 // delete the new object
507 Aig_ObjDelete( p, pObjNew );
508 // update levels
509 if ( p->pFanData )
510 {
511 pObjOld->Level = LevelOld;
512 Aig_ManUpdateLevel( p, pObjOld );
513 }
514 if ( fUpdateLevel )
515 {
516 Aig_ObjClearReverseLevel( p, pObjOld );
517 Aig_ManUpdateReverseLevel( p, pObjOld );
518 }
519 }
520 p->nObjs[pObjOld->Type]++;
521 // store buffers if fanout is allocated
522 if ( p->pFanData && Aig_ObjIsBuf(pObjOld) )
523 {
524 Vec_PtrPush( p->vBufs, pObjOld );
525 p->nBufMax = Abc_MaxInt( p->nBufMax, Vec_PtrSize(p->vBufs) );
526 Aig_ManPropagateBuffers( p, fUpdateLevel );
527 }
528}
int Aig_ManPropagateBuffers(Aig_Man_t *p, int fUpdateLevel)
Definition aigObj.c:432
void Aig_ObjClearReverseLevel(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition aigTiming.c:83
void Aig_ManUpdateReverseLevel(Aig_Man_t *p, Aig_Obj_t *pObjNew)
Definition aigTiming.c:247
void Aig_ManUpdateLevel(Aig_Man_t *p, Aig_Obj_t *pObjNew)
Definition aigTiming.c:195
VOID_HACK exit()
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◆ Aig_ObjRequiredLevel()

int Aig_ObjRequiredLevel ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Returns required level of the node.]

Description [Converts the reverse levels of the node into its required level as follows: ReqLevel(Node) = MaxLevels(Ntk) + 1 - LevelR(Node).]

SideEffects []

SeeAlso []

Definition at line 100 of file aigTiming.c.

101{
102 assert( p->vLevelR );
103 return p->nLevelMax + 1 - Aig_ObjReverseLevel(p, pObj);
104}
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◆ Aig_Oper()

Aig_Obj_t * Aig_Oper ( Aig_Man_t * p,
Aig_Obj_t * p0,
Aig_Obj_t * p1,
Aig_Type_t Type )
extern

Function*************************************************************

Synopsis [Perform one operation.]

Description [The argument nodes can be complemented.]

SideEffects []

SeeAlso []

Definition at line 83 of file aigOper.c.

84{
85 if ( Type == AIG_OBJ_AND )
86 return Aig_And( p, p0, p1 );
87 if ( Type == AIG_OBJ_EXOR )
88 return Aig_Exor( p, p0, p1 );
89 assert( 0 );
90 return NULL;
91}
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◆ Aig_Or()

Aig_Obj_t * Aig_Or ( Aig_Man_t * p,
Aig_Obj_t * p0,
Aig_Obj_t * p1 )
extern

Function*************************************************************

Synopsis [Implements Boolean OR.]

Description []

SideEffects []

SeeAlso []

Definition at line 259 of file aigOper.c.

260{
261 return Aig_Not( Aig_And( p, Aig_Not(p0), Aig_Not(p1) ) );
262}
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◆ Aig_Support()

Vec_Ptr_t * Aig_Support ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 846 of file aigDfs.c.

847{
848 Vec_Ptr_t * vSupp;
849 assert( !Aig_IsComplement(pObj) );
850 assert( !Aig_ObjIsCo(pObj) );
852 vSupp = Vec_PtrAlloc( 100 );
853 Aig_Support_rec( p, pObj, vSupp );
854 return vSupp;
855}
void Aig_Support_rec(Aig_Man_t *p, Aig_Obj_t *pObj, Vec_Ptr_t *vSupp)
Definition aigDfs.c:817
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◆ Aig_SupportNodes()

void Aig_SupportNodes ( Aig_Man_t * p,
Aig_Obj_t ** ppObjs,
int nObjs,
Vec_Ptr_t * vSupp )
extern

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 868 of file aigDfs.c.

869{
870 int i;
871 Vec_PtrClear( vSupp );
873 Aig_ObjSetTravIdCurrent( p, Aig_ManConst1(p) );
874 for ( i = 0; i < nObjs; i++ )
875 {
876 assert( !Aig_IsComplement(ppObjs[i]) );
877 if ( Aig_ObjIsCo(ppObjs[i]) )
878 Aig_Support_rec( p, Aig_ObjFanin0(ppObjs[i]), vSupp );
879 else
880 Aig_Support_rec( p, ppObjs[i], vSupp );
881 }
882}
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◆ Aig_SupportSize()

int Aig_SupportSize ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Counts the support size of the node.]

Description []

SideEffects []

SeeAlso []

Definition at line 772 of file aigDfs.c.

773{
774 int Counter = 0;
775 assert( !Aig_IsComplement(pObj) );
776 assert( !Aig_ObjIsCo(pObj) );
778 Aig_SupportSize_rec( p, pObj, &Counter );
779 return Counter;
780}
void Aig_SupportSize_rec(Aig_Man_t *p, Aig_Obj_t *pObj, int *pCounter)
Definition aigDfs.c:745
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◆ Aig_TableClear()

void Aig_TableClear ( Aig_Man_t * p)
extern

Function********************************************************************

Synopsis [Profiles the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 265 of file aigTable.c.

266{
267 ABC_FREE( p->pTable );
268 p->nTableSize = 0;
269}
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◆ Aig_TableCountEntries()

int Aig_TableCountEntries ( Aig_Man_t * p)
extern

Function*************************************************************

Synopsis [Count the number of nodes in the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 218 of file aigTable.c.

219{
220 Aig_Obj_t * pEntry;
221 int i, Counter = 0;
222 for ( i = 0; i < p->nTableSize; i++ )
223 for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext )
224 Counter++;
225 return Counter;
226}
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◆ Aig_TableDelete()

void Aig_TableDelete ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Deletes the node from the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 196 of file aigTable.c.

197{
198 Aig_Obj_t ** ppPlace;
199 assert( !Aig_IsComplement(pObj) );
200 ppPlace = Aig_TableFind( p, pObj );
201 assert( *ppPlace == pObj ); // node should be in the table
202 // remove the node
203 *ppPlace = pObj->pNext;
204 pObj->pNext = NULL;
205}
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◆ Aig_TableInsert()

void Aig_TableInsert ( Aig_Man_t * p,
Aig_Obj_t * pObj )
extern

Function*************************************************************

Synopsis [Adds the new node to the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 173 of file aigTable.c.

174{
175 Aig_Obj_t ** ppPlace;
176 assert( !Aig_IsComplement(pObj) );
177 assert( Aig_TableLookup(p, pObj) == NULL );
178 if ( (pObj->Id & 0xFF) == 0 && 2 * p->nTableSize < Aig_ManNodeNum(p) )
180 ppPlace = Aig_TableFind( p, pObj );
181 assert( *ppPlace == NULL );
182 *ppPlace = pObj;
183}
void Aig_TableResize(Aig_Man_t *p)
FUNCTION DEFINITIONS ///.
Definition aigTable.c:69
Aig_Obj_t * Aig_TableLookup(Aig_Man_t *p, Aig_Obj_t *pGhost)
Definition aigTable.c:116
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◆ Aig_TableLookup()

Aig_Obj_t * Aig_TableLookup ( Aig_Man_t * p,
Aig_Obj_t * pGhost )
extern

Function*************************************************************

Synopsis [Checks if node with the given attributes is in the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 116 of file aigTable.c.

117{
118 Aig_Obj_t * pEntry;
119 assert( !Aig_IsComplement(pGhost) );
120 assert( Aig_ObjIsNode(pGhost) );
121 assert( Aig_ObjChild0(pGhost) && Aig_ObjChild1(pGhost) );
122 assert( Aig_ObjFanin0(pGhost)->Id < Aig_ObjFanin1(pGhost)->Id );
123 if ( p->pTable == NULL || !Aig_ObjRefs(Aig_ObjFanin0(pGhost)) || !Aig_ObjRefs(Aig_ObjFanin1(pGhost)) )
124 return NULL;
125 for ( pEntry = p->pTable[Aig_Hash(pGhost, p->nTableSize)]; pEntry; pEntry = pEntry->pNext )
126 {
127 if ( Aig_ObjChild0(pEntry) == Aig_ObjChild0(pGhost) &&
128 Aig_ObjChild1(pEntry) == Aig_ObjChild1(pGhost) &&
129 Aig_ObjType(pEntry) == Aig_ObjType(pGhost) )
130 return pEntry;
131 }
132 return NULL;
133}
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◆ Aig_TableLookupTwo()

Aig_Obj_t * Aig_TableLookupTwo ( Aig_Man_t * p,
Aig_Obj_t * pFanin0,
Aig_Obj_t * pFanin1 )
extern

Function*************************************************************

Synopsis [Checks if node with the given attributes is in the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 146 of file aigTable.c.

147{
148 Aig_Obj_t * pGhost;
149 // consider simple cases
150 if ( pFanin0 == pFanin1 )
151 return pFanin0;
152 if ( pFanin0 == Aig_Not(pFanin1) )
153 return Aig_ManConst0(p);
154 if ( Aig_Regular(pFanin0) == Aig_ManConst1(p) )
155 return pFanin0 == Aig_ManConst1(p) ? pFanin1 : Aig_ManConst0(p);
156 if ( Aig_Regular(pFanin1) == Aig_ManConst1(p) )
157 return pFanin1 == Aig_ManConst1(p) ? pFanin0 : Aig_ManConst0(p);
158 pGhost = Aig_ObjCreateGhost( p, pFanin0, pFanin1, AIG_OBJ_AND );
159 return Aig_TableLookup( p, pGhost );
160}
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◆ Aig_TableProfile()

void Aig_TableProfile ( Aig_Man_t * p)
extern

Function********************************************************************

Synopsis [Profiles the hash table.]

Description []

SideEffects []

SeeAlso []

Definition at line 239 of file aigTable.c.

240{
241 Aig_Obj_t * pEntry;
242 int i, Counter;
243 printf( "Table size = %d. Entries = %d.\n", p->nTableSize, Aig_ManNodeNum(p) );
244 for ( i = 0; i < p->nTableSize; i++ )
245 {
246 Counter = 0;
247 for ( pEntry = p->pTable[i]; pEntry; pEntry = pEntry->pNext )
248 Counter++;
249 if ( Counter )
250 printf( "%d ", Counter );
251 }
252}

◆ Aig_TimeStamp()

char * Aig_TimeStamp ( )
extern

Function*************************************************************

Synopsis [Returns the time stamp.]

Description [The file should be closed.]

SideEffects []

SeeAlso []

Definition at line 62 of file aigUtil.c.

63{
64 static char Buffer[100];
65 char * TimeStamp;
66 time_t ltime;
67 // get the current time
68 time( &ltime );
69 TimeStamp = asctime( localtime( &ltime ) );
70 TimeStamp[ strlen(TimeStamp) - 1 ] = 0;
71 strcpy( Buffer, TimeStamp );
72 return Buffer;
73}
int strlen()
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◆ Aig_Transfer()

Aig_Obj_t * Aig_Transfer ( Aig_Man_t * pSour,
Aig_Man_t * pDest,
Aig_Obj_t * pRoot,
int nVars )
extern

Function*************************************************************

Synopsis [Transfers the AIG from one manager into another.]

Description []

SideEffects []

SeeAlso []

Definition at line 918 of file aigDfs.c.

919{
920 Aig_Obj_t * pObj;
921 int i;
922 // solve simple cases
923 if ( pSour == pDest )
924 return pRoot;
925 if ( Aig_ObjIsConst1( Aig_Regular(pRoot) ) )
926 return Aig_NotCond( Aig_ManConst1(pDest), Aig_IsComplement(pRoot) );
927 // set the PI mapping
928 Aig_ManForEachCi( pSour, pObj, i )
929 {
930 if ( i == nVars )
931 break;
932 pObj->pData = Aig_IthVar(pDest, i);
933 }
934 // transfer and set markings
935 Aig_Transfer_rec( pDest, Aig_Regular(pRoot) );
936 // clear the markings
937 Aig_ConeUnmark_rec( Aig_Regular(pRoot) );
938 return Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pRoot)->pData, Aig_IsComplement(pRoot) );
939}
void Aig_Transfer_rec(Aig_Man_t *pDest, Aig_Obj_t *pObj)
Definition aigDfs.c:895
Aig_Obj_t * Aig_IthVar(Aig_Man_t *p, int i)
FUNCTION DEFINITIONS ///.
Definition aigOper.c:63
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◆ Aig_TransferMappedClasses()

int Aig_TransferMappedClasses ( Aig_Man_t * pAig,
Aig_Man_t * pPart,
int * pMapBack )
extern

Function*************************************************************

Synopsis [Transfers the classes.]

Description []

SideEffects []

SeeAlso []

Definition at line 533 of file aigRepr.c.

534{
535 Aig_Obj_t * pObj;
536 int nClasses, k;
537 nClasses = 0;
538 if ( pPart->pReprs ) {
539 Aig_ManForEachObj( pPart, pObj, k )
540 {
541 if ( pPart->pReprs[pObj->Id] == NULL )
542 continue;
543 nClasses++;
544 Aig_ObjSetRepr_( pAig,
545 Aig_ManObj(pAig, pMapBack[pObj->Id]),
546 Aig_ManObj(pAig, pMapBack[pPart->pReprs[pObj->Id]->Id]) );
547 }
548 }
549 return nClasses;
550}
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◆ Rtm_ManRetime()

Aig_Man_t * Rtm_ManRetime ( Aig_Man_t * p,
int fForward,
int nStepsMax,
int fVerbose )
extern

Function*************************************************************

Synopsis [Performs forward retiming with the given limit on depth.]

Description []

SideEffects []

SeeAlso []

Definition at line 834 of file aigRet.c.

835{
836 Vec_Ptr_t * vQueue;
837 Aig_Man_t * pNew;
838 Rtm_Man_t * pRtm;
839 Rtm_Obj_t * pObj, * pNext;
840 Aig_Obj_t * pObjAig;
841 int i, k, nAutos, Degree, DegreeMax = 0;
842 abctime clk;
843
844 // create the retiming manager
845clk = Abc_Clock();
846 pRtm = Rtm_ManFromAig( p );
847 // set registers
848 Aig_ManForEachLoSeq( p, pObjAig, i )
849 Rtm_ObjAddFirst( pRtm, Rtm_ObjEdge((Rtm_Obj_t *)pObjAig->pData, 0), fForward? RTM_VAL_ZERO : RTM_VAL_VOID );
850 // detect and mark the autonomous components
851 if ( fForward )
852 nAutos = Rtm_ManMarkAutoFwd( pRtm );
853 else
854 nAutos = Rtm_ManMarkAutoBwd( pRtm );
855 if ( fVerbose )
856 {
857 printf( "Detected %d autonomous objects. ", nAutos );
858 ABC_PRT( "Time", Abc_Clock() - clk );
859 }
860
861 // set the current retiming number
862 Rtm_ManForEachObj( pRtm, pObj, i )
863 {
864 assert( pObj->nFanins == pObj->Num );
865 assert( pObj->nFanouts == pObj->Temp );
866 pObj->Num = 0;
867 }
868
869clk = Abc_Clock();
870 // put the LOs on the queue
871 vQueue = Vec_PtrAlloc( 1000 );
872 if ( fForward )
873 {
874 Aig_ManForEachLoSeq( p, pObjAig, i )
875 {
876 pObj = (Rtm_Obj_t *)pObjAig->pData;
877 if ( pObj->fAuto )
878 continue;
879 pObj->fMark = 1;
880 Vec_PtrPush( vQueue, pObj );
881 }
882 }
883 else
884 {
885 Aig_ManForEachLiSeq( p, pObjAig, i )
886 {
887 pObj = (Rtm_Obj_t *)pObjAig->pData;
888 if ( pObj->fAuto )
889 continue;
890 pObj->fMark = 1;
891 Vec_PtrPush( vQueue, pObj );
892 }
893 }
894 // perform retiming
895 DegreeMax = 0;
896 Vec_PtrForEachEntry( Rtm_Obj_t *, vQueue, pObj, i )
897 {
898 pObj->fMark = 0;
899 // retime the node
900 if ( fForward )
901 {
902 Rtm_ObjRetimeFwd( pRtm, pObj );
903 // check if its fanouts should be retimed
904 Rtm_ObjForEachFanout( pObj, pNext, k )
905 {
906 if ( pNext->fMark ) // skip aleady scheduled
907 continue;
908 if ( pNext->Type ) // skip POs
909 continue;
910 if ( !Rtm_ObjCheckRetimeFwd( pNext ) ) // skip non-retimable
911 continue;
912 Degree = Rtm_ObjGetDegreeFwd( pNext );
913 DegreeMax = Abc_MaxInt( DegreeMax, Degree );
914 if ( Degree > nStepsMax ) // skip nodes with high degree
915 continue;
916 pNext->fMark = 1;
917 pNext->Num = Degree;
918 Vec_PtrPush( vQueue, pNext );
919 }
920 }
921 else
922 {
923 Rtm_ObjRetimeBwd( pRtm, pObj );
924 // check if its fanouts should be retimed
925 Rtm_ObjForEachFanin( pObj, pNext, k )
926 {
927 if ( pNext->fMark ) // skip aleady scheduled
928 continue;
929 if ( pNext->nFanins == 0 ) // skip PIs
930 continue;
931 if ( !Rtm_ObjCheckRetimeBwd( pNext ) ) // skip non-retimable
932 continue;
933 Degree = Rtm_ObjGetDegreeBwd( pNext );
934 DegreeMax = Abc_MaxInt( DegreeMax, Degree );
935 if ( Degree > nStepsMax ) // skip nodes with high degree
936 continue;
937 pNext->fMark = 1;
938 pNext->Num = Degree;
939 Vec_PtrPush( vQueue, pNext );
940 }
941 }
942 }
943
944 if ( fVerbose )
945 {
946 printf( "Performed %d %s latch moves of max depth %d and max latch count %d.\n",
947 Vec_PtrSize(vQueue), fForward? "fwd":"bwd", DegreeMax, Rtm_ManLatchMax(pRtm) );
948 printf( "Memory usage = %d. ", pRtm->nExtraCur );
949 ABC_PRT( "Time", Abc_Clock() - clk );
950 }
951 Vec_PtrFree( vQueue );
952
953 // get the new manager
954 pNew = Rtm_ManToAig( pRtm );
955 pNew->pName = Abc_UtilStrsav( p->pName );
956 pNew->pSpec = Abc_UtilStrsav( p->pSpec );
957 Rtm_ManFree( pRtm );
958 // group the registers
959clk = Abc_Clock();
960 pNew = Aig_ManReduceLaches( pNew, fVerbose );
961 if ( fVerbose )
962 {
963 ABC_PRT( "Register sharing time", Abc_Clock() - clk );
964 }
965 return pNew;
966}
int Rtm_ObjCheckRetimeBwd(Rtm_Obj_t *pObj)
Definition aigRet.c:454
int Rtm_ObjGetDegreeFwd(Rtm_Obj_t *pObj)
Definition aigRet.c:475
int Rtm_ManMarkAutoFwd(Rtm_Man_t *pRtm)
Definition aigRet.c:591
void Rtm_ObjRetimeFwd(Rtm_Man_t *pRtm, Rtm_Obj_t *pObj)
Definition aigRet.c:515
Aig_Man_t * Rtm_ManToAig(Rtm_Man_t *pRtm)
Definition aigRet.c:765
#define Rtm_ObjForEachFanout(pObj, pFanout, i)
Definition aigRet.c:133
@ RTM_VAL_ZERO
Definition aigRet.c:33
@ RTM_VAL_VOID
Definition aigRet.c:35
struct Rtm_Obj_t_ Rtm_Obj_t
Definition aigRet.c:60
void Rtm_ObjRetimeBwd(Rtm_Man_t *pRtm, Rtm_Obj_t *pObj)
Definition aigRet.c:545
Rtm_Man_t * Rtm_ManFromAig(Aig_Man_t *p)
Definition aigRet.c:675
int Rtm_ObjGetDegreeBwd(Rtm_Obj_t *pObj)
Definition aigRet.c:495
#define Rtm_ManForEachObj(p, pObj, i)
Definition aigRet.c:127
struct Rtm_Man_t_ Rtm_Man_t
Definition aigRet.c:38
void Rtm_ManFree(Rtm_Man_t *p)
Definition aigRet.c:327
int Rtm_ManMarkAutoBwd(Rtm_Man_t *pRtm)
Definition aigRet.c:643
int Rtm_ManLatchMax(Rtm_Man_t *p)
Definition aigRet.c:348
int Rtm_ObjCheckRetimeFwd(Rtm_Obj_t *pObj)
Definition aigRet.c:433
#define Rtm_ObjForEachFanin(pObj, pFanin, i)
Definition aigRet.c:130
Aig_Man_t * Aig_ManReduceLaches(Aig_Man_t *p, int fVerbose)
Definition aigScl.c:455
int nExtraCur
Definition aigRet.c:49
unsigned long fMark
Definition aigRet.c:65
unsigned long Type
Definition aigRet.c:64
unsigned long nFanins
Definition aigRet.c:69
unsigned long fAuto
Definition aigRet.c:66
unsigned Num
Definition aigRet.c:70
int Temp
Definition aigRet.c:72
int nFanouts
Definition aigRet.c:73
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