112 if ( iObj == 0 )
return 0;
113 if ( Gia_ObjIsTravIdCurrentId(
p, iObj) )
115 Gia_ObjSetTravIdCurrentId(
p, iObj);
116 if ( Gia_ObjIsCi(pObj) )
118 assert( Gia_ObjIsAnd(pObj) );
121 return pObj->
fMark1 = Gia_ObjIsXor(pObj) ? Value0 ^ Value1 : Value0 & Value1;
137 int w, i, iObj, nCares;
138 word * pCare = Vec_WrdArray(
p->vSims);
139 if ( Vec_IntSize(
p->vInputs) == 0 )
141 printf(
"No primary inputs.\n" );
146 word * pSim_0 = Cec_ManSSim(
p, iObj, 0 );
147 word * pSim_1 = Cec_ManSSim(
p, iObj, 1 );
148 if (
p->nWords == 1 )
149 pCare[0] |= pSim_0[0] & pSim_1[0];
151 Abc_TtOrAnd( pCare, pSim_0, pSim_1,
p->nWords );
153 nCares = Abc_TtCountOnesVec( pCare,
p->nWords );
154 if ( nCares == 64*
p->nWords )
156 printf(
"No CEXes.\n" );
159 assert( Vec_IntSize(
p->vInputs) > 0 );
160 for ( w = 0; w < 64*
p->nWords; w++ )
162 if ( Abc_TtGetBit(pCare, w) )
167 Gia_ManObj(
p->pAig, iObj)->fMark1 = Abc_TtGetBit( Cec_ManSSim(
p, iObj, 1), w );
170 printf(
"Considered %d CEXes of nodes %d and %d.\n", 64*
p->nWords - nCares, iObj0, iObj1 );
186 Gia_Obj_t * pNode = Gia_ManObj(
p->pAig, iNode );
187 if ( Gia_ObjIsAnd(pNode) )
189 int iFan0 = Gia_ObjFaninId0( pNode, iNode );
190 int iFan1 = Gia_ObjFaninId1( pNode, iNode );
191 word * pSim__ = Cec_ManSSim(
p, 0, 0 );
192 word * pSim_0 = Cec_ManSSim(
p, iNode, 0 );
193 word * pSim_1 = Cec_ManSSim(
p, iNode, 1 );
194 word * pSim00 = Cec_ManSSim(
p, iFan0, Gia_ObjFaninC0(pNode) );
195 word * pSim01 = Cec_ManSSim(
p, iFan0, !Gia_ObjFaninC0(pNode) );
196 word * pSim10 = Cec_ManSSim(
p, iFan1, Gia_ObjFaninC1(pNode) );
197 word * pSim11 = Cec_ManSSim(
p, iFan1, !Gia_ObjFaninC1(pNode) );
198 if (
p->nWords == 1 )
200 pSim_0[0] |= pSim00[0] | pSim10[0];
201 pSim_1[0] |= pSim01[0] & pSim11[0];
202 pSim__[0] |= pSim_0[0] & pSim_1[0];
203 pSim_0[0] &= ~pSim__[0];
204 pSim_1[0] &= ~pSim__[0];
208 Abc_TtOr( pSim_0, pSim_0, pSim00,
p->nWords );
209 Abc_TtOr( pSim_0, pSim_0, pSim10,
p->nWords );
210 Abc_TtOrAnd( pSim_1, pSim01, pSim11,
p->nWords );
211 Abc_TtOrAnd( pSim__, pSim_0, pSim_1,
p->nWords );
212 Abc_TtAndSharp( pSim_0, pSim_0, pSim__,
p->nWords, 1 );
213 Abc_TtAndSharp( pSim_1, pSim_1, pSim__,
p->nWords, 1 );
219 Gia_Obj_t * pNode = Gia_ManObj(
p->pAig, iNode );
220 int iFan0 = Gia_ObjFaninId0( pNode, iNode );
221 int iFan1 = Gia_ObjFaninId1( pNode, iNode );
222 word * pSim_0 = Cec_ManSSim(
p, iNode, 0 );
223 word * pSim_1 = Cec_ManSSim(
p, iNode, 1 );
224 if ( Abc_TtIsConst0(pSim_0,
p->nWords) && Abc_TtIsConst0(pSim_1,
p->nWords) )
233 word * pSim__ = Cec_ManSSim(
p, 0, 0 );
234 word * pSim00 = Cec_ManSSim(
p, iFan0, Gia_ObjFaninC0(pNode) );
235 word * pSim01 = Cec_ManSSim(
p, iFan0, !Gia_ObjFaninC0(pNode) );
236 word * pSim10 = Cec_ManSSim(
p, iFan1, Gia_ObjFaninC1(pNode) );
237 word * pSim11 = Cec_ManSSim(
p, iFan1, !Gia_ObjFaninC1(pNode) );
239 if (
p->nWords == 1 )
241 pSim01[0] |= pSim_1[0];
242 pSim11[0] |= pSim_1[0];
244 pSim00[0] |= pSim_0[0] & (pSim11[0] |
~p->Rands[
p->iRand]);
245 pSim10[0] |= pSim_0[0] & (pSim01[0] |
p->Rands[
p->iRand]);
247 pSim__[0] |= pSim00[0] & pSim01[0];
248 pSim__[0] |= pSim10[0] & pSim11[0];
250 pSim00[0] &= ~pSim__[0];
251 pSim01[0] &= ~pSim__[0];
252 pSim10[0] &= ~pSim__[0];
253 pSim11[0] &= ~pSim__[0];
258 for ( w = 0; w <
p->nWords; w++ )
261 Abc_TtOr( pSim01, pSim01, pSim_1,
p->nWords );
262 Abc_TtOr( pSim11, pSim11, pSim_1,
p->nWords );
264 Abc_TtOr(
p->pTemp[1], pSim11,
p->pTemp[0],
p->nWords );
265 Abc_TtOrAnd( pSim00, pSim_0,
p->pTemp[1],
p->nWords );
267 Abc_TtNot(
p->pTemp[0],
p->nWords );
268 Abc_TtOr(
p->pTemp[1], pSim01,
p->pTemp[0],
p->nWords );
269 Abc_TtOrAnd( pSim10, pSim_0,
p->pTemp[1],
p->nWords );
271 Abc_TtOrAnd( pSim__, pSim00, pSim01,
p->nWords );
272 Abc_TtOrAnd( pSim__, pSim10, pSim11,
p->nWords );
274 Abc_TtAndSharp( pSim00, pSim00, pSim__,
p->nWords, 1 );
275 Abc_TtAndSharp( pSim01, pSim01, pSim__,
p->nWords, 1 );
276 Abc_TtAndSharp( pSim10, pSim10, pSim__,
p->nWords, 1 );
277 Abc_TtAndSharp( pSim11, pSim11, pSim__,
p->nWords, 1 );
286 if ( Gia_ObjIsTravIdCurrentId(
p->pAig, iNode) )
288 Gia_ObjSetTravIdCurrentId(
p->pAig, iNode);
289 pNode = Gia_ManObj(
p->pAig, iNode );
290 if ( Gia_ObjIsCi(pNode) )
292 Vec_IntPush(
p->vInputs, iNode );
295 assert( Gia_ObjIsAnd(pNode) );
296 Level = Gia_ObjLevelId(
p->pAig, iNode );
298 Vec_WecPush(
p->vLevels, Level, iNode );
299 p->nLevelMax = Abc_MaxInt(
p->nLevelMax, Level );
300 p->nLevelMin = Abc_MinInt(
p->nLevelMin, Level );
301 assert(
p->nLevelMin <=
p->nLevelMax );
306 int i, k, iNode, fSolved = 0;
311 Gia_Obj_t * pNode = Gia_ManObj(
p->pAig, iNode );
316 if ( Abc_TtIsConst1(Vec_WrdArray(
p->vSims),
p->nWords) )
319 Abc_TtClear( Cec_ManSSim(
p, iNode, 0), 2*
p->nWords );
321 Vec_IntClear( vLevel );
332 int i, iNode, Status, fDiff = Gia_ObjPhaseDiff(
p->pAig, iNode0, iNode1 );
333 word * pSim00 = Cec_ManSSim(
p, iNode0, 0 );
334 word * pSim01 = Cec_ManSSim(
p, iNode0, 1 );
335 word * pSim10 = Cec_ManSSim(
p, iNode1, fDiff );
336 word * pSim11 = Cec_ManSSim(
p, iNode1, !fDiff );
337 Abc_TtClear( Vec_WrdArray(
p->vSims),
p->nWords );
340 assert( Vec_IntSize(
p->vInputs) == 0 );
342 Abc_TtFill( pSim11,
p->nWords );
345 if (
p->nWords == 1 )
347 pSim00[0] = (
word)0xFFFFFFFF;
348 pSim11[0] = (
word)0xFFFFFFFF;
349 pSim01[0] = pSim00[0] << 32;
350 pSim10[0] = pSim11[0] << 32;
355 Abc_TtFill( pSim00,
p->nWords/2 );
356 Abc_TtFill( pSim11,
p->nWords/2 );
357 Abc_TtFill( pSim01 +
p->nWords/2,
p->nWords/2 );
358 Abc_TtFill( pSim10 +
p->nWords/2,
p->nWords/2 );
367 p->nSkipped =
p->nVisited = 0;
370 p->clkSat += Abc_Clock() - clk;
372 p->clkUnsat += Abc_Clock() - clk;
379 Abc_TtClear( Cec_ManSSim(
p, iNode, 0), 2*
p->nWords );
380 Vec_IntClear(
p->vInputs );