ABC: A System for Sequential Synthesis and Verification
 
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fpgaFanout.c
Go to the documentation of this file.
1
18
19#include "fpgaInt.h"
20
22
23
24#ifdef MAP_ALLOCATE_FANOUT
25
29
33
45void Fpga_NodeAddFaninFanout( Fpga_Node_t * pFanin, Fpga_Node_t * pFanout )
46{
47 Fpga_Node_t * pPivot;
48
49 // pFanins is a fanin of pFanout
50 assert( !Fpga_IsComplement(pFanin) );
51 assert( !Fpga_IsComplement(pFanout) );
52 assert( Fpga_Regular(pFanout->p1) == pFanin || Fpga_Regular(pFanout->p2) == pFanin );
53
54 pPivot = pFanin->pFanPivot;
55 if ( pPivot == NULL )
56 {
57 pFanin->pFanPivot = pFanout;
58 return;
59 }
60
61 if ( Fpga_Regular(pPivot->p1) == pFanin )
62 {
63 if ( Fpga_Regular(pFanout->p1) == pFanin )
64 {
65 pFanout->pFanFanin1 = pPivot->pFanFanin1;
66 pPivot->pFanFanin1 = pFanout;
67 }
68 else // if ( Fpga_Regular(pFanout->p2) == pFanin )
69 {
70 pFanout->pFanFanin2 = pPivot->pFanFanin1;
71 pPivot->pFanFanin1 = pFanout;
72 }
73 }
74 else // if ( Fpga_Regular(pPivot->p2) == pFanin )
75 {
76 assert( Fpga_Regular(pPivot->p2) == pFanin );
77 if ( Fpga_Regular(pFanout->p1) == pFanin )
78 {
79 pFanout->pFanFanin1 = pPivot->pFanFanin2;
80 pPivot->pFanFanin2 = pFanout;
81 }
82 else // if ( Fpga_Regular(pFanout->p2) == pFanin )
83 {
84 pFanout->pFanFanin2 = pPivot->pFanFanin2;
85 pPivot->pFanFanin2 = pFanout;
86 }
87 }
88}
89
101void Fpga_NodeRemoveFaninFanout( Fpga_Node_t * pFanin, Fpga_Node_t * pFanoutToRemove )
102{
103 Fpga_Node_t * pFanout, * pFanout2, ** ppFanList;
104 // start the linked list of fanouts
105 ppFanList = &pFanin->pFanPivot;
106 // go through the fanouts
107 Fpga_NodeForEachFanoutSafe( pFanin, pFanout, pFanout2 )
108 {
109 // skip the fanout-to-remove
110 if ( pFanout == pFanoutToRemove )
111 continue;
112 // add useful fanouts to the list
113 *ppFanList = pFanout;
114 ppFanList = Fpga_NodeReadNextFanoutPlace( pFanin, pFanout );
115 }
116 *ppFanList = NULL;
117}
118
131{
132 Fpga_Node_t * pFanout;
133 int Counter = 0;
134 Fpga_NodeForEachFanout( pNode, pFanout )
135 Counter++;
136 return Counter;
137}
138
142
143#endif
144
146
#define ABC_NAMESPACE_IMPL_START
#define ABC_NAMESPACE_IMPL_END
#define Fpga_NodeForEachFanout(pNode, pFanout)
Definition fpgaInt.h:269
#define Fpga_NodeReadNextFanoutPlace(pNode, pFanout)
Definition fpgaInt.h:264
void Fpga_NodeRemoveFaninFanout(Fpga_Node_t *pFanin, Fpga_Node_t *pFanoutToRemove)
void Fpga_NodeAddFaninFanout(Fpga_Node_t *pFanin, Fpga_Node_t *pFanout)
#define Fpga_NodeForEachFanoutSafe(pNode, pFanout, pFanout2)
Definition fpgaInt.h:274
int Fpga_NodeGetFanoutNum(Fpga_Node_t *pNode)
struct Fpga_NodeStruct_t_ Fpga_Node_t
Definition fpga.h:44
#define Fpga_IsComplement(p)
GLOBAL VARIABLES ///.
Definition fpga.h:57
#define Fpga_Regular(p)
Definition fpga.h:58
Fpga_Node_t * p1
Definition fpgaInt.h:200
Fpga_Node_t * p2
Definition fpgaInt.h:201
#define assert(ex)
Definition util_old.h:213