ABC: A System for Sequential Synthesis and Verification
 
Loading...
Searching...
No Matches
fpgaSwitch.c File Reference
#include "fpgaInt.h"
Include dependency graph for fpgaSwitch.c:

Go to the source code of this file.

Functions

ABC_NAMESPACE_IMPL_START float Fpga_CutGetSwitchDerefed (Fpga_Man_t *pMan, Fpga_Node_t *pNode, Fpga_Cut_t *pCut)
 DECLARATIONS ///.
 
float Fpga_CutRefSwitch (Fpga_Man_t *pMan, Fpga_Node_t *pNode, Fpga_Cut_t *pCut, int fFanouts)
 
float Fpga_CutDerefSwitch (Fpga_Man_t *pMan, Fpga_Node_t *pNode, Fpga_Cut_t *pCut, int fFanouts)
 
float Fpga_MappingGetSwitching (Fpga_Man_t *pMan, Fpga_NodeVec_t *vMapping)
 

Function Documentation

◆ Fpga_CutDerefSwitch()

float Fpga_CutDerefSwitch ( Fpga_Man_t * pMan,
Fpga_Node_t * pNode,
Fpga_Cut_t * pCut,
int fFanouts )

function*************************************************************

synopsis [Dereferences the cut.]

description [This procedure is similar to the procedure NodeRecusiveDeref.]

sideeffects []

seealso []

Definition at line 95 of file fpgaSwitch.c.

96{
97 Fpga_Node_t * pNodeChild;
98 float aArea;
99 int i;
100 // start the area of this cut
101 aArea = pNode->Switching;
102 if ( pCut->nLeaves == 1 )
103 return aArea;
104 // go through the children
105 for ( i = 0; i < pCut->nLeaves; i++ )
106 {
107 pNodeChild = pCut->ppLeaves[i];
108 assert( pNodeChild->nRefs > 0 );
109 if ( --pNodeChild->nRefs > 0 )
110 continue;
111 aArea += Fpga_CutDerefSwitch( pMan, pNodeChild, pNodeChild->pCutBest, fFanouts );
112 }
113 return aArea;
114}
float Fpga_CutDerefSwitch(Fpga_Man_t *pMan, Fpga_Node_t *pNode, Fpga_Cut_t *pCut, int fFanouts)
Definition fpgaSwitch.c:95
struct Fpga_NodeStruct_t_ Fpga_Node_t
Definition fpga.h:44
Fpga_Node_t * ppLeaves[FPGA_MAX_LEAVES+1]
Definition fpgaInt.h:237
Fpga_Cut_t * pCutBest
Definition fpgaInt.h:222
#define assert(ex)
Definition util_old.h:213
Here is the call graph for this function:
Here is the caller graph for this function:

◆ Fpga_CutGetSwitchDerefed()

ABC_NAMESPACE_IMPL_START float Fpga_CutGetSwitchDerefed ( Fpga_Man_t * pMan,
Fpga_Node_t * pNode,
Fpga_Cut_t * pCut )

DECLARATIONS ///.

CFile****************************************************************

FileName [fpgaSwitch.c]

PackageName [MVSIS 1.3: Multi-valued logic synthesis system.]

Synopsis [Generic technology mapping engine.]

Author [MVSIS Group]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - September 8, 2003.]

Revision [

Id
fpgaSwitch.h,v 1.0 2003/09/08 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// function*************************************************************

synopsis [Computes the exact area associated with the cut.]

description []

sideeffects []

seealso []

Definition at line 43 of file fpgaSwitch.c.

44{
45 float aResult, aResult2;
46 aResult2 = Fpga_CutRefSwitch( pMan, pNode, pCut, 0 );
47 aResult = Fpga_CutDerefSwitch( pMan, pNode, pCut, 0 );
48// assert( aResult == aResult2 );
49 return aResult;
50}
float Fpga_CutRefSwitch(Fpga_Man_t *pMan, Fpga_Node_t *pNode, Fpga_Cut_t *pCut, int fFanouts)
Definition fpgaSwitch.c:63
Here is the call graph for this function:

◆ Fpga_CutRefSwitch()

float Fpga_CutRefSwitch ( Fpga_Man_t * pMan,
Fpga_Node_t * pNode,
Fpga_Cut_t * pCut,
int fFanouts )

function*************************************************************

synopsis [References the cut.]

description [This procedure is similar to the procedure NodeReclaim.]

sideeffects []

seealso []

Definition at line 63 of file fpgaSwitch.c.

64{
65 Fpga_Node_t * pNodeChild;
66 float aArea;
67 int i;
68 // start the area of this cut
69 aArea = pNode->Switching;
70 if ( pCut->nLeaves == 1 )
71 return aArea;
72 // go through the children
73 for ( i = 0; i < pCut->nLeaves; i++ )
74 {
75 pNodeChild = pCut->ppLeaves[i];
76 assert( pNodeChild->nRefs >= 0 );
77 if ( pNodeChild->nRefs++ > 0 )
78 continue;
79 aArea += Fpga_CutRefSwitch( pMan, pNodeChild, pNodeChild->pCutBest, fFanouts );
80 }
81 return aArea;
82}
Here is the call graph for this function:
Here is the caller graph for this function:

◆ Fpga_MappingGetSwitching()

float Fpga_MappingGetSwitching ( Fpga_Man_t * pMan,
Fpga_NodeVec_t * vMapping )

Function*************************************************************

Synopsis [Computes the array of mapping.]

Description []

SideEffects []

SeeAlso []

Definition at line 127 of file fpgaSwitch.c.

128{
129 Fpga_Node_t * pNode;
130 float Switch;
131 int i;
132 Switch = 0.0;
133 for ( i = 0; i < vMapping->nSize; i++ )
134 {
135 pNode = vMapping->pArray[i];
136 // at least one phase has the best cut assigned
137 assert( !Fpga_NodeIsAnd(pNode) || pNode->pCutBest != NULL );
138 // at least one phase is used in the mapping
139 assert( pNode->nRefs > 0 );
140 // compute the array due to the supergate
141 Switch += pNode->Switching;
142 }
143 // add buffer for each CO driven by a CI
144 for ( i = 0; i < pMan->nOutputs; i++ )
145 if ( Fpga_NodeIsVar(Fpga_Regular(pMan->pOutputs[i])) && !Fpga_IsComplement(pMan->pOutputs[i]) )
146 Switch += Fpga_Regular(pMan->pOutputs[i])->Switching;
147 return Switch;
148}
#define Fpga_IsComplement(p)
GLOBAL VARIABLES ///.
Definition fpga.h:57
int Fpga_NodeIsAnd(Fpga_Node_t *p)
Definition fpgaCreate.c:127
int Fpga_NodeIsVar(Fpga_Node_t *p)
Definition fpgaCreate.c:126
#define Fpga_Regular(p)
Definition fpga.h:58
Fpga_Node_t ** pOutputs
Definition fpgaInt.h:106
Fpga_Node_t ** pArray
Definition fpgaInt.h:252
Here is the call graph for this function: