ABC: A System for Sequential Synthesis and Verification
 
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fpgaVec.c File Reference
#include "fpgaInt.h"
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Functions

Fpga_NodeVec_tFpga_NodeVecAlloc (int nCap)
 FUNCTION DEFINITIONS ///.
 
void Fpga_NodeVecFree (Fpga_NodeVec_t *p)
 
Fpga_Node_t ** Fpga_NodeVecReadArray (Fpga_NodeVec_t *p)
 
int Fpga_NodeVecReadSize (Fpga_NodeVec_t *p)
 
void Fpga_NodeVecGrow (Fpga_NodeVec_t *p, int nCapMin)
 
void Fpga_NodeVecShrink (Fpga_NodeVec_t *p, int nSizeNew)
 
void Fpga_NodeVecClear (Fpga_NodeVec_t *p)
 
void Fpga_NodeVecPush (Fpga_NodeVec_t *p, Fpga_Node_t *Entry)
 
int Fpga_NodeVecPushUnique (Fpga_NodeVec_t *p, Fpga_Node_t *Entry)
 
Fpga_Node_tFpga_NodeVecPop (Fpga_NodeVec_t *p)
 
void Fpga_NodeVecWriteEntry (Fpga_NodeVec_t *p, int i, Fpga_Node_t *Entry)
 
Fpga_Node_tFpga_NodeVecReadEntry (Fpga_NodeVec_t *p, int i)
 
void Fpga_NodeVecSortByLevel (Fpga_NodeVec_t *p)
 
int Fpga_NodeVecCompareArrivals (Fpga_Node_t **ppS1, Fpga_Node_t **ppS2)
 
void Fpga_SortNodesByArrivalTimes (Fpga_NodeVec_t *p)
 
void Fpga_NodeVecUnion (Fpga_NodeVec_t *p, Fpga_NodeVec_t *p1, Fpga_NodeVec_t *p2)
 
void Fpga_NodeVecPushOrder (Fpga_NodeVec_t *vNodes, Fpga_Node_t *pNode, int fIncreasing)
 
void Fpga_NodeVecReverse (Fpga_NodeVec_t *vNodes)
 

Function Documentation

◆ Fpga_NodeVecAlloc()

Fpga_NodeVec_t * Fpga_NodeVecAlloc ( int nCap)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Allocates a vector with the given capacity.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file fpgaVec.c.

46{
49 if ( nCap > 0 && nCap < 16 )
50 nCap = 16;
51 p->nSize = 0;
52 p->nCap = nCap;
53 p->pArray = p->nCap? ABC_ALLOC( Fpga_Node_t *, p->nCap ) : NULL;
54 return p;
55}
#define ABC_ALLOC(type, num)
Definition abc_global.h:264
Cube * p
Definition exorList.c:222
struct Fpga_NodeStruct_t_ Fpga_Node_t
Definition fpga.h:44
struct Fpga_NodeVecStruct_t_ Fpga_NodeVec_t
Definition fpga.h:45
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◆ Fpga_NodeVecClear()

void Fpga_NodeVecClear ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 153 of file fpgaVec.c.

154{
155 p->nSize = 0;
156}
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◆ Fpga_NodeVecCompareArrivals()

int Fpga_NodeVecCompareArrivals ( Fpga_Node_t ** ppS1,
Fpga_Node_t ** ppS2 )

Function*************************************************************

Synopsis [Compares the arrival times.]

Description []

SideEffects []

SeeAlso []

Definition at line 306 of file fpgaVec.c.

307{
308 if ( (*ppS1)->pCutBest->tArrival < (*ppS2)->pCutBest->tArrival )
309 return -1;
310 if ( (*ppS1)->pCutBest->tArrival > (*ppS2)->pCutBest->tArrival )
311 return 1;
312 return 0;
313}
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◆ Fpga_NodeVecFree()

void Fpga_NodeVecFree ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 68 of file fpgaVec.c.

69{
70 ABC_FREE( p->pArray );
71 ABC_FREE( p );
72}
#define ABC_FREE(obj)
Definition abc_global.h:267
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◆ Fpga_NodeVecGrow()

void Fpga_NodeVecGrow ( Fpga_NodeVec_t * p,
int nCapMin )

Function*************************************************************

Synopsis [Resizes the vector to the given capacity.]

Description []

SideEffects []

SeeAlso []

Definition at line 117 of file fpgaVec.c.

118{
119 if ( p->nCap >= nCapMin )
120 return;
121 p->pArray = ABC_REALLOC( Fpga_Node_t *, p->pArray, nCapMin );
122 p->nCap = nCapMin;
123}
#define ABC_REALLOC(type, obj, num)
Definition abc_global.h:268
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◆ Fpga_NodeVecPop()

Fpga_Node_t * Fpga_NodeVecPop ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 213 of file fpgaVec.c.

214{
215 return p->pArray[--p->nSize];
216}

◆ Fpga_NodeVecPush()

void Fpga_NodeVecPush ( Fpga_NodeVec_t * p,
Fpga_Node_t * Entry )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 169 of file fpgaVec.c.

170{
171 if ( p->nSize == p->nCap )
172 {
173 if ( p->nCap < 16 )
174 Fpga_NodeVecGrow( p, 16 );
175 else
176 Fpga_NodeVecGrow( p, 2 * p->nCap );
177 }
178 p->pArray[p->nSize++] = Entry;
179}
void Fpga_NodeVecGrow(Fpga_NodeVec_t *p, int nCapMin)
Definition fpgaVec.c:117
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◆ Fpga_NodeVecPushOrder()

void Fpga_NodeVecPushOrder ( Fpga_NodeVec_t * vNodes,
Fpga_Node_t * pNode,
int fIncreasing )

Function*************************************************************

Synopsis [Inserts a new node in the order by arrival times.]

Description []

SideEffects []

SeeAlso []

Definition at line 366 of file fpgaVec.c.

367{
368 Fpga_Node_t * pNode1, * pNode2;
369 int i;
370 Fpga_NodeVecPush( vNodes, pNode );
371 // find the place of the node
372 for ( i = vNodes->nSize-1; i > 0; i-- )
373 {
374 pNode1 = vNodes->pArray[i ];
375 pNode2 = vNodes->pArray[i-1];
376 if (( fIncreasing && pNode1->pCutBest->tArrival >= pNode2->pCutBest->tArrival) ||
377 (!fIncreasing && pNode1->pCutBest->tArrival <= pNode2->pCutBest->tArrival) )
378 break;
379 vNodes->pArray[i ] = pNode2;
380 vNodes->pArray[i-1] = pNode1;
381 }
382}
void Fpga_NodeVecPush(Fpga_NodeVec_t *p, Fpga_Node_t *Entry)
Definition fpgaVec.c:169
Fpga_Cut_t * pCutBest
Definition fpgaInt.h:222
Fpga_Node_t ** pArray
Definition fpgaInt.h:252
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◆ Fpga_NodeVecPushUnique()

int Fpga_NodeVecPushUnique ( Fpga_NodeVec_t * p,
Fpga_Node_t * Entry )

Function*************************************************************

Synopsis [Add the element while ensuring uniqueness.]

Description [Returns 1 if the element was found, and 0 if it was new. ]

SideEffects []

SeeAlso []

Definition at line 192 of file fpgaVec.c.

193{
194 int i;
195 for ( i = 0; i < p->nSize; i++ )
196 if ( p->pArray[i] == Entry )
197 return 1;
198 Fpga_NodeVecPush( p, Entry );
199 return 0;
200}
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◆ Fpga_NodeVecReadArray()

Fpga_Node_t ** Fpga_NodeVecReadArray ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 85 of file fpgaVec.c.

86{
87 return p->pArray;
88}

◆ Fpga_NodeVecReadEntry()

Fpga_Node_t * Fpga_NodeVecReadEntry ( Fpga_NodeVec_t * p,
int i )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 246 of file fpgaVec.c.

247{
248 assert( i >= 0 && i < p->nSize );
249 return p->pArray[i];
250}
#define assert(ex)
Definition util_old.h:213
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◆ Fpga_NodeVecReadSize()

int Fpga_NodeVecReadSize ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 101 of file fpgaVec.c.

102{
103 return p->nSize;
104}

◆ Fpga_NodeVecReverse()

void Fpga_NodeVecReverse ( Fpga_NodeVec_t * vNodes)

Function*************************************************************

Synopsis [Inserts a new node in the order by arrival times.]

Description []

SideEffects []

SeeAlso []

Definition at line 395 of file fpgaVec.c.

396{
397 Fpga_Node_t * pNode1, * pNode2;
398 int i;
399 for ( i = 0; i < vNodes->nSize/2; i++ )
400 {
401 pNode1 = vNodes->pArray[i];
402 pNode2 = vNodes->pArray[vNodes->nSize-1-i];
403 vNodes->pArray[i] = pNode2;
404 vNodes->pArray[vNodes->nSize-1-i] = pNode1;
405 }
406}

◆ Fpga_NodeVecShrink()

void Fpga_NodeVecShrink ( Fpga_NodeVec_t * p,
int nSizeNew )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 136 of file fpgaVec.c.

137{
138 assert( p->nSize >= nSizeNew );
139 p->nSize = nSizeNew;
140}

◆ Fpga_NodeVecSortByLevel()

void Fpga_NodeVecSortByLevel ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis [Sorting the entries by their integer value.]

Description []

SideEffects []

SeeAlso []

Definition at line 289 of file fpgaVec.c.

290{
291 qsort( (void *)p->pArray, (size_t)p->nSize, sizeof(Fpga_Node_t *),
292 (int (*)(const void *, const void *)) Fpga_NodeVecCompareLevels );
293}

◆ Fpga_NodeVecUnion()

void Fpga_NodeVecUnion ( Fpga_NodeVec_t * p,
Fpga_NodeVec_t * p1,
Fpga_NodeVec_t * p2 )

Function*************************************************************

Synopsis [Computes the union of nodes in two arrays.]

Description []

SideEffects []

SeeAlso []

Definition at line 345 of file fpgaVec.c.

346{
347 int i;
349 for ( i = 0; i < p1->nSize; i++ )
350 Fpga_NodeVecPush( p, p1->pArray[i] );
351 for ( i = 0; i < p2->nSize; i++ )
352 Fpga_NodeVecPush( p, p2->pArray[i] );
353}
void Fpga_NodeVecClear(Fpga_NodeVec_t *p)
Definition fpgaVec.c:153
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◆ Fpga_NodeVecWriteEntry()

void Fpga_NodeVecWriteEntry ( Fpga_NodeVec_t * p,
int i,
Fpga_Node_t * Entry )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 229 of file fpgaVec.c.

230{
231 assert( i >= 0 && i < p->nSize );
232 p->pArray[i] = Entry;
233}
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◆ Fpga_SortNodesByArrivalTimes()

void Fpga_SortNodesByArrivalTimes ( Fpga_NodeVec_t * p)

Function*************************************************************

Synopsis [Orders the nodes in the increasing order of the arrival times.]

Description []

SideEffects []

SeeAlso []

Definition at line 326 of file fpgaVec.c.

327{
328 qsort( (void *)p->pArray, (size_t)p->nSize, sizeof(Fpga_Node_t *),
329 (int (*)(const void *, const void *)) Fpga_NodeVecCompareArrivals );
330// assert( Fpga_CompareNodesByLevel( p->pArray, p->pArray + p->nSize - 1 ) <= 0 );
331}
int Fpga_NodeVecCompareArrivals(Fpga_Node_t **ppS1, Fpga_Node_t **ppS2)
Definition fpgaVec.c:306
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