65 Vec_StrFree( pLib->
vCube );
92 Vec_IntFreeP( &pGate->
vExpr );
137 pPinNew->
pName = (pPinNew->
pName ? Abc_UtilStrsav(pPinNew->
pName) : NULL);
138 pPinNew->
pNext = NULL;
159 if ( pPin1 == NULL || pPin2 == NULL )
201 char * pPhaseNames[10] = {
"UNKNOWN",
"INV",
"NONINV" };
203 fprintf( pFile,
"PIN * " );
205 fprintf( pFile,
"\n PIN %*s ", NameLen, pPin->
pName );
206 fprintf( pFile,
"%7s ", pPhaseNames[pPin->
Phase] );
207 fprintf( pFile,
"%3d ", (
int)pPin->
dLoadInput );
208 fprintf( pFile,
"%3d ", (
int)pPin->
dLoadMax );
231 assert( NameLen+FormLen+2 < 5000 );
233 fprintf( pFile,
"GATE %-*s ", GateLen, pGate->
pName );
234 fprintf( pFile,
"%8.2f ", pGate->
dArea );
235 fprintf( pFile,
"%-*s ", Abc_MinInt(NameLen+FormLen+2, 60), Buffer );
238 fprintf( pFile,
"%s", pGate->
pSop? pGate->
pSop :
"unspecified\n" );
239 if ( fAllPins && pGate->
pPins )
247 fprintf( pFile,
"\n" );
266 Vec_Ptr_t * vGates = Vec_PtrAlloc( 1000 );
267 int i, nCells, GateLen = 0, NameLen = 0, FormLen = 0;
272 for ( i = 0; i < nCells; i++ )
273 Vec_PtrPush( vGates, pCells[i].pMioGate );
278 for ( i = 0; i < pLib->
nGates; i++ )
279 Vec_PtrPush( vGates, pLib->
ppGates0[i] );
283 GateLen = Abc_MaxInt( GateLen,
strlen(pGate->
pName) );
285 FormLen = Abc_MaxInt( FormLen,
strlen(pGate->
pForm) );
287 NameLen = Abc_MaxInt( NameLen,
strlen(pPin->
pName) );
289 fprintf( pFile,
"# The genlib library \"%s\" with %d gates written by ABC on %s\n", pLib->
pName, Vec_PtrSize(vGates),
Extra_TimeStamp() );
291 Mio_WriteGate( pFile, pGate, GateLen, NameLen, FormLen, fPrintSops, fAllPins );
292 Vec_PtrFree( vGates );
309 if ( Vec_IntEntry(
p, 2*Node+1) >= 2*nVars )
310 fprintf( pFile,
"(" );
312 if ( Vec_IntEntry(
p, 2*Node+1) >= 2*nVars )
313 fprintf( pFile,
")" );
314 fprintf( pFile,
" %c ", fCompl ?
'|' :
'&' );
315 if ( Vec_IntEntry(
p, 2*Node+0) >= 2*nVars )
316 fprintf( pFile,
"(" );
318 if ( Vec_IntEntry(
p, 2*Node+0) >= 2*nVars )
319 fprintf( pFile,
")" );
324 fprintf( pFile,
"1\'b0" );
326 fprintf( pFile,
"1\'b1" );
327 else if ( Lit < 2 * nVars )
328 fprintf( pFile,
"%s%s", (Lit&1) ?
"~" :
"", (
char *)Vec_PtrEntry(vNames, Lit/2) );
339 fprintf( pFile,
"module %s ( ", pGate->
pName );
340 fprintf( pFile,
"%s", pGate->
pOutName );
342 fprintf( pFile,
", %s", pName );
343 fprintf( pFile,
" );\n" );
344 fprintf( pFile,
" output %s;\n", pGate->
pOutName );
345 if ( Vec_PtrSize(vNames) > 0 )
347 fprintf( pFile,
" input %s", (
char *)Vec_PtrEntry(vNames, 0) );
349 fprintf( pFile,
", %s", pName );
350 fprintf( pFile,
";\n" );
352 fprintf( pFile,
" assign %s = ", pGate->
pOutName );
354 fprintf( pFile,
";\n" );
355 fprintf( pFile,
"endmodule\n\n" );
361 Vec_Ptr_t * vGates = Vec_PtrAlloc( 1000 );
362 Vec_Ptr_t * vNames = Vec_PtrAlloc( 100 );
367 for ( i = 0; i < nCells; i++ )
368 Vec_PtrPush( vGates, pCells[i].pMioGate );
373 for ( i = 0; i < pLib->
nGates; i++ )
374 Vec_PtrPush( vGates, pLib->
ppGates0[i] );
376 fprintf( pFile,
"// Verilog for genlib library \"%s\" with %d gates written by ABC on %s\n\n", pLib->
pName, Vec_PtrSize(vGates),
Extra_TimeStamp() );
379 Vec_PtrClear( vNames );
381 Vec_PtrPush( vNames, pPin->
pName );
384 Vec_PtrFree( vNames );
385 Vec_PtrFree( vGates );
402 float Eps = (float)0.0094636;
403 if ( (*ppG1)->dDelayMax < (*ppG2)->dDelayMax - Eps )
405 if ( (*ppG1)->dDelayMax > (*ppG2)->dDelayMax + Eps )
408 Comp =
strcmp( (*ppG1)->pName, (*ppG2)->pName );
419 float Eps = (float)0.0094636;
470static inline float Mio_CellDelayAve(
Mio_Cell_t * pCell )
472 float CellDelay = 0;
int k;
473 for ( k = 0; k < (int)pCell->
nFanins; k++ )
474 CellDelay += pCell->
Delays[k];
479static inline float Mio_GateDelayAve(
Mio_Gate_t * pGate )
492 float Eps = (float)0.0094636;
493 float CellDelay, GateDelay;
495 if ( pCell->
dArea > (
float)pGate->
dArea + Eps )
497 if ( pCell->
dArea < (
float)pGate->
dArea - Eps )
500 CellDelay = Mio_GateDelayAve( pCell );
501 GateDelay = Mio_GateDelayAve( pGate );
502 if ( CellDelay > GateDelay + Eps )
504 if ( CellDelay < GateDelay - Eps )
519 int i, nGates, iGate, fProfile;
526 printf(
"Mio_CollectRoots(): Using gate profile to select gates for mapping.\n" );
531 if ( pGate->
nInputs > nInputs )
535 if ( tDelay > 0.0 && pGate->
dDelayMax > (
double)tDelay )
546 for ( i = 0; i < iGate; i++ )
547 if ( ppGates[i]->uTruth == pGate->
uTruth )
549 if ( Mio_CompareTwoGates(ppGates[i], pGate) )
556 ppGates[ iGate++ ] = pGate;
558 printf(
"Selected gate %3d: %-20s A = %7.2f D = %7.2f %3s = %-s\n",
564 qsort( (
void *)ppGates, (
size_t)iGate,
sizeof(
Mio_Gate_t *),
589 float Eps = (float)0.0094636;
590 float CellDelay, GateDelay;
592 if ( pCell->
Area > (
float)pGate->
dArea + Eps )
594 if ( pCell->
Area < (
float)pGate->
dArea - Eps )
597 CellDelay = Mio_CellDelayAve( pCell );
598 GateDelay = Mio_GateDelayAve( pGate );
599 if ( CellDelay > GateDelay + Eps )
601 if ( CellDelay < GateDelay - Eps )
619 for ( k = 0, pPin = pGate->
pPins; pPin; pPin = pPin->
pNext, k++ )
627 int i, nGates, iCell = 4;
638 for ( i = 0; i < iCell; i++ )
639 if ( ppCells[i].pName && ppCells[i].uTruth == pGate->
uTruth )
641 if ( Mio_CompareTwo( ppCells + i, pGate ) )
642 Mio_CollectCopy( ppCells + i, pGate );
651 Mio_CollectCopy( ppCells + Idx, pGate );
658 Mio_CollectCopy( ppCells + Idx, pGate );
661 Mio_CollectCopy( ppCells + iCell++, pGate );
663 if ( ppCells[0].pName == NULL )
664 { printf(
"Error: Cannot find constant 0 gate in the library.\n" );
return NULL; }
665 if ( ppCells[1].pName == NULL )
666 { printf(
"Error: Cannot find constant 1 gate in the library.\n" );
return NULL; }
667 if ( ppCells[2].pName == NULL )
668 { printf(
"Error: Cannot find buffer gate in the library.\n" );
return NULL; }
669 if ( ppCells[3].pName == NULL )
670 { printf(
"Error: Cannot find inverter gate in the library.\n" );
return NULL; }
674 qsort( (
void *)(ppCells + 4), (
size_t)(iCell - 4),
sizeof(
Mio_Cell_t),
679 for ( i = 0; i < iCell; i++ )
680 ppCells[i].Id = ppCells[i].pName ? i : -1;
686 int * pCounts =
ABC_CALLOC(
int, nGates + 4 );
691 for ( i = 0; i < iCell; i++ )
692 if ( ppCells[i].pName && ppCells[i].uTruth == pGate->
uTruth )
699 for ( i = 0; i < iCell; i++ )
702 printf(
"%4d : ", i );
703 if ( pCell->
pName == NULL )
706 printf(
"%-20s In = %d N = %3d A = %12.6f D = %12.6f\n",
707 pCell->
pName, pCell->
nFanins, pCounts[i], pCell->
Area, Mio_CellDelayAve(pCell) );
765 for ( k = 0, pPin = pGate->
pPins; pPin; pPin = pPin->
pNext, k++ )
778 int i, nGates, iCell0 = 0, iCell = 4;
786 Mio_CollectCopy2( ppCells0 + iCell0++, pGate0 );
787 assert( iCell0 <= nGates );
791 for ( pCell = ppCells0; pCell < ppCells0 + iCell0; pCell++ )
794 for ( i = 0; i < iCell; i++ )
795 if ( ppCells[i].pName && ppCells[i].uTruth == pCell->
uTruth )
797 if ( Mio_CompareTwo2( ppCells + i, pCell ) )
807 ppCells[Idx] = *pCell;
814 ppCells[Idx] = *pCell;
817 ppCells[iCell++] = *pCell;
820 if ( ppCells[0].pName == NULL )
821 { printf(
"Error: Cannot find constant 0 gate in the library.\n" );
return NULL; }
822 if ( ppCells[1].pName == NULL )
823 { printf(
"Error: Cannot find constant 1 gate in the library.\n" );
return NULL; }
824 if ( ppCells[2].pName == NULL )
825 { printf(
"Error: Cannot find buffer gate in the library.\n" );
return NULL; }
826 if ( ppCells[3].pName == NULL )
827 { printf(
"Error: Cannot find inverter gate in the library.\n" );
return NULL; }
831 qsort( (
void *)(ppCells + 4), (
size_t)(iCell - 4),
sizeof(
Mio_Cell2_t),
838 for ( i = 0; i < iCell; i++ )
840 ppCells[i].
Id = ppCells[i].
pName ? i : -1;
848 int * pCounts =
ABC_CALLOC(
int, nGates + 4 );
853 for ( i = 0; i < iCell; i++ )
854 if ( ppCells[i].pName && ppCells[i].uTruth == pGate0->
uTruth )
861 for ( i = 0; i < iCell; i++ )
864 printf(
"%4d : ", i );
865 if ( pCell->
pName == NULL )
868 printf(
"%-20s In = %d N = %3d A = %12.6f D = %12.6f\n",
902 ppGates[pGate0->
Cell] = pGate0;
903 *pvNames = Vec_PtrAlloc( nGates );
904 *pvTruths = Vec_WrdStart( nGates * 4 );
905 for ( i = 0; i < nGates; i++ )
910 Vec_PtrPush( *pvNames, pGate0->
pName );
911 pTruth = Vec_WrdEntryP( *pvTruths, iGate++*4 );
913 pTruth[0] = pTruth[1] = pTruth[2] = pTruth[3] = pGate0->
uTruth;
914 else if ( pGate0->
nInputs == 7 )
916 pTruth[0] = pTruth[2] = pGate0->
pTruth[0];
917 pTruth[1] = pTruth[3] = pGate0->
pTruth[1];
919 else if ( pGate0->
nInputs == 8 )
922 assert( iGate == nGates );
923 assert( Vec_WrdEntry(*pvTruths, 0) == 0 );
924 assert( Vec_WrdEntry(*pvTruths, 4) == ~(
word)0 );
925 assert( Vec_WrdEntry(*pvTruths, 8) == s_Truths6[0] );
926 assert( Vec_WrdEntry(*pvTruths, 12) == ~s_Truths6[0] );
944 static unsigned uTruths6[6][2] = {
945 { 0xAAAAAAAA, 0xAAAAAAAA },
946 { 0xCCCCCCCC, 0xCCCCCCCC },
947 { 0xF0F0F0F0, 0xF0F0F0F0 },
948 { 0xFF00FF00, 0xFF00FF00 },
949 { 0xFFFF0000, 0xFFFF0000 },
950 { 0x00000000, 0xFFFFFFFF }
974void Mio_DeriveTruthTable_rec( DdNode * bFunc,
unsigned uTruthsIn[][2],
unsigned uTruthRes[] )
976 unsigned uTruthsCof0[2];
977 unsigned uTruthsCof1[2];
980 if ( Cudd_IsComplement(bFunc) )
982 Mio_DeriveTruthTable_rec( Cudd_Not(bFunc), uTruthsIn, uTruthRes );
983 uTruthRes[0] = ~uTruthRes[0];
984 uTruthRes[1] = ~uTruthRes[1];
989 if ( bFunc->index == CUDD_CONST_INDEX )
997 Mio_DeriveTruthTable_rec( cuddE(bFunc), uTruthsIn, uTruthsCof0 );
998 Mio_DeriveTruthTable_rec( cuddT(bFunc), uTruthsIn, uTruthsCof1 );
1001 uTruthRes[0] = (uTruthsCof0[0] & ~uTruthsIn[bFunc->index][0]) |
1002 (uTruthsCof1[0] & uTruthsIn[bFunc->index][0]);
1003 uTruthRes[1] = (uTruthsCof0[1] & ~uTruthsIn[bFunc->index][1]) |
1004 (uTruthsCof1[1] & uTruthsIn[bFunc->index][1]);
1020 Mio_DeriveTruthTable_rec( pGate->bFunc, uTruthsIn, uTruthRes );
1038 word uRes, uFanins[6];
1041 for ( i = 0; i < nSigns; i++ )
1042 uFanins[i] = (((
word)uTruthsIn[i][1]) << 32) | (
word)uTruthsIn[i][0];
1043 uRes = Exp_Truth6( nSigns, pGate->
vExpr, (
word *)uFanins );
1044 uTruthRes[0] = uRes & 0xFFFFFFFF;
1045 uTruthRes[1] = uRes >> 32;
1062 for ( pCur = pSop; *pCur !=
'\n'; pCur++ )
1065 return pCur - pSop - 2;
1082 unsigned uSignCube[2];
1091 assert( nFanins == nInputs );
1099 for ( pCube = pGate->
pSop; *pCube; pCube += (nFanins) + 3 )
1103 for ( i = 0; i < nFanins; i++ )
1105 if ( pCube[i] ==
'0' )
1106 uSignCube[0] &= ~uTruthsIn[i][0];
1107 else if ( pCube[i] ==
'1' )
1108 uSignCube[0] &= uTruthsIn[i][0];
1112 uTruthRes[0] &=
MIO_MASK(1<<nInputs);
1118 for ( pCube = pGate->
pSop; *pCube; pCube += (nFanins) + 3 )
1122 for ( i = 0; i < nFanins; i++ )
1124 if ( pCube[i] ==
'0' )
1126 uSignCube[0] &= ~uTruthsIn[i][0];
1127 uSignCube[1] &= ~uTruthsIn[i][1];
1129 else if ( pCube[i] ==
'1' )
1131 uSignCube[0] &= uTruthsIn[i][0];
1132 uSignCube[1] &= uTruthsIn[i][1];
1135 uTruthRes[0] |= uSignCube[0];
1136 uTruthRes[1] |= uSignCube[1];
1154 float ** ptPinDelays,
int nPins,
int nInputs,
float tDelayZero,
1155 float * ptDelaysRes,
float * ptPinDelayMax )
1158 float Delay, DelayMax;
1162 for ( i = 0; i < nInputs; i++ )
1163 ptDelaysRes[i] = tDelayZero;
1166 for ( i = 0; i < nInputs; i++ )
1168 for ( k = 0, pPin = pGate->
pPins; pPin; pPin = pPin->
pNext, k++ )
1170 if ( ptPinDelays[k][i] < 0 )
1173 if ( ptDelaysRes[i] < Delay )
1174 ptDelaysRes[i] = Delay;
1181 if ( DelayMax < ptDelaysRes[i] )
1182 DelayMax = ptDelaysRes[i];
1184 *ptPinDelayMax = DelayMax;
1209 for ( i = 0; i < nInputs; i++ )
1214 pGate->
pPins = pPin;
1345 int nMints = (1 << nVars);
1346 word tCur, tTemp1, tTemp2;
1348 Vec_WrdClear( vResult );
1349 for ( i = 0; i < 2; i++ )
1351 tCur = i ? ~uTruth : uTruth;
1353 for (
p = 0;
p < nPerms;
p++ )
1356 for ( c = 0; c < nMints; c++ )
1358 Vec_WrdPush( vResult, tCur );
1359 tCur = Abc_Tt6Flip( tCur, pComp[c] );
1361 assert( tTemp2 == tCur );
1362 tCur = Abc_Tt6SwapAdjacent( tCur, pPerm[
p] );
1364 assert( tTemp1 == tCur );
1370 int nMints = (1 << nVars);
1371 char * pChar, * pChar2;
1373 for ( i = 0; i < nVars; i++ )
1374 Line[0][i] =
'A' + nVars - 1 - i;
1375 Line[0][nVars] =
'+';
1376 Line[0][nVars+1] = 0;
1377 for ( i = 0; i < 2; i++ )
1379 Line[n][nVars] = i ?
'-' :
'+';
1380 for (
p = 0;
p < nPerms;
p++ )
1382 for ( c = 0; c < nMints; c++ )
1384 strcpy( Line[n+1], Line[n] ); n++;
1385 pChar = &Line[n][pComp[c]];
1386 if ( *pChar >=
'A' && *pChar <=
'Z' )
1387 *pChar +=
'a' -
'A';
1388 else if ( *pChar >=
'a' && *pChar <=
'z' )
1389 *pChar -=
'a' -
'A';
1391 pChar = &Line[n][pPerm[
p]];
1396 assert( n == 2*nPerms*nMints );
1398 for ( i = 0; i < 2; i++ )
1399 for (
p = 0;
p < nPerms;
p++ )
1400 for ( c = 0; c < nMints; c++ )
1401 printf(
"%8d : %d %3d %2d : %s\n", n, i,
p, c, Line[n]), n++;
1414 int nGates, i, nClasses = 0,
nTotal;
1417 for ( i = 2; i <= 6; i++ )
1419 for ( i = 2; i <= 6; i++ )
1426 vResult = Vec_WrdAlloc( 2 * 720 * 64 );
1427 for ( i = 0; i < nGates; i++ )
1430 assert( pSizes[i] > 1 && pSizes[i] <= 6 );
1433 Nf_ManPrepareGate( pSizes[i], pTruths[i], pComp[pSizes[i]], pPerm[pSizes[i]], vResult );
1434 Vec_WrdUniqify(vResult);
1435 nClasses += Vec_WrdSize(vResult);
1438 printf(
"%6d : ", i );
1441 printf(
"Inputs = %2d ", pSizes[i] );
1442 printf(
"Total = %6d ",
nTotal );
1443 printf(
"Classes = %6d ", Vec_WrdSize(vResult) );
1444 printf(
"Configs = %8.2f ", 1.0*
nTotal/Vec_WrdSize(vResult) );
1445 printf(
"%6.2f %% ", 100.0*Vec_WrdSize(vResult)/
nTotal );
1449 Vec_WrdFree( vResult );
1454 for ( i = 2; i <= 6; i++ )
1456 for ( i = 2; i <= 6; i++ )
1459 printf(
"Classes = %d. ", nClasses );
1460 Abc_PrintTime( 1,
"Time", Abc_Clock() - clk );
1469 printf(
"Standard cell library is not available.\n" );
1492 printf(
"SC library cannot be found.\n" );
1497 printf(
"Genlib library cannot be found.\n" );
1527 while ( fgets( pBuffer, 1000, pFile ) != NULL )
1529 char * pToken =
strtok( pBuffer,
" \t\n" );
1530 if ( pToken == NULL )
1532 if ( pToken[0] ==
'#' )
1536 if ( pGate == NULL )
1538 printf(
"Cannot find gate \"%s\" in library \"%s\".\n", pToken,
Mio_LibraryReadName(pLib) );
1542 pToken =
strtok( NULL,
" \t\n" );
1575 if ( pGateDst == NULL )
1581 if ( pGateDst == NULL )
1600 if ( pGateDst == NULL )
1606 if ( pGateDst == NULL )
1640 printf(
"Gates with multiple outputs are not supported.\n" );
1661static inline int Abc_SclIsChar(
char c )
1663 return (c >=
'a' && c <=
'z') || (c >=
'A' && c <=
'Z') || c ==
'_';
1665static inline int Abc_SclIsName(
char c )
1667 return Abc_SclIsChar(c) || (c >=
'0' && c <=
'9');
1669static inline char * Abc_SclFindLimit(
char * pName )
1671 assert( Abc_SclIsChar(*pName) );
1672 while ( Abc_SclIsName(*pName) )
1676static inline int Abc_SclAreEqual(
char * pBase,
char * pName,
char * pLimit )
1678 return !
strncmp( pBase, pName, pLimit - pName );
1683 char * pTemp, * pLimit;
int i;
1684 if ( !
strncmp(pForm,
"CONST", 5) )
1686 sprintf( pBuffer,
"%s", pForm );
1689 for ( pTemp = pForm; *pTemp; )
1691 if ( !Abc_SclIsChar(*pTemp) )
1693 *pBuffer++ = *pTemp++;
1696 pLimit = Abc_SclFindLimit( pTemp );
1700 if ( Abc_SclAreEqual( pPin->
pName, pTemp, pLimit ) )
1702 *pBuffer++ =
'a' + i;
1720 sprintf( Buffer,
"g%0*d", nDigits, ++c );
1721 pGate->
pName = Abc_UtilStrsav( Buffer );
1725 pGate->
pForm = Abc_UtilStrsav( Buffer );
1731 sprintf( Buffer,
"%c",
'a'+i );
1732 pPin->
pName = Abc_UtilStrsav( Buffer );
1738 pGate->
pOutName = Abc_UtilStrsav( Buffer );
1745 pLib->
pName = Abc_UtilStrsav( Buffer );
1764 Vec_MemHashFree( pLib->
vTtMem );
1765 Vec_MemFree( pLib->
vTtMem );
1778 pLib->
vTtMem = Vec_MemAllocForTT( 6, 0 );
1810 Vec_PtrFree( pLib->
vNames );
1814 for ( i = 0; i < 3; i++ )
1816 Vec_MemHashFree( pLib->
vTtMem2[i] );
1817 Vec_MemFree( pLib->
vTtMem2[i] );
1838 for ( i = 0; i < 3; i++ )
1840 pvTtMem2[i] = pLib->
vTtMem2[i];
#define ABC_SWAP(Type, a, b)
#define ABC_ALLOC(type, num)
#define ABC_CALLOC(type, num)
#define ABC_CONST(number)
PARAMETERS ///.
#define ABC_NAMESPACE_IMPL_START
#define ABC_NAMESPACE_IMPL_END
ABC_DLL Abc_Frame_t * Abc_FrameGetGlobalFrame()
int nTotal
DECLARATIONS ///.
ABC_DLL void Abc_FrameUnmapAllNetworks(Abc_Frame_t *p)
ABC_DLL void * Abc_FrameReadLibGen()
ABC_DLL void * Abc_FrameReadLibScl()
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
void Dau_DsdPrintFromTruth(word *pTruth, int nVarsInit)
#define EXP_CONST0
INCLUDES ///.
ABC_NAMESPACE_IMPL_START int Gia_ManDeriveMatches(Vec_Ptr_t **pvNames, Vec_Wrd_t **pvTruths, Vec_Int_t **pvTt2Match4, Vec_Int_t **pvConfigs, Vec_Mem_t *pvTtMem2[3], Vec_Int_t *pvTt2Match2[3])
DECLARATIONS ///.
Mio_Cell2_t * Nf_StoDeriveMatches(Vec_Mem_t *vTtMem, Vec_Wec_t *vTt2Match, int *pnCells, int fPinFilter, int fPinPerm, int fPinQuick)
unsigned __int64 word
DECLARATIONS ///.
void Mem_FlexStop(Mem_Flex_t *p, int fVerbose)
Mio_Cell_t * Mio_CollectRootsNew(Mio_Library_t *pLib, int nInputs, int *pnGates, int fVerbose)
void Mio_WriteGate(FILE *pFile, Mio_Gate_t *pGate, int GateLen, int NameLen, int FormLen, int fPrintSops, int fAllPins)
void Mio_WriteLibraryVerilog(FILE *pFile, Mio_Library_t *pLib, int fPrintSops, int fShort, int fSelected)
void Exp_PrintVerilog(FILE *pFile, int nVars, Vec_Int_t *p, Vec_Ptr_t *vNames)
void Mio_WriteGateVerilog(FILE *pFile, Mio_Gate_t *pGate, Vec_Ptr_t *vNames)
ABC_NAMESPACE_IMPL_START void Mio_LibraryDelete(Mio_Library_t *pLib)
DECLARATIONS ///.
Mio_Gate_t ** Mio_CollectRoots(Mio_Library_t *pLib, int nInputs, float tDelay, int fSkipInv, int *pnGates, int fVerbose)
void Mio_LibraryReadProfile(FILE *pFile, Mio_Library_t *pLib)
Mio_Pin_t * Mio_PinDup(Mio_Pin_t *pPin)
void Mio_DeriveTruthTable(Mio_Gate_t *pGate, unsigned uTruthsIn[][2], int nSigns, int nInputs, unsigned uTruthRes[])
void Mio_LibraryShortFormula(Mio_Gate_t *pCell, char *pForm, char *pBuffer)
Mio_Cell_t * Mio_CollectRootsNewDefault(int nInputs, int *pnGates, int fVerbose)
void Mio_LibraryShortNames(Mio_Library_t *pLib)
void Mio_LibraryShiftDelay(Mio_Library_t *pLib, double Shift)
void Nf_ManPrepareLibraryTest2()
Mio_Cell2_t * Mio_CollectRootsNewDefault2(int nInputs, int *pnGates, int fVerbose)
void Mio_LibraryCleanProfile2(Mio_Library_t *pLib)
void Mio_DeriveGateDelays(Mio_Gate_t *pGate, float **ptPinDelays, int nPins, int nInputs, float tDelayZero, float *ptDelaysRes, float *ptPinDelayMax)
void Mio_LibraryTransferProfile(Mio_Library_t *pLibDst, Mio_Library_t *pLibSrc)
void Mio_WriteLibrary(FILE *pFile, Mio_Library_t *pLib, int fPrintSops, int fShort, int fSelected)
int Mio_SopGetVarNum(char *pSop)
int Mio_LibraryHasProfile(Mio_Library_t *pLib)
int Mio_AreaCompare2(Mio_Cell2_t *pG1, Mio_Cell2_t *pG2)
int Mio_AreaCompare(Mio_Cell_t *pG1, Mio_Cell_t *pG2)
void Mio_LibraryMatchesStop(Mio_Library_t *pLib)
void Mio_LibraryHashGates(Mio_Library_t *pLib)
int Mio_CheckGates(Mio_Library_t *pLib)
void Nf_ManPreparePrint(int nVars, int *pComp, int *pPerm, char Line[2 *720 *64][8])
void Nf_ManPrepareGate(int nVars, word uTruth, int *pComp, int *pPerm, Vec_Wrd_t *vResult)
void Mio_LibraryMatches2Start(Mio_Library_t *pLib)
void Mio_PinDelete(Mio_Pin_t *pPin)
void Mio_LibraryMatches2Fetch(Mio_Library_t *pLib, Vec_Ptr_t **pvNames, Vec_Wrd_t **pvTruths, Vec_Int_t **pvTt2Match4, Vec_Int_t **pvConfigs, Vec_Mem_t *pvTtMem2[3], Vec_Int_t *pvTt2Match2[3])
int Mio_CheckPins(Mio_Pin_t *pPin1, Mio_Pin_t *pPin2)
void Mio_LibraryMultiDelay(Mio_Library_t *pLib, double Multi)
void Nf_ManPrepareLibrary(Mio_Library_t *pLib)
word Mio_DeriveTruthTable6(Mio_Gate_t *pGate)
void Mio_LibraryTransferCellIds()
void Mio_LibraryMatches2Stop(Mio_Library_t *pLib)
void Mio_LibraryTransferDelays(Mio_Library_t *pLibD, Mio_Library_t *pLibS)
Mio_Cell2_t * Mio_CollectRootsNew2(Mio_Library_t *pLib, int nInputs, int *pnGates, int fVerbose)
int Mio_DelayCompare(Mio_Gate_t **ppG1, Mio_Gate_t **ppG2)
void Exp_PrintLitVerilog(FILE *pFile, int nVars, Vec_Int_t *p, Vec_Ptr_t *vNames, int Lit)
void Mio_LibraryMatchesStart(Mio_Library_t *pLib, int fPinFilter, int fPinPerm, int fPinQuick)
void Mio_DeriveTruthTable2(Mio_Gate_t *pGate, unsigned uTruthsIn[][2], int nTruths, int nInputs, unsigned uTruthRes[])
void Mio_GateDelete(Mio_Gate_t *pGate)
void Mio_WritePin(FILE *pFile, Mio_Pin_t *pPin, int NameLen, int fAllPins)
void Exp_PrintNodeVerilog(FILE *pFile, int nVars, Vec_Int_t *p, Vec_Ptr_t *vNames, int Node, int fCompl)
int Mio_CollectRootsNewDefault3(int nInputs, Vec_Ptr_t **pvNames, Vec_Wrd_t **pvTruths)
Mio_Gate_t * Mio_GateCreatePseudo(int nInputs)
void Mio_LibraryWriteProfile(FILE *pFile, Mio_Library_t *pLib)
void Mio_LibraryMatchesFetch(Mio_Library_t *pLib, Vec_Mem_t **pvTtMem, Vec_Wec_t **pvTt2Match, Mio_Cell2_t **ppCells, int *pnCells, int fPinFilter, int fPinPerm, int fPinQuick)
void Mio_LibraryMultiArea(Mio_Library_t *pLib, double Multi)
void Mio_LibraryTransferProfile2(Mio_Library_t *pLibDst, Mio_Library_t *pLibSrc)
Mio_Pin_t * Mio_GateReadPins(Mio_Gate_t *pGate)
void Mio_GateSetProfile(Mio_Gate_t *pGate, int Prof)
int Mio_GateReadPinNum(Mio_Gate_t *pGate)
char * Mio_LibraryReadName(Mio_Library_t *pLib)
DECLARATIONS ///.
#define Mio_GateForEachPinSafe(Gate, Pin, Pin2)
struct Mio_LibraryStruct_t_ Mio_Library_t
int Mio_GateReadProfile(Mio_Gate_t *pGate)
word Mio_GateReadTruth(Mio_Gate_t *pGate)
void Mio_GateAddToProfile2(Mio_Gate_t *pGate, int Prof)
Mio_Gate_t * Mio_LibraryReadGateByName(Mio_Library_t *pLib, char *pName, char *pOutName)
int Mio_GateReadProfile2(Mio_Gate_t *pGate)
struct Mio_Cell2_t_ Mio_Cell2_t
struct Mio_Cell_t_ Mio_Cell_t
#define Mio_LibraryForEachGate(Lib, Gate)
GLOBAL VARIABLES ///.
char * Mio_GateReadName(Mio_Gate_t *pGate)
Mio_Pin_t * Mio_PinReadNext(Mio_Pin_t *pPin)
struct Mio_PinStruct_t_ Mio_Pin_t
int Mio_LibraryReadGateNum(Mio_Library_t *pLib)
#define Mio_GateForEachPin(Gate, Pin)
#define Mio_LibraryForEachGateSafe(Lib, Gate, Gate2)
void Mio_GateAddToProfile(Mio_Gate_t *pGate, int Prof)
void Mio_GateSetCell(Mio_Gate_t *pGate, int Cell)
struct Mio_GateStruct_t_ Mio_Gate_t
void Mio_GateSetProfile2(Mio_Gate_t *pGate, int Prof)
char * Mio_GateReadForm(Mio_Gate_t *pGate)
int Abc_SclCellFind(SC_Lib *p, char *pName)
int st__strhash(const char *string, int modulus)
st__table * st__init_table(st__compare_func_type compare, st__hash_func_type hash)
int st__insert(st__table *table, const char *key, char *value)
void st__free_table(st__table *table)
Mio_Gate_t ** ppGatesName
Vec_Int_t * vTt2Match2[3]
typedefABC_NAMESPACE_IMPL_START struct Vec_Mem_t_ Vec_Mem_t
DECLARATIONS ///.
#define Vec_PtrForEachEntryStart(Type, vVec, pEntry, i, Start)
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
#define Vec_PtrForEachEntry(Type, vVec, pEntry, i)
MACRO DEFINITIONS ///.
typedefABC_NAMESPACE_HEADER_START struct Vec_Wec_t_ Vec_Wec_t
INCLUDES ///.
typedefABC_NAMESPACE_HEADER_START struct Vec_Wrd_t_ Vec_Wrd_t
INCLUDES ///.