ABC: A System for Sequential Synthesis and Verification
 
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wlcSim.c File Reference
#include "wlc.h"
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Functions

void Wlc_NtkDeleteSim (Vec_Ptr_t *p)
 
Vec_Ptr_tWlc_NtkSimulate (Wlc_Ntk_t *p, Vec_Int_t *vNodes, int nWords, int nFrames)
 
void Wlc_NtkSimulatePrint (Wlc_Ntk_t *p, Vec_Int_t *vNodes, Vec_Ptr_t *vRes, int nWords, int nFrames)
 
void Wlc_NtkSimulateTest (Wlc_Ntk_t *p)
 

Function Documentation

◆ Wlc_NtkDeleteSim()

void Wlc_NtkDeleteSim ( Vec_Ptr_t * p)

Function*************************************************************

Synopsis [Performs simulation of a word-level network.]

Description [Returns vRes, a 2D array of simulation information for the output of each bit of each object listed in vNodes. In particular, Vec_Ptr_t * vSimObj = (Vec_Ptr_t *)Vec_PtrEntry(vRes, iObj) and Vec_Ptr_t * vSimObjBit = (Vec_Ptr_t *)Vec_PtrEntry(vSimObj, iBit) are arrays containing the simulation info for each object (vSimObj) and for each output bit of this object (vSimObjBit). Alternatively, Vec_Ptr_t * vSimObjBit = Vec_VecEntryEntry( (Vec_Vec_t *)vRes, iObj, iBit ). The output bitwidth of an object is Wlc_ObjRange( Wlc_NtkObj(pNtk, iObj) ). Simulation information is binary data constaining the given number (nWords) of 64-bit machine words for the given number (nFrames) of consecutive timeframes. The total number of timeframes is nWords * nFrames for each bit of each object.]

SideEffects []

SeeAlso []

Definition at line 120 of file wlcSim.c.

121{
122 word * pInfo; int i, k;
123 Vec_Vec_t * vVec = (Vec_Vec_t *)p;
124 Vec_VecForEachEntry( word *, vVec, pInfo, i, k )
125 ABC_FREE( pInfo );
126 Vec_VecFree( vVec );
127}
#define ABC_FREE(obj)
Definition abc_global.h:267
Cube * p
Definition exorList.c:222
unsigned __int64 word
DECLARATIONS ///.
Definition kitPerm.c:36
#define Vec_VecForEachEntry(Type, vGlob, pEntry, i, k)
Definition vecVec.h:87
typedefABC_NAMESPACE_HEADER_START struct Vec_Vec_t_ Vec_Vec_t
INCLUDES ///.
Definition vecVec.h:42
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◆ Wlc_NtkSimulate()

Vec_Ptr_t * Wlc_NtkSimulate ( Wlc_Ntk_t * p,
Vec_Int_t * vNodes,
int nWords,
int nFrames )

Definition at line 128 of file wlcSim.c.

129{
130 Gia_Obj_t * pObj;
131 Vec_Ptr_t * vOne, * vRes;
132 Gia_Man_t * pGia = Wlc_NtkBitBlast( p, NULL );
133 Wlc_Obj_t * pWlcObj;
134 int f, i, k, w, nBits, Counter = 0;
135 // allocate simulation info for one timeframe
136 Vec_WrdFreeP( &pGia->vSims );
137 pGia->vSims = Vec_WrdStart( Gia_ManObjNum(pGia) * nWords );
138 pGia->nSimWords = nWords;
139 // allocate resulting simulation info
140 vRes = Vec_PtrAlloc( Vec_IntSize(vNodes) );
141 Wlc_NtkForEachObjVec( vNodes, p, pWlcObj, i )
142 {
143 nBits = Wlc_ObjRange(pWlcObj);
144 vOne = Vec_PtrAlloc( nBits );
145 for ( k = 0; k < nBits; k++ )
146 Vec_PtrPush( vOne, ABC_CALLOC(word, nWords * nFrames) );
147 Vec_PtrPush( vRes, vOne );
148 }
149 // perform simulation (const0 and flop outputs are already initialized)
150 Gia_ManRandomW( 1 );
151 for ( f = 0; f < nFrames; f++ )
152 {
153 Gia_ManForEachObj1( pGia, pObj, i )
154 {
155 if ( Gia_ObjIsAnd(pObj) )
156 Wlc_ObjSimAnd( pGia, i );
157 else if ( Gia_ObjIsCo(pObj) )
158 Wlc_ObjSimCo( pGia, i );
159 else if ( Gia_ObjIsPi(pGia, pObj) )
160 Wlc_ObjSimPi( pGia, i );
161 else if ( Gia_ObjIsRo(pGia, pObj) )
162 Wlc_ObjSimRo( pGia, i );
163 }
164 // collect simulation data
165 Wlc_NtkForEachObjVec( vNodes, p, pWlcObj, i )
166 {
167 int nBits = Wlc_ObjRange(pWlcObj);
168 int iFirst = Vec_IntEntry( &p->vCopies, Wlc_ObjId(p, pWlcObj) );
169 for ( k = 0; k < nBits; k++ )
170 {
171 int iLit = Vec_IntEntry( &p->vBits, iFirst + k );
172 word * pInfo = (word*)Vec_VecEntryEntry( (Vec_Vec_t *)vRes, i, k );
173 if ( iLit == -1 )
174 {
175 Counter++;
176 for ( w = 0; w < nWords; w++ )
177 pInfo[f * nWords + w] = 0;
178 }
179 else
180 {
181 word * pInfoObj = Wlc_ObjSim( pGia, Abc_Lit2Var(iLit) );
182 for ( w = 0; w < nWords; w++ )
183 pInfo[f * nWords + w] = Abc_LitIsCompl(iLit) ? ~pInfoObj[w] : pInfoObj[w];
184 }
185 }
186 }
187 if ( f == 0 && Counter )
188 printf( "Replaced %d dangling internal bits with constant 0.\n", Counter );
189 }
190 Vec_WrdFreeP( &pGia->vSims );
191 pGia->nSimWords = 0;
192 Gia_ManStop( pGia );
193 return vRes;
194}
int nWords
Definition abcNpn.c:127
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
void Gia_ManStop(Gia_Man_t *p)
Definition giaMan.c:82
word Gia_ManRandomW(int fReset)
Definition giaUtil.c:67
struct Gia_Obj_t_ Gia_Obj_t
Definition gia.h:76
struct Gia_Man_t_ Gia_Man_t
Definition gia.h:96
#define Gia_ManForEachObj1(p, pObj, i)
Definition gia.h:1192
Vec_Wrd_t * vSims
Definition gia.h:213
int nSimWords
Definition gia.h:209
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42
Gia_Man_t * Wlc_NtkBitBlast(Wlc_Ntk_t *p, Wlc_BstPar_t *pPars)
Definition wlcBlast.c:1349
#define Wlc_NtkForEachObjVec(vVec, p, pObj, i)
Definition wlc.h:360
struct Wlc_Obj_t_ Wlc_Obj_t
BASIC TYPES ///.
Definition wlc.h:118
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◆ Wlc_NtkSimulatePrint()

void Wlc_NtkSimulatePrint ( Wlc_Ntk_t * p,
Vec_Int_t * vNodes,
Vec_Ptr_t * vRes,
int nWords,
int nFrames )

Function*************************************************************

Synopsis [Testing procedure.]

Description [This testing procedure assumes that the WLC network has one node, which is a multiplier. It simulates the node and checks the word-level interpretation of the bit-level simulation info to make sure that it indeed represents multiplication.]

SideEffects []

SeeAlso []

Definition at line 210 of file wlcSim.c.

211{
212 Wlc_Obj_t * pWlcObj;
213 int f, w, b, i, k, iPat = 0;
214 for ( f = 0; f < nFrames; f++, printf("\n") )
215 for ( w = 0; w < nWords; w++ )
216 for ( b = 0; b < 64; b++, iPat++, printf("\n") )
217 {
218 Wlc_NtkForEachObjVec( vNodes, p, pWlcObj, i )
219 {
220 int nBits = Wlc_ObjRange(pWlcObj);
221 for ( k = nBits-1; k >= 0; k-- )
222 {
223 word * pInfo = (word*)Vec_VecEntryEntry( (Vec_Vec_t *)vRes, i, k );
224 printf( "%d", Abc_InfoHasBit((unsigned *)pInfo, iPat) );
225 }
226 printf( " " );
227 }
228 }
229}
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◆ Wlc_NtkSimulateTest()

void Wlc_NtkSimulateTest ( Wlc_Ntk_t * p)

Definition at line 230 of file wlcSim.c.

231{
232 int nWords = 2;
233 int nFrames = 2;
234 Vec_Ptr_t * vRes;
235 Vec_Int_t * vNodes = Vec_IntAlloc( 3 );
236 Vec_IntPush( vNodes, 1 );
237 Vec_IntPush( vNodes, 2 );
238 Vec_IntPush( vNodes, 3 );
239 vRes = Wlc_NtkSimulate( p, vNodes, nWords, nFrames );
240 Wlc_NtkSimulatePrint( p, vNodes, vRes, nWords, nFrames );
241 Wlc_NtkDeleteSim( vRes );
242 Vec_IntFree( vNodes );
243}
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
Definition bblif.c:37
void Wlc_NtkSimulatePrint(Wlc_Ntk_t *p, Vec_Int_t *vNodes, Vec_Ptr_t *vRes, int nWords, int nFrames)
Definition wlcSim.c:210
void Wlc_NtkDeleteSim(Vec_Ptr_t *p)
Definition wlcSim.c:120
Vec_Ptr_t * Wlc_NtkSimulate(Wlc_Ntk_t *p, Vec_Int_t *vNodes, int nWords, int nFrames)
Definition wlcSim.c:128
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