abcXsim.c File Reference

#include "base/abc/abc.h"
#include "aig/gia/gia.h"

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Macros
#define	XVS0   ABC_INIT_ZERO
	DECLARATIONS ///.
#define	XVS1   ABC_INIT_ONE
#define	XVSX   ABC_INIT_DC

Functions
void	Abc_NtkXValueSimulate (Abc_Ntk_t *pNtk, int nFrames, int fXInputs, int fXState, int fVerbose)
	FUNCTION DEFINITIONS ///.
void	Abc_NtkCycleInitState (Abc_Ntk_t *pNtk, int nFrames, int fUseXval, int fVerbose)

Macro Definition Documentation

XVS0

#define XVS0   ABC_INIT_ZERO

DECLARATIONS ///.

CFile****************************************************************

FileName [abcXsim.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Network and node package.]

Synopsis [Using X-valued simulation.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - June 20, 2005.]

Revision [

Id

abcXsim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp

]

Definition at line 30 of file abcXsim.c.

XVS1

#define XVS1   ABC_INIT_ONE

Definition at line 31 of file abcXsim.c.

XVSX

#define XVSX   ABC_INIT_DC

Definition at line 32 of file abcXsim.c.

Function Documentation

Abc_NtkCycleInitState()

void Abc_NtkCycleInitState	(	Abc_Ntk_t *	pNtk,
		int	nFrames,
		int	fUseXval,
		int	fVerbose )

Function*************************************************************

Synopsis [Cycles the circuit to create a new initial state.]

Description [Simulates the circuit with random (or ternary) input for the given number of timeframes to get a better initial state.]

SideEffects []

SeeAlso []

Definition at line 192 of file abcXsim.c.

{ 
    Abc_Obj_t * pObj;
    int i, f;
    assert( Abc_NtkIsStrash(pNtk) );
//    srand( 0x12341234 );
    Gia_ManRandom( 1 );
    // initialize the values
    Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
    Abc_NtkForEachLatch( pNtk, pObj, i )
        Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
    // simulate for the given number of timeframes
    for ( f = 0; f < nFrames; f++ )
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, fUseXval? ABC_INIT_DC : Abc_XsimRand2() );
//            Abc_ObjSetXsim( pObj, ABC_INIT_ONE );
        Abc_AigForEachAnd( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
        Abc_NtkForEachCo( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
    }
    // set the final values
    Abc_NtkForEachLatch( pNtk, pObj, i )
    {
        pObj->pData = (void *)(ABC_PTRINT_T)Abc_ObjGetXsim(Abc_ObjFanout0(pObj));
//        printf( "%d", Abc_LatchIsInit1(pObj) );
    }
//    printf( "\n" );
}

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Abc_NtkXValueSimulate()

void Abc_NtkXValueSimulate	(	Abc_Ntk_t *	pNtk,
		int	nFrames,
		int	fXInputs,
		int	fXState,
		int	fVerbose )

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Performs X-valued simulation of the sequential network.]

Description []

SideEffects []

SeeAlso []

Definition at line 111 of file abcXsim.c.

{
    Abc_Obj_t * pObj;
    int i, f;
    assert( Abc_NtkIsStrash(pNtk) );
//    srand( 0x12341234 );
    Gia_ManRandom( 1 );
    // start simulation
    Abc_ObjSetXsim( Abc_AigConst1(pNtk), XVS1 );
    if ( fXInputs )
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, XVSX );
    }
    else
    {
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
    }
    if ( fXState )
    {
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), XVSX );
    }
    else
    {
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_LatchInit(pObj) );
    }
    // simulate and print the result
    fprintf( stdout, "Frame : Inputs : Latches : Outputs\n" );
    for ( f = 0; f < nFrames; f++ )
    {
        Abc_AigForEachAnd( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_XsimAnd(Abc_ObjGetXsimFanin0(pObj), Abc_ObjGetXsimFanin1(pObj)) );
        Abc_NtkForEachCo( pNtk, pObj, i )
            Abc_ObjSetXsim( pObj, Abc_ObjGetXsimFanin0(pObj) );
        // print out
        fprintf( stdout, "%2d : ", f );
        Abc_NtkForEachPi( pNtk, pObj, i )
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
        fprintf( stdout, " : " );
        Abc_NtkForEachLatch( pNtk, pObj, i )
        {
//            if ( Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) != XVSX )
//                printf( " %s=", Abc_ObjName(pObj) );
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(Abc_ObjFanout0(pObj)) );
        }
        fprintf( stdout, " : " );
        Abc_NtkForEachPo( pNtk, pObj, i )
            Abc_XsimPrint( stdout, Abc_ObjGetXsim(pObj) );
        fprintf( stdout, "\n" );
        // assign input values
        if ( fXInputs )
        {
            Abc_NtkForEachPi( pNtk, pObj, i )
                Abc_ObjSetXsim( pObj, XVSX );
        }
        else
        {
            Abc_NtkForEachPi( pNtk, pObj, i )
                Abc_ObjSetXsim( pObj, Abc_XsimRand2() );
        }
        // transfer the latch values
        Abc_NtkForEachLatch( pNtk, pObj, i )
            Abc_ObjSetXsim( Abc_ObjFanout0(pObj), Abc_ObjGetXsim(Abc_ObjFanin0(pObj)) );
    }
}

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