ABC: A System for Sequential Synthesis and Verification
 
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cecSatG.c
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1
20
21#include "aig/gia/gia.h"
22#include "misc/util/utilTruth.h"
24#include "cec.h"
25
27
31
32// sweeping manager
33typedef struct Cec3_Par_t_ Cec3_Par_t;
35{
36 int nSimWords; // simulation words
37 int nSimRounds; // simulation rounds
38 int nItersMax; // max number of iterations
39 int nConfLimit; // SAT solver conflict limit
40 int fIsMiter; // this is a miter
41 int fUseCones; // use logic cones
42 int fVeryVerbose; // verbose stats
43 int fVerbose; // verbose stats
44};
45
46// SAT solving manager
47typedef struct Cec3_Man_t_ Cec3_Man_t;
49{
50 Cec3_Par_t * pPars; // parameters
51 Gia_Man_t * pAig; // user's AIG
52 Gia_Man_t * pNew; // internal AIG
53 // SAT solving
54 bmcg_sat_solver* pSat; // SAT solver
55 Vec_Ptr_t * vFrontier; // CNF construction
56 Vec_Ptr_t * vFanins; // CNF construction
57 Vec_Wrd_t * vSims; // CI simulation info
58 Vec_Int_t * vNodesNew; // nodes
59 Vec_Int_t * vSatVars; // nodes
62 // statistics
74};
75
76static inline int Cec3_ObjSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjCopy2Array(p, Gia_ObjId(p, pObj)); }
77static inline int Cec3_ObjSetSatId( Gia_Man_t * p, Gia_Obj_t * pObj, int Num ) { assert(Cec3_ObjSatId(p, pObj) == -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), Num); return Num; }
78static inline void Cec3_ObjCleanSatId( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert(Cec3_ObjSatId(p, pObj) != -1); Gia_ObjSetCopy2Array(p, Gia_ObjId(p, pObj), -1); }
79
80static inline void satoko_mark_cone( bmcg_sat_solver * p, int * pVars, int nVars ) {}
81static inline void satoko_unmark_cone( bmcg_sat_solver * p, int * pVars, int nVars ) {}
82
86
99{
100 memset( p, 0, sizeof(Cec3_Par_t) );
101 p->nSimWords = 12; // simulation words
102 p->nSimRounds = 4; // simulation rounds
103 p->nItersMax = 10; // max number of iterations
104 p->nConfLimit = 1000; // conflict limit at a node
105 p->fIsMiter = 0; // this is a miter
106 p->fUseCones = 0; // use logic cones
107 p->fVeryVerbose = 0; // verbose stats
108 p->fVerbose = 0; // verbose stats
109}
110
123{
124 int fPolarFlip = 0;
125 Gia_Obj_t * pNodeI, * pNodeT, * pNodeE;
126 int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
127
128 assert( !Gia_IsComplement( pNode ) );
129 assert( pNode->fMark0 );
130 // get nodes (I = if, T = then, E = else)
131 pNodeI = Gia_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
132 // get the variable numbers
133 VarF = Cec3_ObjSatId(p, pNode);
134 VarI = Cec3_ObjSatId(p, pNodeI);
135 VarT = Cec3_ObjSatId(p, Gia_Regular(pNodeT));
136 VarE = Cec3_ObjSatId(p, Gia_Regular(pNodeE));
137 // get the complementation flags
138 fCompT = Gia_IsComplement(pNodeT);
139 fCompE = Gia_IsComplement(pNodeE);
140
141 // f = ITE(i, t, e)
142
143 // i' + t' + f
144 // i' + t + f'
145 // i + e' + f
146 // i + e + f'
147
148 // create four clauses
149 pLits[0] = Abc_Var2Lit(VarI, 1);
150 pLits[1] = Abc_Var2Lit(VarT, 1^fCompT);
151 pLits[2] = Abc_Var2Lit(VarF, 0);
152 if ( fPolarFlip )
153 {
154 if ( pNodeI->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
155 if ( Gia_Regular(pNodeT)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
156 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
157 }
158 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
159 assert( RetValue );
160 pLits[0] = Abc_Var2Lit(VarI, 1);
161 pLits[1] = Abc_Var2Lit(VarT, 0^fCompT);
162 pLits[2] = Abc_Var2Lit(VarF, 1);
163 if ( fPolarFlip )
164 {
165 if ( pNodeI->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
166 if ( Gia_Regular(pNodeT)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
167 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
168 }
169 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
170 assert( RetValue );
171 pLits[0] = Abc_Var2Lit(VarI, 0);
172 pLits[1] = Abc_Var2Lit(VarE, 1^fCompE);
173 pLits[2] = Abc_Var2Lit(VarF, 0);
174 if ( fPolarFlip )
175 {
176 if ( pNodeI->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
177 if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
178 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
179 }
180 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
181 assert( RetValue );
182 pLits[0] = Abc_Var2Lit(VarI, 0);
183 pLits[1] = Abc_Var2Lit(VarE, 0^fCompE);
184 pLits[2] = Abc_Var2Lit(VarF, 1);
185 if ( fPolarFlip )
186 {
187 if ( pNodeI->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
188 if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
189 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
190 }
191 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
192 assert( RetValue );
193
194 // two additional clauses
195 // t' & e' -> f'
196 // t & e -> f
197
198 // t + e + f'
199 // t' + e' + f
200
201 if ( VarT == VarE )
202 {
203// assert( fCompT == !fCompE );
204 return;
205 }
206
207 pLits[0] = Abc_Var2Lit(VarT, 0^fCompT);
208 pLits[1] = Abc_Var2Lit(VarE, 0^fCompE);
209 pLits[2] = Abc_Var2Lit(VarF, 1);
210 if ( fPolarFlip )
211 {
212 if ( Gia_Regular(pNodeT)->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
213 if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
214 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
215 }
216 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
217 assert( RetValue );
218 pLits[0] = Abc_Var2Lit(VarT, 1^fCompT);
219 pLits[1] = Abc_Var2Lit(VarE, 1^fCompE);
220 pLits[2] = Abc_Var2Lit(VarF, 0);
221 if ( fPolarFlip )
222 {
223 if ( Gia_Regular(pNodeT)->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
224 if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
225 if ( pNode->fPhase ) pLits[2] = Abc_LitNot( pLits[2] );
226 }
227 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 3 );
228 assert( RetValue );
229}
231{
232 int fPolarFlip = 0;
233 Gia_Obj_t * pFanin;
234 int * pLits, nLits, RetValue, i;
235 assert( !Gia_IsComplement(pNode) );
236 assert( Gia_ObjIsAnd( pNode ) );
237 // create storage for literals
238 nLits = Vec_PtrSize(vSuper) + 1;
239 pLits = ABC_ALLOC( int, nLits );
240 // suppose AND-gate is A & B = C
241 // add !A => !C or A + !C
242 Vec_PtrForEachEntry( Gia_Obj_t *, vSuper, pFanin, i )
243 {
244 pLits[0] = Abc_Var2Lit(Cec3_ObjSatId(p, Gia_Regular(pFanin)), Gia_IsComplement(pFanin));
245 pLits[1] = Abc_Var2Lit(Cec3_ObjSatId(p, pNode), 1);
246 if ( fPolarFlip )
247 {
248 if ( Gia_Regular(pFanin)->fPhase ) pLits[0] = Abc_LitNot( pLits[0] );
249 if ( pNode->fPhase ) pLits[1] = Abc_LitNot( pLits[1] );
250 }
251 RetValue = bmcg_sat_solver_addclause( pSat, pLits, 2 );
252 assert( RetValue );
253 }
254 // add A & B => C or !A + !B + C
255 Vec_PtrForEachEntry( Gia_Obj_t *, vSuper, pFanin, i )
256 {
257 pLits[i] = Abc_Var2Lit(Cec3_ObjSatId(p, Gia_Regular(pFanin)), !Gia_IsComplement(pFanin));
258 if ( fPolarFlip )
259 {
260 if ( Gia_Regular(pFanin)->fPhase ) pLits[i] = Abc_LitNot( pLits[i] );
261 }
262 }
263 pLits[nLits-1] = Abc_Var2Lit(Cec3_ObjSatId(p, pNode), 0);
264 if ( fPolarFlip )
265 {
266 if ( pNode->fPhase ) pLits[nLits-1] = Abc_LitNot( pLits[nLits-1] );
267 }
268 RetValue = bmcg_sat_solver_addclause( pSat, pLits, nLits );
269 assert( RetValue );
270 ABC_FREE( pLits );
271}
272
284void Cec3_CollectSuper_rec( Gia_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
285{
286 // if the new node is complemented or a PI, another gate begins
287 if ( Gia_IsComplement(pObj) || Gia_ObjIsCi(pObj) ||
288 (!fFirst && Gia_ObjValue(pObj) > 1) ||
289 (fUseMuxes && pObj->fMark0) )
290 {
291 Vec_PtrPushUnique( vSuper, pObj );
292 return;
293 }
294 // go through the branches
295 Cec3_CollectSuper_rec( Gia_ObjChild0(pObj), vSuper, 0, fUseMuxes );
296 Cec3_CollectSuper_rec( Gia_ObjChild1(pObj), vSuper, 0, fUseMuxes );
297}
298void Cec3_CollectSuper( Gia_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
299{
300 assert( !Gia_IsComplement(pObj) );
301 assert( !Gia_ObjIsCi(pObj) );
302 Vec_PtrClear( vSuper );
303 Cec3_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
304}
306{
307 assert( !Gia_IsComplement(pObj) );
308 assert( !Gia_ObjIsConst0(pObj) );
309 if ( Cec3_ObjSatId(p, pObj) >= 0 )
310 return;
311 assert( Cec3_ObjSatId(p, pObj) == -1 );
312 Cec3_ObjSetSatId( p, pObj, bmcg_sat_solver_addvar(pSat) );
313 if ( Gia_ObjIsAnd(pObj) )
314 Vec_PtrPush( vFrontier, pObj );
315}
317{
318 Gia_Obj_t * pNode, * pFanin;
319 Gia_Obj_t * pObj = Gia_ManObj(p->pNew, iObj);
320 int i, k, fUseMuxes = 1;
321 // quit if CNF is ready
322 if ( Cec3_ObjSatId(p->pNew,pObj) >= 0 )
323 return Cec3_ObjSatId(p->pNew,pObj);
324 assert( iObj > 0 );
325 if ( Gia_ObjIsCi(pObj) )
326 return Cec3_ObjSetSatId( p->pNew, pObj, bmcg_sat_solver_addvar(p->pSat) );
327 assert( Gia_ObjIsAnd(pObj) );
328 // start the frontier
329 Vec_PtrClear( p->vFrontier );
330 Cec3_ObjAddToFrontier( p->pNew, pObj, p->vFrontier, p->pSat );
331 // explore nodes in the frontier
332 Vec_PtrForEachEntry( Gia_Obj_t *, p->vFrontier, pNode, i )
333 {
334 // create the supergate
335 assert( Cec3_ObjSatId(p->pNew,pNode) >= 0 );
336 if ( fUseMuxes && pNode->fMark0 )
337 {
338 Vec_PtrClear( p->vFanins );
339 Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin0(pNode) ) );
340 Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin1(pNode) ) );
341 Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin0(pNode) ) );
342 Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin1(pNode) ) );
343 Vec_PtrForEachEntry( Gia_Obj_t *, p->vFanins, pFanin, k )
344 Cec3_ObjAddToFrontier( p->pNew, Gia_Regular(pFanin), p->vFrontier, p->pSat );
345 Cec3_AddClausesMux( p->pNew, pNode, p->pSat );
346 }
347 else
348 {
349 Cec3_CollectSuper( pNode, fUseMuxes, p->vFanins );
350 Vec_PtrForEachEntry( Gia_Obj_t *, p->vFanins, pFanin, k )
351 Cec3_ObjAddToFrontier( p->pNew, Gia_Regular(pFanin), p->vFrontier, p->pSat );
352 Cec3_AddClausesSuper( p->pNew, pNode, p->vFanins, p->pSat );
353 }
354 assert( Vec_PtrSize(p->vFanins) > 1 );
355 }
356 return Cec3_ObjSatId(p->pNew,pObj);
357}
358
359
360
372static inline word * Cec3_ObjSim( Gia_Man_t * p, int iObj )
373{
374 return Vec_WrdEntryP( p->vSims, p->nSimWords * iObj );
375}
376static inline void Cec3_ObjSimSetInputBit( Gia_Man_t * p, int iObj, int Bit )
377{
378 word * pSim = Cec3_ObjSim( p, iObj );
379 if ( Abc_InfoHasBit( (unsigned*)pSim, p->iPatsPi ) != Bit )
380 Abc_InfoXorBit( (unsigned*)pSim, p->iPatsPi );
381}
382static inline void Cec3_ObjSimRo( Gia_Man_t * p, int iObj )
383{
384 int w;
385 word * pSimRo = Cec3_ObjSim( p, iObj );
386 word * pSimRi = Cec3_ObjSim( p, Gia_ObjRoToRiId(p, iObj) );
387 for ( w = 0; w < p->nSimWords; w++ )
388 pSimRo[w] = pSimRi[w];
389}
390static inline void Cec3_ObjSimCo( Gia_Man_t * p, int iObj )
391{
392 int w;
393 Gia_Obj_t * pObj = Gia_ManObj( p, iObj );
394 word * pSimCo = Cec3_ObjSim( p, iObj );
395 word * pSimDri = Cec3_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) );
396 if ( Gia_ObjFaninC0(pObj) )
397 for ( w = 0; w < p->nSimWords; w++ )
398 pSimCo[w] = ~pSimDri[w];
399 else
400 for ( w = 0; w < p->nSimWords; w++ )
401 pSimCo[w] = pSimDri[w];
402}
403static inline void Cec3_ObjSimAnd( Gia_Man_t * p, int iObj )
404{
405 int w;
406 Gia_Obj_t * pObj = Gia_ManObj( p, iObj );
407 word * pSim = Cec3_ObjSim( p, iObj );
408 word * pSim0 = Cec3_ObjSim( p, Gia_ObjFaninId0(pObj, iObj) );
409 word * pSim1 = Cec3_ObjSim( p, Gia_ObjFaninId1(pObj, iObj) );
410 if ( Gia_ObjFaninC0(pObj) && Gia_ObjFaninC1(pObj) )
411 for ( w = 0; w < p->nSimWords; w++ )
412 pSim[w] = ~pSim0[w] & ~pSim1[w];
413 else if ( Gia_ObjFaninC0(pObj) && !Gia_ObjFaninC1(pObj) )
414 for ( w = 0; w < p->nSimWords; w++ )
415 pSim[w] = ~pSim0[w] & pSim1[w];
416 else if ( !Gia_ObjFaninC0(pObj) && Gia_ObjFaninC1(pObj) )
417 for ( w = 0; w < p->nSimWords; w++ )
418 pSim[w] = pSim0[w] & ~pSim1[w];
419 else
420 for ( w = 0; w < p->nSimWords; w++ )
421 pSim[w] = pSim0[w] & pSim1[w];
422}
423static inline int Cec3_ObjSimEqual( Gia_Man_t * p, int iObj0, int iObj1 )
424{
425 int w;
426 word * pSim0 = Cec3_ObjSim( p, iObj0 );
427 word * pSim1 = Cec3_ObjSim( p, iObj1 );
428 if ( (pSim0[0] & 1) == (pSim1[0] & 1) )
429 {
430 for ( w = 0; w < p->nSimWords; w++ )
431 if ( pSim0[w] != pSim1[w] )
432 return 0;
433 return 1;
434 }
435 else
436 {
437 for ( w = 0; w < p->nSimWords; w++ )
438 if ( pSim0[w] != ~pSim1[w] )
439 return 0;
440 return 1;
441 }
442}
443static inline void Cec3_ObjSimCi( Gia_Man_t * p, int iObj )
444{
445 int w;
446 word * pSim = Cec3_ObjSim( p, iObj );
447 for ( w = 0; w < p->nSimWords; w++ )
448 pSim[w] = Gia_ManRandomW( 0 );
449 pSim[0] <<= 1;
450}
452{
453 int i, Id;
454 Gia_ManForEachCiId( p, Id, i )
455 Cec3_ObjSimCi( p, Id );
456 p->iPatsPi = 0;
457}
458Abc_Cex_t * Cec3_ManDeriveCex( Gia_Man_t * p, int iOut, int iPat )
459{
460 Abc_Cex_t * pCex;
461 int i, Id;
462 pCex = Abc_CexAlloc( 0, Gia_ManCiNum(p), 1 );
463 pCex->iPo = iOut;
464 if ( iPat == -1 )
465 return pCex;
466 Gia_ManForEachCiId( p, Id, i )
467 if ( Abc_InfoHasBit((unsigned *)Cec3_ObjSim(p, Id), iPat) )
468 Abc_InfoSetBit( pCex->pData, i );
469 return pCex;
470}
472{
473 int i, Id;
474 // check outputs and generate CEX if they fail
475 Gia_ManForEachCoId( p, Id, i )
476 {
477 Cec3_ObjSimCo( p, Id );
478 if ( Cec3_ObjSimEqual(p, Id, 0) )
479 continue;
480 p->pCexSeq = Cec3_ManDeriveCex( p, i, Abc_TtFindFirstBit2(Cec3_ObjSim(p, Id), p->nSimWords) );
481 return 0;
482 }
483 return 1;
484}
486{
487 int w, i, Id;
488 assert( p->vSimsPi != NULL );
489 for ( w = 0; w < p->nSimWords; w++ )
490 Gia_ManForEachCiId( p, Id, i )
491 Vec_WrdPush( p->vSimsPi, Cec3_ObjSim(p, Id)[w] );
492}
493int Cec3_ManSimulate( Gia_Man_t * p, Vec_Int_t * vTriples, Cec3_Man_t * pMan )
494{
495 extern void Cec3_ManSimClassRefineOne( Gia_Man_t * p, int iRepr );
496 abctime clk = Abc_Clock();
497 Gia_Obj_t * pObj;
498 int i, iRepr, iObj, Entry, Count = 0;
499 //Cec3_ManSaveCis( p );
500 Gia_ManForEachAnd( p, pObj, i )
501 Cec3_ObjSimAnd( p, i );
502 pMan->timeSim += Abc_Clock() - clk;
503 if ( p->pReprs == NULL )
504 return 0;
505 if ( vTriples )
506 {
507 Vec_IntForEachEntryTriple( vTriples, iRepr, iObj, Entry, i )
508 {
509 word * pSim0 = Cec3_ObjSim( p, iRepr );
510 word * pSim1 = Cec3_ObjSim( p, iObj );
511 int iPat = Abc_Lit2Var(Entry);
512 int fPhase = Abc_LitIsCompl(Entry);
513 if ( (fPhase ^ Abc_InfoHasBit((unsigned *)pSim0, iPat)) == Abc_InfoHasBit((unsigned *)pSim1, iPat) )
514 {
515 //printf( "ERROR: Pattern %d did not disprove pair %d and %d.\n", iPat, iRepr, iObj );
516 Count++;
517 }
518 }
519 }
520 clk = Abc_Clock();
523 pMan->timeRefine += Abc_Clock() - clk;
524 return Count;
525}
527{
528 Vec_WrdFreeP( &p->vSims );
529 Vec_WrdFreeP( &p->vSimsPi );
530 p->vSims = Vec_WrdStart( Gia_ManObjNum(p) * nWords );
531 p->vSimsPi = Vec_WrdAlloc( Gia_ManCiNum(p) * nWords * 4 ); // storage for CI patterns
532 p->nSimWords = nWords;
533}
534
535
547int Cec3_ManSimHashKey( word * pSim, int nSims, int nTableSize )
548{
549 static int s_Primes[16] = {
550 1291, 1699, 1999, 2357, 2953, 3313, 3907, 4177,
551 4831, 5147, 5647, 6343, 6899, 7103, 7873, 8147 };
552 unsigned uHash = 0, * pSimU = (unsigned *)pSim;
553 int i, nSimsU = 2 * nSims;
554 if ( pSimU[0] & 1 )
555 for ( i = 0; i < nSimsU; i++ )
556 uHash ^= ~pSimU[i] * s_Primes[i & 0xf];
557 else
558 for ( i = 0; i < nSimsU; i++ )
559 uHash ^= pSimU[i] * s_Primes[i & 0xf];
560 return (int)(uHash % nTableSize);
561
562}
563
576{
577 int iObj, iPrev = iRepr, iPrev2, iRepr2;
578 Gia_ClassForEachObj1( p, iRepr, iRepr2 )
579 if ( Cec3_ObjSimEqual(p, iRepr, iRepr2) )
580 iPrev = iRepr2;
581 else
582 break;
583 if ( iRepr2 <= 0 ) // no refinement
584 return;
585 // relink remaining nodes of the class
586 // nodes that are equal to iRepr, remain in the class of iRepr
587 // nodes that are not equal to iRepr, move to the class of iRepr2
588 Gia_ObjSetRepr( p, iRepr2, GIA_VOID );
589 iPrev2 = iRepr2;
590 for ( iObj = Gia_ObjNext(p, iRepr2); iObj > 0; iObj = Gia_ObjNext(p, iObj) )
591 {
592 if ( Cec3_ObjSimEqual(p, iRepr, iObj) ) // remains with iRepr
593 {
594 Gia_ObjSetNext( p, iPrev, iObj );
595 iPrev = iObj;
596 }
597 else // moves to iRepr2
598 {
599 Gia_ObjSetRepr( p, iObj, iRepr2 );
600 Gia_ObjSetNext( p, iPrev2, iObj );
601 iPrev2 = iObj;
602 }
603 }
604 Gia_ObjSetNext( p, iPrev, -1 );
605 Gia_ObjSetNext( p, iPrev2, -1 );
606}
608{
609 abctime clk;
610 Gia_Obj_t * pObj;
611 int nWords = p->nSimWords;
612 int * pTable, nTableSize, i, Key;
613 // allocate representation
614 ABC_FREE( p->pReprs );
615 ABC_FREE( p->pNexts );
616 p->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
617 p->pNexts = ABC_FALLOC( int, Gia_ManObjNum(p) );
618 // hash each node by its simulation info
619 nTableSize = Abc_PrimeCudd( Gia_ManObjNum(p) );
620 pTable = ABC_FALLOC( int, nTableSize );
621 Gia_ManForEachObj( p, pObj, i )
622 {
623 p->pReprs[i].iRepr = GIA_VOID;
624 if ( Gia_ObjIsCo(pObj) )
625 continue;
626 Key = Cec3_ManSimHashKey( Cec3_ObjSim(p, i), nWords, nTableSize );
627 assert( Key >= 0 && Key < nTableSize );
628 if ( pTable[Key] == -1 )
629 pTable[Key] = i;
630 else
631 Gia_ObjSetRepr( p, i, pTable[Key] );
632 }
633 // create classes
634 for ( i = Gia_ManObjNum(p) - 1; i >= 0; i-- )
635 {
636 int iRepr = Gia_ObjRepr(p, i);
637 if ( iRepr == GIA_VOID )
638 continue;
639 Gia_ObjSetNext( p, i, Gia_ObjNext(p, iRepr) );
640 Gia_ObjSetNext( p, iRepr, i );
641 }
642 ABC_FREE( pTable );
643 clk = Abc_Clock();
646 pMan->timeRefine += Abc_Clock() - clk;
647}
648
649
662{
663 Cec3_Man_t * p;
664 Gia_Obj_t * pObj; int i;
665 //satoko_opts_t Pars;
666 //assert( Gia_ManRegNum(pAig) == 0 );
667 p = ABC_CALLOC( Cec3_Man_t, 1 );
668 memset( p, 0, sizeof(Cec3_Man_t) );
669 p->timeStart = Abc_Clock();
670 p->pPars = pPars;
671 p->pAig = pAig;
672 // create new manager
673 p->pNew = Gia_ManStart( Gia_ManObjNum(pAig) );
674 Gia_ManFillValue( pAig );
675 Gia_ManConst0(pAig)->Value = 0;
676 Gia_ManForEachCi( pAig, pObj, i )
677 pObj->Value = Gia_ManAppendCi( p->pNew );
678 Gia_ManHashAlloc( p->pNew );
679 Vec_IntFill( &p->pNew->vCopies2, Gia_ManObjNum(p->pNew), -1 );
680 // SAT solving
681 //memset( &Pars, 0, sizeof(satoko_opts_t) );
682 p->pSat = bmcg_sat_solver_start();
683 p->vFrontier = Vec_PtrAlloc( 1000 );
684 p->vFanins = Vec_PtrAlloc( 100 );
685 p->vNodesNew = Vec_IntAlloc( 100 );
686 p->vSatVars = Vec_IntAlloc( 100 );
687 p->vObjSatPairs = Vec_IntAlloc( 100 );
688 p->vCexTriples = Vec_IntAlloc( 100 );
689 //Pars.conf_limit = pPars->nConfLimit;
690 //satoko_configure(p->pSat, &Pars);
691 // remember pointer to the solver in the AIG manager
692 pAig->pData = p->pSat;
693 return p;
694}
696{
697 if ( p->pPars->fVerbose )
698 {
699 abctime timeTotal = Abc_Clock() - p->timeStart;
700 abctime timeSat = p->timeSatSat + p->timeSatUnsat + p->timeSatUndec;
701 abctime timeOther = timeTotal - timeSat - p->timeSim - p->timeRefine - p->timeExtra;
702// Abc_Print( 1, "%d\n", p->Num );
703 ABC_PRTP( "SAT solving", timeSat, timeTotal );
704 ABC_PRTP( " sat ", p->timeSatSat, timeTotal );
705 ABC_PRTP( " unsat ", p->timeSatUnsat, timeTotal );
706 ABC_PRTP( " fail ", p->timeSatUndec, timeTotal );
707 ABC_PRTP( "Simulation ", p->timeSim, timeTotal );
708 ABC_PRTP( "Refinement ", p->timeRefine, timeTotal );
709 ABC_PRTP( "Rollback ", p->timeExtra, timeTotal );
710 ABC_PRTP( "Other ", timeOther, timeTotal );
711 ABC_PRTP( "TOTAL ", timeTotal, timeTotal );
712 fflush( stdout );
713 }
714
715 Vec_WrdFreeP( &p->pAig->vSims );
716 //Vec_WrdFreeP( &p->pAig->vSimsPi );
717 Gia_ManCleanMark01( p->pAig );
718 bmcg_sat_solver_stop( p->pSat );
719 Gia_ManStopP( &p->pNew );
720 Vec_PtrFreeP( &p->vFrontier );
721 Vec_PtrFreeP( &p->vFanins );
722 Vec_IntFreeP( &p->vNodesNew );
723 Vec_IntFreeP( &p->vSatVars );
724 Vec_IntFreeP( &p->vObjSatPairs );
725 Vec_IntFreeP( &p->vCexTriples );
726 ABC_FREE( p );
727}
728
729
742{
743 int Value0, Value1;
744 Gia_Obj_t * pObj = Gia_ManObj( p, iObj );
745 if ( iObj == 0 ) return 0;
746 if ( Gia_ObjIsTravIdCurrentId(p, iObj) )
747 return pObj->fMark1;
748 Gia_ObjSetTravIdCurrentId(p, iObj);
749 if ( Gia_ObjIsCi(pObj) )
750// return pObj->fMark1 = satoko_var_polarity(pSat, Cec3_ObjSatId(p, pObj)) == SATOKO_LIT_TRUE;
751 return pObj->fMark1 = bmcg_sat_solver_read_cex_varvalue(pSat, Cec3_ObjSatId(p, pObj));
752 assert( Gia_ObjIsAnd(pObj) );
753 Value0 = Cec3_ManVerify_rec( p, Gia_ObjFaninId0(pObj, iObj), pSat ) ^ Gia_ObjFaninC0(pObj);
754 Value1 = Cec3_ManVerify_rec( p, Gia_ObjFaninId1(pObj, iObj), pSat ) ^ Gia_ObjFaninC1(pObj);
755 return pObj->fMark1 = Value0 & Value1;
756}
757void Cec3_ManVerify( Gia_Man_t * p, int iObj0, int iObj1, int fPhase, bmcg_sat_solver * pSat )
758{
759// int val0 = satoko_var_polarity(pSat, Cec3_ObjSatId(p, Gia_ManObj(p, iObj0))) == SATOKO_LIT_TRUE;
760// int val1 = satoko_var_polarity(pSat, Cec3_ObjSatId(p, Gia_ManObj(p, iObj1))) == SATOKO_LIT_TRUE;
761 int Value0, Value1;
763 Value0 = Cec3_ManVerify_rec( p, iObj0, pSat );
764 Value1 = Cec3_ManVerify_rec( p, iObj1, pSat );
765 if ( (Value0 ^ Value1) == fPhase )
766 printf( "CEX verification FAILED for obj %d and obj %d.\n", iObj0, iObj1 );
767// else
768// printf( "CEX verification succeeded for obj %d and obj %d.\n", iObj0, iObj1 );;
769}
770
783{
784 Gia_Obj_t * pObj;
785 if ( Gia_ObjIsTravIdCurrentId(p->pNew, iObj) )
786 return;
787 Gia_ObjSetTravIdCurrentId(p->pNew, iObj);
788 pObj = Gia_ManObj( p->pNew, iObj );
789 if ( Cec3_ObjSatId(p->pNew, pObj) >= 0 )
790 {
791 Vec_IntPush( p->vNodesNew, iObj );
792 Vec_IntPush( p->vSatVars, Cec3_ObjSatId(p->pNew, pObj) );
793 }
794 if ( !iObj )
795 return;
796 if ( Gia_ObjIsAnd(pObj) )
797 {
798 Cec3_ManCollect_rec( p, Gia_ObjFaninId0(pObj, iObj) );
799 Cec3_ManCollect_rec( p, Gia_ObjFaninId1(pObj, iObj) );
800 }
801 else
802 {
803 assert( Cec3_ObjSatId(p->pNew, pObj) >= 0 );
804 Vec_IntPushTwo( p->vObjSatPairs, Gia_ManCiIdToId(p->pAig, Gia_ObjCioId(pObj)), Cec3_ObjSatId(p->pNew, pObj) ); // SAT var
805 }
806}
807int Cec3_ManSolveTwo( Cec3_Man_t * p, int iObj0, int iObj1, int fPhase )
808{
809 Gia_Obj_t * pObj;
810 int status, i, iVar0, iVar1, Lits[2];
811 if (iObj1 < iObj0)
812 iObj1 ^= iObj0, iObj0 ^= iObj1, iObj1 ^= iObj0;
813 assert( iObj0 < iObj1 );
814 assert( p->pPars->fUseCones || bmcg_sat_solver_varnum(p->pSat) == 0 );
815 if ( !iObj0 && Cec3_ObjSatId(p->pNew, Gia_ManConst0(p->pNew)) == -1 )
816 Cec3_ObjSetSatId( p->pNew, Gia_ManConst0(p->pNew), bmcg_sat_solver_addvar(p->pSat) );
817 iVar0 = Cec3_ObjGetCnfVar( p, iObj0 );
818 iVar1 = Cec3_ObjGetCnfVar( p, iObj1 );
819 // collect inputs and internal nodes
820 Vec_IntClear( p->vNodesNew );
821 Vec_IntClear( p->vSatVars );
822 Vec_IntClear( p->vObjSatPairs );
823 Gia_ManIncrementTravId( p->pNew );
824 Cec3_ManCollect_rec( p, iObj0 );
825 Cec3_ManCollect_rec( p, iObj1 );
826//printf( "%d ", Vec_IntSize(p->vNodesNew) );
827 // solve direct
828 if ( p->pPars->fUseCones ) satoko_mark_cone( p->pSat, Vec_IntArray(p->vSatVars), Vec_IntSize(p->vSatVars) );
829// satoko_assump_push( p->pSat, Abc_Var2Lit(iVar0, 1) );
830// satoko_assump_push( p->pSat, Abc_Var2Lit(iVar1, fPhase) );
831// status = satoko_solve( p->pSat );
832// satoko_assump_pop( p->pSat );
833// satoko_assump_pop( p->pSat );
834 Lits[0] = Abc_Var2Lit(iVar0, 1);
835 Lits[1] = Abc_Var2Lit(iVar1, fPhase);
836 bmcg_sat_solver_set_conflict_budget( p->pSat, p->pPars->nConfLimit );
837 status = bmcg_sat_solver_solve( p->pSat, Lits, 2 );
838 if ( status == GLUCOSE_UNSAT && iObj0 > 0 )
839 {
840 // solve reverse
841// satoko_assump_push( p->pSat, Abc_Var2Lit(iVar0, 0) );
842// satoko_assump_push( p->pSat, Abc_Var2Lit(iVar1, !fPhase) );
843// status = satoko_solve( p->pSat );
844// satoko_assump_pop( p->pSat );
845// satoko_assump_pop( p->pSat );
846 Lits[0] = Abc_Var2Lit(iVar0, 0);
847 Lits[1] = Abc_Var2Lit(iVar1, !fPhase);
848 bmcg_sat_solver_set_conflict_budget( p->pSat, p->pPars->nConfLimit );
849 status = bmcg_sat_solver_solve( p->pSat, Lits, 2 );
850 }
851 if ( p->pPars->fUseCones ) satoko_unmark_cone( p->pSat, Vec_IntArray(p->vSatVars), Vec_IntSize(p->vSatVars) );
852 //if ( status == SATOKO_SAT )
853 // Cec3_ManVerify( p->pNew, iObj0, iObj1, fPhase, p->pSat );
854 if ( p->pPars->fUseCones )
855 return status;
856 Gia_ManForEachObjVec( p->vNodesNew, p->pNew, pObj, i )
857 Cec3_ObjCleanSatId( p->pNew, pObj );
858 return status;
859}
860
862{
863 abctime clk = Abc_Clock();
864 int i, IdAig, IdSat, status, RetValue = 1;
865 Gia_Obj_t * pObj = Gia_ManObj( p->pAig, iObj );
866 Gia_Obj_t * pRepr = Gia_ObjReprObj( p->pAig, iObj );
867 int fCompl = Abc_LitIsCompl(pObj->Value) ^ Abc_LitIsCompl(pRepr->Value) ^ pObj->fPhase ^ pRepr->fPhase;
868 status = Cec3_ManSolveTwo( p, Abc_Lit2Var(pRepr->Value), Abc_Lit2Var(pObj->Value), fCompl );
869 if ( status == GLUCOSE_SAT )
870 {
871 p->nSatSat++;
872 p->nPatterns++;
873 p->pAig->iPatsPi = (p->pAig->iPatsPi == 64 * p->pAig->nSimWords - 1) ? 1 : p->pAig->iPatsPi + 1;
874 assert( p->pAig->iPatsPi > 0 && p->pAig->iPatsPi < 64 * p->pAig->nSimWords );
875 Vec_IntForEachEntryDouble( p->vObjSatPairs, IdAig, IdSat, i )
876// Cec3_ObjSimSetInputBit( p->pAig, IdAig, satoko_var_polarity(p->pSat, IdSat) == SATOKO_LIT_TRUE );
877 Cec3_ObjSimSetInputBit( p->pAig, IdAig, bmcg_sat_solver_read_cex_varvalue(p->pSat, IdSat) );
878 p->timeSatSat += Abc_Clock() - clk;
879 RetValue = 0;
880 }
881 else if ( status == GLUCOSE_UNSAT )
882 {
883 p->nSatUnsat++;
884 pObj->Value = Abc_LitNotCond( pRepr->Value, fCompl );
885 Gia_ObjSetProved( p->pAig, iObj );
886 p->timeSatUnsat += Abc_Clock() - clk;
887 RetValue = 1;
888 }
889 else
890 {
891 p->nSatUndec++;
892 assert( status == GLUCOSE_UNDEC );
893 Gia_ObjSetFailed( p->pAig, iObj );
894 p->timeSatUndec += Abc_Clock() - clk;
895 RetValue = 2;
896 }
897 if ( p->pPars->fUseCones )
898 return RetValue;
899 clk = Abc_Clock();
900 bmcg_sat_solver_reset( p->pSat );
901 p->timeExtra += Abc_Clock() - clk;
902// satoko_stats(p->pSat)->n_conflicts = 0;
903 return RetValue;
904}
906{
907 if ( !pPars->fVerbose )
908 return;
909 printf( "S =%5d ", pMan ? pMan->nSatSat : 0 );
910 printf( "U =%5d ", pMan ? pMan->nSatUnsat : 0 );
911 printf( "F =%5d ", pMan ? pMan->nSatUndec : 0 );
912 Gia_ManEquivPrintClasses( p, pPars->fVeryVerbose, 0 );
913}
915{
916 Cec3_Man_t * pMan = Cec3_ManCreate( p, pPars );
917 Gia_Obj_t * pObj, * pRepr, * pObjNew;
918 int i, Iter, fDisproved = 1;
919
920 // check if any output trivially fails under all-0 pattern
921 Gia_ManRandomW( 1 );
923 if ( pPars->fIsMiter )
924 {
925 Gia_ManForEachCo( p, pObj, i )
926 if ( pObj->fPhase )
927 {
928 p->pCexSeq = Cec3_ManDeriveCex( p, i, -1 );
929 goto finalize;
930 }
931 }
932
933 // simulate one round and create classes
934 Cec3_ManSimAlloc( p, pPars->nSimWords );
936 Cec3_ManSimulate( p, NULL, pMan );
937 if ( pPars->fIsMiter && !Cec3_ManSimulateCos(p) ) // cex detected
938 goto finalize;
939 Cec3_ManCreateClasses( p, pMan );
940 Cec3_ManPrintStats( p, pPars, pMan );
941
942 // perform additinal simulation
943 for ( i = 0; i < pPars->nSimRounds; i++ )
944 {
946 Cec3_ManSimulate( p, NULL, pMan );
947 if ( pPars->fIsMiter && !Cec3_ManSimulateCos(p) ) // cex detected
948 goto finalize;
949 Cec3_ManPrintStats( p, pPars, pMan );
950 }
951 // perform sweeping
952 //pMan = Cec3_ManCreate( p, pPars );
953 for ( Iter = 0; fDisproved && Iter < pPars->nItersMax; Iter++ )
954 {
955 fDisproved = 0;
956 pMan->nPatterns = 0;
958 Vec_IntClear( pMan->vCexTriples );
959 Gia_ManForEachAnd( p, pObj, i )
960 {
961 if ( ~pObj->Value || Gia_ObjFailed(p, i) ) // skip swept nodes and failed nodes
962 continue;
963 if ( !~Gia_ObjFanin0(pObj)->Value || !~Gia_ObjFanin1(pObj)->Value ) // skip fanouts of non-swept nodes
964 continue;
965 assert( !Gia_ObjProved(p, i) && !Gia_ObjFailed(p, i) );
966 // duplicate the node
967 pObj->Value = Gia_ManHashAnd( pMan->pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
968 if ( Vec_IntSize(&pMan->pNew->vCopies2) == Abc_Lit2Var(pObj->Value) )
969 {
970 pObjNew = Gia_ManObj( pMan->pNew, Abc_Lit2Var(pObj->Value) );
971 pObjNew->fMark0 = Gia_ObjIsMuxType( pObjNew );
972 Gia_ObjSetPhase( pMan->pNew, pObjNew );
973 Vec_IntPush( &pMan->pNew->vCopies2, -1 );
974 }
975 assert( Vec_IntSize(&pMan->pNew->vCopies2) == Gia_ManObjNum(pMan->pNew) );
976 pRepr = Gia_ObjReprObj( p, i );
977 if ( pRepr == NULL || !~pRepr->Value )
978 continue;
979 if ( Abc_Lit2Var(pObj->Value) == Abc_Lit2Var(pRepr->Value) )
980 {
981 assert( (pObj->Value ^ pRepr->Value) == (pObj->fPhase ^ pRepr->fPhase) );
982 Gia_ObjSetProved( p, i );
983 continue;
984 }
985 if ( Cec3_ManSweepNode(pMan, i) )
986 {
987 if ( Gia_ObjProved(p, i) )
988 pObj->Value = Abc_LitNotCond( pRepr->Value, pObj->fPhase ^ pRepr->fPhase );
989 continue;
990 }
991 pObj->Value = ~0;
992 Vec_IntPushThree( pMan->vCexTriples, Gia_ObjId(p, pRepr), i, Abc_Var2Lit(p->iPatsPi, pObj->fPhase ^ pRepr->fPhase) );
993 fDisproved = 1;
994 }
995 if ( fDisproved )
996 {
997 int Fails = Cec3_ManSimulate( p, pMan->vCexTriples, pMan );
998 if ( Fails && pPars->fVerbose )
999 printf( "Failed to resimulate %d times with pattern = %d (total = %d).\n", Fails, pMan->nPatterns, pPars->nSimWords * 64 );
1000 if ( pPars->fIsMiter && !Cec3_ManSimulateCos(p) ) // cex detected
1001 break;
1002 }
1003 Cec3_ManPrintStats( p, pPars, pMan );
1004 }
1005 // finish the AIG, if it is not finished
1006 if ( ppNew )
1007 {
1008 Gia_ManForEachAnd( p, pObj, i )
1009 if ( !~pObj->Value )
1010 pObj->Value = Gia_ManHashAnd( pMan->pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
1011 Gia_ManForEachCo( p, pObj, i )
1012 pObj->Value = Gia_ManAppendCo( pMan->pNew, Gia_ObjFanin0Copy(pObj) );
1013 *ppNew = Gia_ManCleanup( pMan->pNew );
1014 (*ppNew)->pName = Abc_UtilStrsav( p->pName );
1015 (*ppNew)->pSpec = Abc_UtilStrsav( p->pSpec );
1016 }
1017finalize:
1018 Cec3_ManDestroy( pMan );
1019 //Gia_ManEquivPrintClasses( p, 1, 0 );
1020 return p->pCexSeq ? 0 : 1;
1021}
1023{
1024 Gia_Man_t * pNew = NULL;
1025 //abctime clk = Abc_Clock();
1026 Cec3_Par_t Pars, * pPars = &Pars;
1027 Cec3_SetDefaultParams( pPars );
1028 // set resource limits
1029// pPars->nSimWords = pPars0->nWords; // simulation words
1030// pPars->nSimRounds = pPars0->nRounds; // simulation rounds
1031// pPars->nItersMax = pPars0->nItersMax; // max number of iterations
1032 pPars->nConfLimit = pPars0->nBTLimit; // conflict limit at a node
1033 pPars->fUseCones = pPars0->fUseCones;
1034 pPars->fVerbose = pPars0->fVerbose;
1035// Gia_ManComputeGiaEquivs( p, 100000, 0 );
1036// Gia_ManEquivPrintClasses( p, 1, 0 );
1037 Cec3_ManPerformSweeping( p, pPars, &pNew );
1038 //Abc_PrintTime( 1, "SAT sweeping time", Abc_Clock() - clk );
1039 return pNew;
1040}
1041
1045
1046
1048
void bmcg_sat_solver_reset(bmcg_sat_solver *s)
int bmcg_sat_solver_varnum(bmcg_sat_solver *s)
int bmcg_sat_solver_addvar(bmcg_sat_solver *s)
bmcg_sat_solver * bmcg_sat_solver_start()
MACRO DEFINITIONS ///.
int bmcg_sat_solver_solve(bmcg_sat_solver *s, int *plits, int nlits)
int bmcg_sat_solver_addclause(bmcg_sat_solver *s, int *plits, int nlits)
void bmcg_sat_solver_set_conflict_budget(bmcg_sat_solver *s, int Limit)
int bmcg_sat_solver_read_cex_varvalue(bmcg_sat_solver *s, int ivar)
void bmcg_sat_solver_stop(bmcg_sat_solver *s)
#define GLUCOSE_UNDEC
Definition AbcGlucose.h:36
#define GLUCOSE_UNSAT
INCLUDES ///.
Definition AbcGlucose.h:34
void bmcg_sat_solver
Definition AbcGlucose.h:63
#define GLUCOSE_SAT
Definition AbcGlucose.h:35
int nWords
Definition abcNpn.c:127
ABC_INT64_T abctime
Definition abc_global.h:332
#define ABC_FALLOC(type, num)
Definition abc_global.h:266
#define ABC_ALLOC(type, num)
Definition abc_global.h:264
#define ABC_PRTP(a, t, T)
Definition abc_global.h:258
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
#define ABC_FREE(obj)
Definition abc_global.h:267
#define ABC_NAMESPACE_IMPL_START
#define ABC_NAMESPACE_IMPL_END
abctime timeSat
Definition abcDar.c:3942
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
Definition bblif.c:37
void Cec3_AddClausesSuper(Gia_Man_t *p, Gia_Obj_t *pNode, Vec_Ptr_t *vSuper, bmcg_sat_solver *pSat)
Definition cecSatG.c:230
struct Cec3_Man_t_ Cec3_Man_t
Definition cecSatG.c:47
void Cec3_ManSimulateCis(Gia_Man_t *p)
Definition cecSatG.c:451
int Cec3_ManSimHashKey(word *pSim, int nSims, int nTableSize)
Definition cecSatG.c:547
void Cec3_CollectSuper(Gia_Obj_t *pObj, int fUseMuxes, Vec_Ptr_t *vSuper)
Definition cecSatG.c:298
void Cec3_ManDestroy(Cec3_Man_t *p)
Definition cecSatG.c:695
int Cec3_ManSweepNode(Cec3_Man_t *p, int iObj)
Definition cecSatG.c:861
void Cec3_ManCreateClasses(Gia_Man_t *p, Cec3_Man_t *pMan)
Definition cecSatG.c:607
int Cec3_ManSimulate(Gia_Man_t *p, Vec_Int_t *vTriples, Cec3_Man_t *pMan)
Definition cecSatG.c:493
int Cec3_ManVerify_rec(Gia_Man_t *p, int iObj, bmcg_sat_solver *pSat)
Definition cecSatG.c:741
void Cec3_ObjAddToFrontier(Gia_Man_t *p, Gia_Obj_t *pObj, Vec_Ptr_t *vFrontier, bmcg_sat_solver *pSat)
Definition cecSatG.c:305
int Cec3_ManSimulateCos(Gia_Man_t *p)
Definition cecSatG.c:471
void Cec3_ManSimAlloc(Gia_Man_t *p, int nWords)
Definition cecSatG.c:526
int Cec3_ObjGetCnfVar(Cec3_Man_t *p, int iObj)
Definition cecSatG.c:316
void Cec3_ManSimClassRefineOne(Gia_Man_t *p, int iRepr)
Definition cecSatG.c:575
void Cec3_SetDefaultParams(Cec3_Par_t *p)
FUNCTION DEFINITIONS ///.
Definition cecSatG.c:98
void Cec3_ManCollect_rec(Cec3_Man_t *p, int iObj)
Definition cecSatG.c:782
Cec3_Man_t * Cec3_ManCreate(Gia_Man_t *pAig, Cec3_Par_t *pPars)
Definition cecSatG.c:661
void Cec3_CollectSuper_rec(Gia_Obj_t *pObj, Vec_Ptr_t *vSuper, int fFirst, int fUseMuxes)
Definition cecSatG.c:284
void Cec3_ManPrintStats(Gia_Man_t *p, Cec3_Par_t *pPars, Cec3_Man_t *pMan)
Definition cecSatG.c:905
void Cec3_AddClausesMux(Gia_Man_t *p, Gia_Obj_t *pNode, bmcg_sat_solver *pSat)
Definition cecSatG.c:122
int Cec3_ManPerformSweeping(Gia_Man_t *p, Cec3_Par_t *pPars, Gia_Man_t **ppNew)
Definition cecSatG.c:914
typedefABC_NAMESPACE_IMPL_START struct Cec3_Par_t_ Cec3_Par_t
DECLARATIONS ///.
Definition cecSatG.c:33
Gia_Man_t * Cec3_ManSimulateTest(Gia_Man_t *p, Cec_ParFra_t *pPars0)
Definition cecSatG.c:1022
void Cec3_ManVerify(Gia_Man_t *p, int iObj0, int iObj1, int fPhase, bmcg_sat_solver *pSat)
Definition cecSatG.c:757
int Cec3_ManSolveTwo(Cec3_Man_t *p, int iObj0, int iObj1, int fPhase)
Definition cecSatG.c:807
Abc_Cex_t * Cec3_ManDeriveCex(Gia_Man_t *p, int iOut, int iPat)
Definition cecSatG.c:458
void Cec3_ManSaveCis(Gia_Man_t *p)
Definition cecSatG.c:485
struct Cec_ParFra_t_ Cec_ParFra_t
Definition cec.h:96
Cube * p
Definition exorList.c:222
struct Gia_Rpr_t_ Gia_Rpr_t
Definition gia.h:57
void Gia_ObjSetPhase(Gia_Man_t *p, Gia_Obj_t *pObj)
Definition giaUtil.c:387
Gia_Obj_t * Gia_ObjRecognizeMux(Gia_Obj_t *pNode, Gia_Obj_t **ppNodeT, Gia_Obj_t **ppNodeE)
Definition giaUtil.c:1056
#define Gia_ManForEachAnd(p, pObj, i)
Definition gia.h:1214
#define Gia_ManForEachCoId(p, Id, i)
Definition gia.h:1240
word Gia_ManRandomW(int fReset)
Definition giaUtil.c:67
void Gia_ManStopP(Gia_Man_t **p)
Definition giaMan.c:224
void Gia_ManHashAlloc(Gia_Man_t *p)
Definition giaHash.c:105
#define Gia_ClassForEachObj1(p, i, iObj)
Definition gia.h:1109
Gia_Man_t * Gia_ManStart(int nObjsMax)
FUNCTION DEFINITIONS ///.
Definition giaMan.c:57
struct Gia_Obj_t_ Gia_Obj_t
Definition gia.h:76
void Gia_ManEquivPrintClasses(Gia_Man_t *p, int fVerbose, float Mem)
Definition giaEquiv.c:501
int Gia_ObjIsMuxType(Gia_Obj_t *pNode)
Definition giaUtil.c:982
void Gia_ManFillValue(Gia_Man_t *p)
Definition giaUtil.c:369
struct Gia_Man_t_ Gia_Man_t
Definition gia.h:96
#define Gia_ManForEachObjVec(vVec, p, pObj, i)
Definition gia.h:1194
Gia_Man_t * Gia_ManCleanup(Gia_Man_t *p)
Definition giaScl.c:84
int Gia_ManHashAnd(Gia_Man_t *p, int iLit0, int iLit1)
Definition giaHash.c:576
void Gia_ManIncrementTravId(Gia_Man_t *p)
Definition giaUtil.c:190
#define Gia_ManForEachObj(p, pObj, i)
MACRO DEFINITIONS ///.
Definition gia.h:1190
#define Gia_ManForEachCo(p, pObj, i)
Definition gia.h:1236
#define Gia_ManForEachCi(p, pObj, i)
Definition gia.h:1228
void Gia_ManSetPhase(Gia_Man_t *p)
Definition giaUtil.c:420
#define GIA_VOID
Definition gia.h:46
void Gia_ManCleanMark01(Gia_Man_t *p)
Definition giaUtil.c:218
#define Gia_ManForEachClass0(p, i)
Definition gia.h:1103
#define Gia_ManForEachCiId(p, Id, i)
Definition gia.h:1230
unsigned __int64 word
DECLARATIONS ///.
Definition kitPerm.c:36
abctime timeOther
Definition llb3Image.c:82
abctime timeSatSat
Definition cecSatG.c:67
bmcg_sat_solver * pSat
Definition cecSatG.c:54
abctime timeRefine
Definition cecSatG.c:71
abctime timeSatUnsat
Definition cecSatG.c:68
Vec_Int_t * vCexTriples
Definition cecSatG.c:61
Cec3_Par_t * pPars
Definition cecSatG.c:50
int nSatSat
Definition cecSatG.c:64
Vec_Int_t * vNodesNew
Definition cecSatG.c:58
int nSatUndec
Definition cecSatG.c:66
Gia_Man_t * pNew
Definition cecSatG.c:52
Vec_Ptr_t * vFanins
Definition cecSatG.c:56
Vec_Ptr_t * vFrontier
Definition cecSatG.c:55
int nSatUnsat
Definition cecSatG.c:65
Vec_Int_t * vSatVars
Definition cecSatG.c:59
Vec_Int_t * vObjSatPairs
Definition cecSatG.c:60
Vec_Wrd_t * vSims
Definition cecSatG.c:57
abctime timeExtra
Definition cecSatG.c:72
Gia_Man_t * pAig
Definition cecSatG.c:51
abctime timeSatUndec
Definition cecSatG.c:69
abctime timeStart
Definition cecSatG.c:73
int nPatterns
Definition cecSatG.c:63
abctime timeSim
Definition cecSatG.c:70
int nSimWords
Definition cecSatG.c:36
int fVerbose
Definition cecSatG.c:43
int fIsMiter
Definition cecSatG.c:40
int nConfLimit
Definition cecSatG.c:39
int nItersMax
Definition cecSatG.c:38
int fVeryVerbose
Definition cecSatG.c:42
int nSimRounds
Definition cecSatG.c:37
int fUseCones
Definition cecSatG.c:41
int nBTLimit
Definition cec.h:103
int fUseCones
Definition cec.h:118
int fVerbose
Definition cec.h:121
Vec_Int_t vCopies2
Definition gia.h:153
void * pData
Definition gia.h:198
unsigned fMark1
Definition gia.h:86
unsigned Value
Definition gia.h:89
unsigned fPhase
Definition gia.h:87
unsigned fMark0
Definition gia.h:81
ABC_NAMESPACE_IMPL_START Abc_Cex_t * Abc_CexAlloc(int nRegs, int nRealPis, int nFrames)
DECLARATIONS ///.
Definition utilCex.c:51
typedefABC_NAMESPACE_HEADER_START struct Abc_Cex_t_ Abc_Cex_t
INCLUDES ///.
Definition utilCex.h:39
#define assert(ex)
Definition util_old.h:213
char * memset()
#define Vec_IntForEachEntryDouble(vVec, Entry1, Entry2, i)
Definition vecInt.h:72
#define Vec_IntForEachEntryTriple(vVec, Entry1, Entry2, Entry3, i)
Definition vecInt.h:76
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42
#define Vec_PtrForEachEntry(Type, vVec, pEntry, i)
MACRO DEFINITIONS ///.
Definition vecPtr.h:55
typedefABC_NAMESPACE_HEADER_START struct Vec_Wrd_t_ Vec_Wrd_t
INCLUDES ///.
Definition vecWrd.h:42