ABC: A System for Sequential Synthesis and Verification
 
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fsimTsim.c File Reference
#include "fsimInt.h"
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Macros

#define FSIM_ZER   1
 DECLARATIONS ///.
 
#define FSIM_ONE   2
 
#define FSIM_UND   3
 

Functions

int Fsim_ManTerStateHash (unsigned *pState, int nWords, int nTableSize)
 
int Fsim_ManTerStateLookup (unsigned *pState, int nWords, unsigned **pBins, int nBins)
 
void Fsim_ManTerStateInsert (unsigned *pState, int nWords, unsigned **pBins, int nBins)
 
unsigned * Fsim_ManTerStateCreate (unsigned *pInfo, int nPis, int nCis, int nWords)
 
void Fsim_ManTerStatePrint (unsigned *pState, int nRegs)
 
Vec_Ptr_tFsim_ManTerSimulate (Aig_Man_t *pAig, int fVerbose)
 

Macro Definition Documentation

◆ FSIM_ONE

#define FSIM_ONE   2

Definition at line 31 of file fsimTsim.c.

◆ FSIM_UND

#define FSIM_UND   3

Definition at line 32 of file fsimTsim.c.

◆ FSIM_ZER

#define FSIM_ZER   1

DECLARATIONS ///.

CFile****************************************************************

FileName [fsimTsim.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Fast sequential AIG simulator.]

Synopsis [Varius utilities.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - June 20, 2005.]

Revision [

Id
fsimTsim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp

]

Definition at line 30 of file fsimTsim.c.

Function Documentation

◆ Fsim_ManTerSimulate()

Vec_Ptr_t * Fsim_ManTerSimulate ( Aig_Man_t * pAig,
int fVerbose )

Function*************************************************************

Synopsis []

Description []

SideEffects []

SeeAlso []

Definition at line 339 of file fsimTsim.c.

340{
341 Fsim_Man_t * p;
342 Vec_Ptr_t * vStates;
343 unsigned ** pBins, * pState;
344 int i, nWords, nBins;
345 clock_t clk, clkTotal = clock();
346 assert( Aig_ManRegNum(pAig) > 0 );
347 // create manager
348 clk = clock();
349 p = Fsim_ManCreate( pAig );
350 if ( fVerbose )
351 {
352 printf( "Obj = %8d (%8d). Cut = %6d. Front = %6d. FrtMem = %7.2f MB. ",
353 p->nObjs, p->nCis + p->nNodes, p->nCrossCutMax, p->nFront,
354 4.0*Aig_BitWordNum(2 * p->nFront)/(1<<20) );
355 ABC_PRT( "Time", clock() - clk );
356 }
357 // create simulation frontier
358 clk = clock();
359 Fsim_ManFront( p, 0 );
360 if ( fVerbose )
361 {
362 printf( "Max ID = %8d. Log max ID = %2d. AigMem = %7.2f MB (%5.2f byte/obj). ",
363 p->iNumber, Aig_Base2Log(p->iNumber),
364 1.0*(p->pDataCur-p->pDataAig)/(1<<20),
365 1.0*(p->pDataCur-p->pDataAig)/p->nObjs );
366 ABC_PRT( "Time", clock() - clk );
367 }
368 // allocate storage for terminary states
369 nWords = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
370 vStates = Vec_PtrAlloc( 1000 );
371 nBins = Abc_PrimeCudd( 500 );
372 pBins = ABC_ALLOC( unsigned *, nBins );
373 memset( pBins, 0, sizeof(unsigned *) * nBins );
374 // perform simulation
375 assert( p->pDataSim == NULL );
376 p->pDataSim = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nFront) * sizeof(unsigned) );
377 p->pDataSimCis = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nCis) * sizeof(unsigned) );
378 p->pDataSimCos = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nCos) * sizeof(unsigned) );
379 Fsim_ManTerSimInfoInit( p );
380 // hash the first state
381 pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords );
382 Vec_PtrPush( vStates, pState );
383 Fsim_ManTerStateInsert( pState, nWords, pBins, nBins );
384 // perform simuluation till convergence
385 for ( i = 0; ; i++ )
386 {
387 Fsim_ManTerSimulateRound( p );
388 Fsim_ManTerSimInfoTransfer( p );
389 // hash the first state
390 pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords );
391 Vec_PtrPush( vStates, pState );
392 if ( Fsim_ManTerStateLookup(pState, nWords, pBins, nBins) )
393 break;
394 Fsim_ManTerStateInsert( pState, nWords, pBins, nBins );
395 }
396 if ( fVerbose )
397 {
398 printf( "Maxcut = %8d. AigMem = %7.2f MB. SimMem = %7.2f MB. ",
399 p->nCrossCutMax,
400 p->pDataAig2? 12.0*p->nObjs/(1<<20) : 1.0*(p->pDataCur-p->pDataAig)/(1<<20),
401 4.0*(Aig_BitWordNum(2 * p->nFront)+Aig_BitWordNum(2 * p->nCis)+Aig_BitWordNum(2 * p->nCos))/(1<<20) );
402 ABC_PRT( "Sim time", clock() - clkTotal );
403 }
404 ABC_FREE( pBins );
405 Fsim_ManDelete( p );
406 return vStates;
407
408}
int nWords
Definition abcNpn.c:127
#define ABC_PRT(a, t)
Definition abc_global.h:255
#define ABC_ALLOC(type, num)
Definition abc_global.h:264
#define ABC_FREE(obj)
Definition abc_global.h:267
Cube * p
Definition exorList.c:222
void Fsim_ManFront(Fsim_Man_t *p, int fCompressAig)
FUNCTION DECLARATIONS ///.
Definition fsimFront.c:245
void Fsim_ManDelete(Fsim_Man_t *p)
Definition fsimMan.c:169
Fsim_Man_t * Fsim_ManCreate(Aig_Man_t *pAig)
Definition fsimMan.c:102
void Fsim_ManTerStateInsert(unsigned *pState, int nWords, unsigned **pBins, int nBins)
Definition fsimTsim.c:236
unsigned * Fsim_ManTerStateCreate(unsigned *pInfo, int nPis, int nCis, int nWords)
Definition fsimTsim.c:255
int Fsim_ManTerStateLookup(unsigned *pState, int nWords, unsigned **pBins, int nBins)
Definition fsimTsim.c:214
typedefABC_NAMESPACE_HEADER_START struct Fsim_Man_t_ Fsim_Man_t
INCLUDES ///.
Definition fsim.h:42
#define assert(ex)
Definition util_old.h:213
char * memset()
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42
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◆ Fsim_ManTerStateCreate()

unsigned * Fsim_ManTerStateCreate ( unsigned * pInfo,
int nPis,
int nCis,
int nWords )

Function*************************************************************

Synopsis [Inserts value into the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 255 of file fsimTsim.c.

256{
257 unsigned * pRes;
258 int i;
259 pRes = (unsigned *)ABC_CALLOC( char, sizeof(unsigned) * nWords + sizeof(unsigned *) );
260 for ( i = nPis; i < nCis; i++ )
261 Fsim_ManTerSimInfoSet( pRes, i-nPis, Fsim_ManTerSimInfoGet(pInfo, i) );
262 return pRes;
263}
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
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◆ Fsim_ManTerStateHash()

int Fsim_ManTerStateHash ( unsigned * pState,
int nWords,
int nTableSize )

Function*************************************************************

Synopsis [Computes hash value of the node using its simulation info.]

Description []

SideEffects []

SeeAlso []

Definition at line 178 of file fsimTsim.c.

179{
180 static int s_FPrimes[128] = {
181 1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459,
182 1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997,
183 2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543,
184 2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089,
185 3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671,
186 3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243,
187 4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871,
188 4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471,
189 5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073,
190 6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689,
191 6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309,
192 7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933,
193 8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
194 };
195 unsigned uHash;
196 int i;
197 uHash = 0;
198 for ( i = 0; i < nWords; i++ )
199 uHash ^= pState[i] * s_FPrimes[i & 0x7F];
200 return uHash % nTableSize;
201}
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◆ Fsim_ManTerStateInsert()

void Fsim_ManTerStateInsert ( unsigned * pState,
int nWords,
unsigned ** pBins,
int nBins )

Function*************************************************************

Synopsis [Inserts value into the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 236 of file fsimTsim.c.

237{
238 int Hash = Fsim_ManTerStateHash( pState, nWords, nBins );
239 assert( !Fsim_ManTerStateLookup( pState, nWords, pBins, nBins ) );
240 Fsim_ManTerStateSetNext( pState, nWords, pBins[Hash] );
241 pBins[Hash] = pState;
242}
int Fsim_ManTerStateHash(unsigned *pState, int nWords, int nTableSize)
Definition fsimTsim.c:178
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◆ Fsim_ManTerStateLookup()

int Fsim_ManTerStateLookup ( unsigned * pState,
int nWords,
unsigned ** pBins,
int nBins )

Function*************************************************************

Synopsis [Inserts value into the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 214 of file fsimTsim.c.

215{
216 unsigned * pEntry;
217 int Hash;
218 Hash = Fsim_ManTerStateHash( pState, nWords, nBins );
219 for ( pEntry = pBins[Hash]; pEntry; pEntry = Fsim_ManTerStateNext(pEntry, nWords) )
220 if ( !memcmp( pEntry, pState, sizeof(unsigned) * nWords ) )
221 return 1;
222 return 0;
223}
int memcmp()
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◆ Fsim_ManTerStatePrint()

void Fsim_ManTerStatePrint ( unsigned * pState,
int nRegs )

Function*************************************************************

Synopsis [Inserts value into the table.]

Description []

SideEffects []

SeeAlso []

Definition at line 276 of file fsimTsim.c.

277{
278 int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
279 for ( i = 0; i < nRegs; i++ )
280 {
281 Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
282 if ( Value == 1 )
283 printf( "0" ), nZeros++;
284 else if ( Value == 2 )
285 printf( "1" ), nOnes++;
286 else if ( Value == 3 )
287 printf( "x" ), nDcs++;
288 else
289 assert( 0 );
290 }
291 printf( " (0=%5d, 1=%5d, x=%5d)\n", nZeros, nOnes, nDcs );
292}