ABC: A System for Sequential Synthesis and Verification
 
Loading...
Searching...
No Matches
acecXor.c
Go to the documentation of this file.
1
20
21#include "acecInt.h"
22#include "misc/vec/vecWec.h"
23#include "misc/extra/extra.h"
24#include "misc/util/utilTruth.h"
25
27
31
32
36
49{
50 Gia_Obj_t * pFan0, * pFan1;
51 Vec_Int_t * vCount2 = Vec_IntAlloc( Gia_ManObjNum(p) );
52 int i, Entry, Count = 0;
53 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
54 if ( Vec_IntEntry(vXors, 4*i+3) == 0 )
55 Vec_IntAddToEntry( vCount2, Vec_IntEntry(vXors, 4*i), 1 );
56 Vec_IntForEachEntry( vCount2, Entry, i )
57 if ( Entry > 1 )
58 printf( "*** Obj %d has %d two-input XOR cuts.\n", i, Entry ), Count++;
59 else if ( Entry == 1 && Gia_ObjRecognizeExor(Gia_ManObj(p, i), &pFan0, &pFan1) )
60 printf( "*** Obj %d cannot be recognized as XOR.\n", i );
61 if ( Count == 0 )
62 printf( "*** There no multiple two-input XOR cuts.\n" );
63 Vec_IntFree( vCount2 );
64}
65
78{
79 Vec_Int_t * vOrder = Vec_IntAlloc( Vec_IntSize(vXorRoots) );
80 Vec_Int_t * vMove = Vec_IntStartFull( Vec_IntSize(vXorRoots) );
81 int i, k, Entry, This;
82 // iterate through adders and for each try mark the next one
83 for ( i = 0; 6*i < Vec_IntSize(vAdds); i++ )
84 {
85 int Node = Vec_IntEntry(vAdds, 6*i+4);
86 if ( Vec_IntEntry(vRanks, Node) == -1 )
87 continue;
88 for ( k = 0; k < 3; k++ )
89 {
90 int Fanin = Vec_IntEntry(vAdds, 6*i+k);
91 if ( Vec_IntEntry(vRanks, Fanin) == -1 )
92 continue;
93 //printf( "%4d: %2d -> %2d\n", Node, Vec_IntEntry(vRanks, Node), Vec_IntEntry(vRanks, Fanin) );
94 Vec_IntWriteEntry( vMove, Vec_IntEntry(vRanks, Node), Vec_IntEntry(vRanks, Fanin) );
95 }
96 }
97//Vec_IntPrint( vMove );
98 // find reodering
99 Vec_IntForEachEntry( vMove, Entry, i )
100 if ( Entry == -1 && Vec_IntFind(vMove, i) >= 0 )
101 break;
102 assert( i < Vec_IntSize(vMove) );
103 while ( 1 )
104 {
105 Vec_IntPush( vOrder, Vec_IntEntry(vXorRoots, i) );
106 Entry = i;
107 Vec_IntForEachEntry( vMove, This, i )
108 if ( This == Entry )
109 break;
110 if ( i == Vec_IntSize(vMove) )
111 break;
112 }
113 Vec_IntFree( vMove );
114//Vec_IntPrint( vOrder );
115 return vOrder;
116}
117
129// marks XOR outputs
131{
132 Vec_Bit_t * vMap = Vec_BitStart( Gia_ManObjNum(p) ); int i;
133 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
134 Vec_BitWriteEntry( vMap, Vec_IntEntry(vXors, 4*i), 1 );
135 return vMap;
136}
137// marks XOR outputs participating in trees
139{
140 Vec_Bit_t * vMap = Vec_BitStart( Gia_ManObjNum(p) ); int i;
141 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
142 if ( Vec_IntEntry(vRanks, Vec_IntEntry(vXors, 4*i)) != -1 )
143 Vec_BitWriteEntry( vMap, Vec_IntEntry(vXors, 4*i), 1 );
144 return vMap;
145}
146// marks MAJ outputs
148{
149 Vec_Bit_t * vMap = Vec_BitStart( Gia_ManObjNum(p) ); int i;
150 for ( i = 0; 6*i < Vec_IntSize(vAdds); i++ )
151 Vec_BitWriteEntry( vMap, Vec_IntEntry(vAdds, 6*i+4), 1 );
152 return vMap;
153}
154// marks MAJ outputs participating in trees
156{
157 Vec_Int_t * vMap = Vec_IntStartFull( Gia_ManObjNum(p) ); int i;
158 for ( i = 0; 6*i < Vec_IntSize(vAdds); i++ )
159 if ( Vec_IntEntry(vRanks, Vec_IntEntry(vAdds, 6*i+4)) != -1 )
160 Vec_IntWriteEntry( vMap, Vec_IntEntry(vAdds, 6*i+4), i );
161 return vMap;
162}
163// marks nodes appearing as fanins to XORs
165{
166 Vec_Bit_t * vMap = Vec_BitStart( Gia_ManObjNum(p) ); int i;
167 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
168 {
169 Vec_BitWriteEntry( vMap, Vec_IntEntry(vXors, 4*i+1), 1 );
170 Vec_BitWriteEntry( vMap, Vec_IntEntry(vXors, 4*i+2), 1 );
171 Vec_BitWriteEntry( vMap, Vec_IntEntry(vXors, 4*i+3), 1 );
172 }
173 return vMap;
174}
175// collects XOR roots (XOR nodes not appearing as fanins of other XORs)
177{
178 Vec_Bit_t * vMapXorIns = Acec_MapXorIns( p, vXors );
179 Vec_Int_t * vXorRoots = Vec_IntAlloc( 100 ); int i;
180 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
181 if ( !Vec_BitEntry(vMapXorIns, Vec_IntEntry(vXors, 4*i)) )
182 Vec_IntPushUniqueOrder( vXorRoots, Vec_IntEntry(vXors, 4*i) );
183 Vec_BitFree( vMapXorIns );
184 return vXorRoots;
185}
186// collects XOR trees belonging to each of XOR roots
188{
189 Vec_Int_t * vDoubles = Vec_IntAlloc( 100 );
190 int i, k, Entry;
191 // map roots into their ranks
192 Vec_Int_t * vRanks = Vec_IntStartFull( Gia_ManObjNum(p) );
193 Vec_IntForEachEntry( vXorRoots, Entry, i )
194 Vec_IntWriteEntry( vRanks, Entry, i );
195 // map nodes into their ranks
196 for ( i = Vec_IntSize(vXors)/4 - 1; i >= 0; i-- )
197 {
198 int Root = Vec_IntEntry( vXors, 4*i );
199 int Rank = Vec_IntEntry( vRanks, Root );
200 // skip XORs that are not part of any tree
201 if ( Rank == -1 )
202 continue;
203 // iterate through XOR inputs
204 for ( k = 1; k < 4; k++ )
205 {
206 int Node = Vec_IntEntry( vXors, 4*i+k );
207 if ( Node == 0 ) // HA
208 continue;
209 Entry = Vec_IntEntry( vRanks, Node );
210 if ( Entry == Rank ) // the same tree
211 continue;
212 if ( Entry == -1 )
213 Vec_IntWriteEntry( vRanks, Node, Rank );
214 else
215 Vec_IntPush( vDoubles, Node );
216
217 if ( Entry != -1 && Gia_ObjIsAnd(Gia_ManObj(p, Node)))
218 printf( "Xor node %d belongs to Tree %d and Tree %d.\n", Node, Entry, Rank );
219 }
220 }
221 // remove duplicated entries
222 Vec_IntForEachEntry( vDoubles, Entry, i )
223 Vec_IntWriteEntry( vRanks, Entry, -1 );
224 Vec_IntFree( vDoubles );
225 return vRanks;
226}
227// collects leaves of each XOR tree
228Vec_Wec_t * Acec_FindXorLeaves( Gia_Man_t * p, Vec_Int_t * vXors, Vec_Int_t * vAdds, Vec_Int_t * vXorRoots, Vec_Int_t * vRanks, Vec_Wec_t ** pvAddBoxes )
229{
230 Vec_Bit_t * vMapXors = Acec_MapXorOuts2( p, vXors, vRanks );
231 Vec_Int_t * vMapMajs = Acec_MapMajOuts2( p, vAdds, vRanks );
232 Vec_Wec_t * vXorLeaves = Vec_WecStart( Vec_IntSize(vXorRoots) );
233 Vec_Wec_t * vAddBoxes = Vec_WecStart( Vec_IntSize(vXorRoots) );
234 int i, k;
235 for ( i = 0; 4*i < Vec_IntSize(vXors); i++ )
236 {
237 int Xor = Vec_IntEntry(vXors, 4*i);
238 int Rank = Vec_IntEntry(vRanks, Xor);
239 if ( Rank == -1 )
240 continue;
241 for ( k = 1; k < 4; k++ )
242 {
243 int Fanin = Vec_IntEntry(vXors, 4*i+k);
244 //int RankFanin = Vec_IntEntry(vRanks, Fanin);
245 if ( Fanin == 0 )
246 continue;
247 if ( Vec_BitEntry(vMapXors, Fanin) )
248 {
249 assert( Rank == Vec_IntEntry(vRanks, Fanin) );
250 continue;
251 }
252// if ( Vec_BitEntry(vMapXors, Fanin) && Rank == RankFanin )
253// continue;
254 if ( Vec_IntEntry(vMapMajs, Fanin) == -1 ) // no adder driving this input
255 Vec_WecPush( vXorLeaves, Rank, Fanin );
256 else if ( Vec_IntEntry(vRanks, Xor) > 0 ) // save adder box
257 Vec_WecPush( vAddBoxes, Rank-1, Vec_IntEntry(vMapMajs, Fanin) );
258 }
259 }
260 Vec_BitFree( vMapXors );
261 Vec_IntFree( vMapMajs );
262 if ( pvAddBoxes )
263 *pvAddBoxes = vAddBoxes;
264 return vXorLeaves;
265}
267{
268 Vec_Bit_t * vMarked = Acec_MultMarkPPs( p );
269 Vec_Int_t * vLevel;
270 int i, k, iLit;
271 Vec_WecForEachLevel( vLitLeaves, vLevel, i )
272 {
273 int CountPI = 0, CountB = 0, CountNB = 0;
274 Vec_IntForEachEntry( vLevel, iLit, k )
275 if ( !Gia_ObjIsAnd(Gia_ManObj(p, Abc_Lit2Var(iLit))) )
276 CountPI++;
277 else if ( Vec_BitEntry( vMarked, Abc_Lit2Var(iLit) ) )
278 CountB++;
279 else
280 CountNB++;
281
282 printf( "Rank %2d : Lits = %5d PI = %d Booth = %5d Non-Booth = %5d\n", i, Vec_IntSize(vLevel), CountPI, CountB, CountNB );
283 }
284 Vec_BitFree( vMarked );
285}
286Acec_Box_t * Acec_FindBox( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Wec_t * vAddBoxes, Vec_Wec_t * vXorLeaves, Vec_Int_t * vXorRoots )
287{
288 extern Vec_Int_t * Acec_TreeCarryMap( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Wec_t * vBoxes );
289 extern void Acec_TreePhases_rec( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Int_t * vMap, int Node, int fPhase, Vec_Bit_t * vVisit );
290 extern void Acec_TreeVerifyPhases( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Wec_t * vBoxes );
291 extern void Acec_TreeVerifyPhases2( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Wec_t * vBoxes );
292
293 int MaxRank = Vec_WecSize( vAddBoxes );
294 Vec_Bit_t * vVisit = Vec_BitStart( Vec_IntSize(vAdds)/6 );
295 Vec_Bit_t * vIsLeaf = Vec_BitStart( Gia_ManObjNum(p) );
296 Vec_Bit_t * vIsRoot = Vec_BitStart( Gia_ManObjNum(p) );
297 Vec_Int_t * vLevel, * vLevel2, * vMap;
298 int i, j, k, Box, Node;
299
300 Acec_Box_t * pBox = ABC_CALLOC( Acec_Box_t, 1 );
301 pBox->pGia = p;
302 pBox->vAdds = vAddBoxes; // Vec_WecDup( vAddBoxes );
303 pBox->vLeafLits = Vec_WecStart( MaxRank + 0 );
304 pBox->vRootLits = Vec_WecStart( MaxRank + 0 );
305
306 assert( Vec_WecSize(vAddBoxes) == Vec_WecSize(vXorLeaves) );
307 assert( Vec_WecSize(vAddBoxes) == Vec_IntSize(vXorRoots) );
308
309 // collect boxes; mark inputs/outputs
310 Vec_WecForEachLevel( pBox->vAdds, vLevel, i )
311 Vec_IntForEachEntry( vLevel, Box, k )
312 {
313 Vec_BitWriteEntry( vIsLeaf, Vec_IntEntry(vAdds, 6*Box+0), 1 );
314 Vec_BitWriteEntry( vIsLeaf, Vec_IntEntry(vAdds, 6*Box+1), 1 );
315 Vec_BitWriteEntry( vIsLeaf, Vec_IntEntry(vAdds, 6*Box+2), 1 );
316 Vec_BitWriteEntry( vIsRoot, Vec_IntEntry(vAdds, 6*Box+3), 1 );
317 Vec_BitWriteEntry( vIsRoot, Vec_IntEntry(vAdds, 6*Box+4), 1 );
318 }
319 // sort each level
320 Vec_WecForEachLevel( pBox->vAdds, vLevel, i )
321 Vec_IntSort( vLevel, 0 );
322
323 // set phases starting from roots
324 vMap = Acec_TreeCarryMap( p, vAdds, pBox->vAdds );
325 Vec_WecForEachLevelReverse( pBox->vAdds, vLevel, i )
326 Vec_IntForEachEntry( vLevel, Box, k )
327 if ( !Vec_BitEntry( vIsLeaf, Vec_IntEntry(vAdds, 6*Box+4) ) )
328 {
329 //printf( "Pushing phase of output %d of box %d\n", Vec_IntEntry(vAdds, 6*Box+4), Box );
330 Acec_TreePhases_rec( p, vAdds, vMap, Vec_IntEntry(vAdds, 6*Box+4), Vec_IntEntry(vAdds, 6*Box+2) != 0, vVisit );
331 }
332 Acec_TreeVerifyPhases( p, vAdds, pBox->vAdds );
333 Acec_TreeVerifyPhases2( p, vAdds, pBox->vAdds );
334 Vec_BitFree( vVisit );
335 Vec_IntFree( vMap );
336
337 // collect inputs/outputs
338 Vec_BitWriteEntry( vIsRoot, 0, 1 );
339 Vec_WecForEachLevel( pBox->vAdds, vLevel, i )
340 Vec_IntForEachEntry( vLevel, Box, j )
341 {
342 for ( k = 0; k < 3; k++ )
343 if ( !Vec_BitEntry( vIsRoot, Vec_IntEntry(vAdds, 6*Box+k) ) )
344 Vec_WecPush( pBox->vLeafLits, i, Abc_Var2Lit(Vec_IntEntry(vAdds, 6*Box+k), Acec_SignBit2(vAdds, Box, k)) );
345 for ( k = 3; k < 5; k++ )
346 if ( !Vec_BitEntry( vIsLeaf, Vec_IntEntry(vAdds, 6*Box+k) ) )
347 Vec_WecPush( pBox->vRootLits, k == 4 ? i + 1 : i, Abc_Var2Lit(Vec_IntEntry(vAdds, 6*Box+k), Acec_SignBit2(vAdds, Box, k)) );
348 if ( Vec_IntEntry(vAdds, 6*Box+2) == 0 && Acec_SignBit2(vAdds, Box, 2) )
349 Vec_WecPush( pBox->vLeafLits, i, 1 );
350 }
351 Vec_BitFree( vIsLeaf );
352 Vec_BitFree( vIsRoot );
353
354 // collect last bit
355 vLevel = Vec_WecEntry( pBox->vLeafLits, Vec_WecSize(pBox->vLeafLits)-1 );
356 vLevel2 = Vec_WecEntry( vXorLeaves, Vec_WecSize(vXorLeaves)-1 );
357 if ( Vec_IntSize(vLevel) == 0 && Vec_IntSize(vLevel2) > 0 )
358 {
359 Vec_IntForEachEntry( vLevel2, Node, k )
360 Vec_IntPush( vLevel, Abc_Var2Lit(Node, 0) );
361 }
362 vLevel = Vec_WecEntry( pBox->vRootLits, Vec_WecSize(pBox->vRootLits)-1 );
363 Vec_IntFill( vLevel, 1, Abc_Var2Lit(Vec_IntEntryLast(vXorRoots), 0) );
364
365 // sort each level
366 Vec_WecForEachLevel( pBox->vLeafLits, vLevel, i )
367 Vec_IntSort( vLevel, 0 );
368 Vec_WecForEachLevel( pBox->vRootLits, vLevel, i )
369 Vec_IntSort( vLevel, 1 );
370
371 //Acec_CheckBoothPPs( p, pBox->vLeafLits );
372 return pBox;
373}
374
376{
377 extern void Acec_TreeVerifyConnections( Gia_Man_t * p, Vec_Int_t * vAdds, Vec_Wec_t * vBoxes );
378
379 abctime clk = Abc_Clock();
380 Acec_Box_t * pBox = NULL;
381 Vec_Int_t * vXors, * vAdds = Ree_ManComputeCuts( p, &vXors, 0 );
382 Vec_Int_t * vTemp, * vXorRoots = Acec_FindXorRoots( p, vXors );
383 Vec_Int_t * vRanks = Acec_RankTrees( p, vXors, vXorRoots );
384 Vec_Wec_t * vXorLeaves, * vAddBoxes = NULL;
385
387
388 //Acec_CheckXors( p, vXors );
389
390 //Ree_ManPrintAdders( vAdds, 1 );
391 if ( fVerbose )
392 printf( "Detected %d full-adders and %d half-adders. Found %d XOR-cuts. ", Ree_ManCountFadds(vAdds), Vec_IntSize(vAdds)/6-Ree_ManCountFadds(vAdds), Vec_IntSize(vXors)/4 );
393 if ( fVerbose )
394 Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
395
396 vXorRoots = Acec_OrderTreeRoots( p, vAdds, vTemp = vXorRoots, vRanks );
397 Vec_IntFree( vTemp );
398 Vec_IntFree( vRanks );
399
400 vRanks = Acec_RankTrees( p, vXors, vXorRoots );
401 vXorLeaves = Acec_FindXorLeaves( p, vXors, vAdds, vXorRoots, vRanks, &vAddBoxes );
402 Vec_IntFree( vRanks );
403
404 //printf( "XOR roots after reordering: \n" );
405 //Vec_IntPrint( vXorRoots );
406 //printf( "XOR leaves: \n" );
407 //Vec_WecPrint( vXorLeaves, 0 );
408 //printf( "Adder boxes: \n" );
409 //Vec_WecPrint( vAddBoxes, 0 );
410
411 Acec_TreeVerifyConnections( p, vAdds, vAddBoxes );
412
413 pBox = Acec_FindBox( p, vAdds, vAddBoxes, vXorLeaves, vXorRoots );
414 //Vec_WecFree( vAddBoxes );
415
416 if ( fVerbose )
417 Acec_TreePrintBox( pBox, vAdds );
418
419 Vec_IntFree( vXorRoots );
420 Vec_WecFree( vXorLeaves );
421
422 Vec_IntFree( vXors );
423 Vec_IntFree( vAdds );
424
425 return pBox;
426}
427
428
441{
442 Vec_Wrd_t * vSimsPi = Vec_WrdStartTruthTables( Gia_ManCiNum(p) );
443 Vec_Wrd_t * vSims = Gia_ManSimPatSimOut( p, vSimsPi, 1 );
444 int n, i, nWords = Vec_WrdSize(vSimsPi) / Gia_ManCiNum(p);
445 Gia_Obj_t * pObj; Vec_Wrd_t * vSims2;
446 Gia_ManForEachAnd( p, pObj, i )
447 {
448 Gia_Obj_t Obj = *pObj;
449 for ( n = 0; n < 2; n++ )
450 {
451 if ( n )
452 {
453 pObj->iDiff1 = pObj->iDiff0;
454 pObj->fCompl1 = pObj->fCompl0;
455 }
456 else
457 {
458 pObj->iDiff0 = pObj->iDiff1;
459 pObj->fCompl0 = pObj->fCompl1;
460 }
461 vSims2 = Gia_ManSimPatSimOut( p, vSimsPi, 1 );
462 printf( "%2d %2d : %5d\n", i, n, Abc_TtCountOnesVecXor(Vec_WrdArray(vSims), Vec_WrdArray(vSims2), Vec_WrdSize(vSims2)) );
463 Vec_WrdFree( vSims2 );
464 *pObj = Obj;
465 }
466 }
467 Vec_WrdFree( vSimsPi );
468 Vec_WrdFree( vSims );
469 nWords = 0;
470}
471
475
476
478
int nWords
Definition abcNpn.c:127
ABC_INT64_T abctime
Definition abc_global.h:332
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
#define ABC_NAMESPACE_IMPL_START
#define ABC_NAMESPACE_IMPL_END
Vec_Bit_t * Acec_MultMarkPPs(Gia_Man_t *p)
Definition acecMult.c:509
typedefABC_NAMESPACE_HEADER_START struct Acec_Box_t_ Acec_Box_t
INCLUDES ///.
Definition acecInt.h:40
void Acec_TreePrintBox(Acec_Box_t *pBox, Vec_Int_t *vAdds)
Definition acecTree.c:586
void Acec_TreeVerifyPhases2(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Wec_t *vBoxes)
Definition acecTree.c:306
Vec_Int_t * Acec_TreeCarryMap(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Wec_t *vBoxes)
Definition acecTree.c:379
void Acec_TreePhases_rec(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Int_t *vMap, int Node, int fPhase, Vec_Bit_t *vVisit)
Definition acecTree.c:389
void Acec_TreeVerifyConnections(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Wec_t *vBoxes)
Definition acecTree.c:336
void Acec_TreeVerifyPhases(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Wec_t *vBoxes)
Definition acecTree.c:298
Vec_Int_t * Acec_OrderTreeRoots(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Int_t *vXorRoots, Vec_Int_t *vRanks)
Definition acecXor.c:77
Vec_Int_t * Acec_FindXorRoots(Gia_Man_t *p, Vec_Int_t *vXors)
Definition acecXor.c:176
ABC_NAMESPACE_IMPL_START void Acec_CheckXors(Gia_Man_t *p, Vec_Int_t *vXors)
DECLARATIONS ///.
Definition acecXor.c:48
Vec_Bit_t * Acec_MapXorOuts(Gia_Man_t *p, Vec_Int_t *vXors)
Definition acecXor.c:130
Vec_Wec_t * Acec_FindXorLeaves(Gia_Man_t *p, Vec_Int_t *vXors, Vec_Int_t *vAdds, Vec_Int_t *vXorRoots, Vec_Int_t *vRanks, Vec_Wec_t **pvAddBoxes)
Definition acecXor.c:228
Vec_Int_t * Acec_RankTrees(Gia_Man_t *p, Vec_Int_t *vXors, Vec_Int_t *vXorRoots)
Definition acecXor.c:187
Acec_Box_t * Acec_FindBox(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Wec_t *vAddBoxes, Vec_Wec_t *vXorLeaves, Vec_Int_t *vXorRoots)
Definition acecXor.c:286
Acec_Box_t * Acec_ProduceBox(Gia_Man_t *p, int fVerbose)
Definition acecXor.c:375
Vec_Int_t * Acec_MapMajOuts2(Gia_Man_t *p, Vec_Int_t *vAdds, Vec_Int_t *vRanks)
Definition acecXor.c:155
void Gia_ManTestXor(Gia_Man_t *p)
Definition acecXor.c:440
Vec_Bit_t * Acec_MapXorOuts2(Gia_Man_t *p, Vec_Int_t *vXors, Vec_Int_t *vRanks)
Definition acecXor.c:138
Vec_Bit_t * Acec_MapMajOuts(Gia_Man_t *p, Vec_Int_t *vAdds)
Definition acecXor.c:147
Vec_Bit_t * Acec_MapXorIns(Gia_Man_t *p, Vec_Int_t *vXors)
Definition acecXor.c:164
void Acec_CheckBoothPPs(Gia_Man_t *p, Vec_Wec_t *vLitLeaves)
Definition acecXor.c:266
Vec_Int_t * Ree_ManComputeCuts(Gia_Man_t *p, Vec_Int_t **pvXors, int fVerbose)
Definition acecRe.c:408
int Ree_ManCountFadds(Vec_Int_t *vAdds)
Definition acecRe.c:556
typedefABC_NAMESPACE_IMPL_START struct Vec_Int_t_ Vec_Int_t
DECLARATIONS ///.
Definition bblif.c:37
Cube * p
Definition exorList.c:222
Vec_Wrd_t * Gia_ManSimPatSimOut(Gia_Man_t *pGia, Vec_Wrd_t *vSimsPi, int fOuts)
Definition giaSimBase.c:138
#define Gia_ManForEachAnd(p, pObj, i)
Definition gia.h:1214
struct Gia_Obj_t_ Gia_Obj_t
Definition gia.h:76
struct Gia_Man_t_ Gia_Man_t
Definition gia.h:96
int Gia_ObjRecognizeExor(Gia_Obj_t *pObj, Gia_Obj_t **ppFan0, Gia_Obj_t **ppFan1)
Definition giaUtil.c:1018
int Gia_ManLevelNum(Gia_Man_t *p)
Definition giaUtil.c:546
unsigned iDiff1
Definition gia.h:84
unsigned fCompl1
Definition gia.h:85
unsigned fCompl0
Definition gia.h:80
unsigned iDiff0
Definition gia.h:79
#define assert(ex)
Definition util_old.h:213
typedefABC_NAMESPACE_HEADER_START struct Vec_Bit_t_ Vec_Bit_t
INCLUDES ///.
Definition vecBit.h:42
#define Vec_IntForEachEntry(vVec, Entry, i)
MACRO DEFINITIONS ///.
Definition vecInt.h:54
#define Vec_WecForEachLevel(vGlob, vVec, i)
MACRO DEFINITIONS ///.
Definition vecWec.h:55
#define Vec_WecForEachLevelReverse(vGlob, vVec, i)
Definition vecWec.h:65
typedefABC_NAMESPACE_HEADER_START struct Vec_Wec_t_ Vec_Wec_t
INCLUDES ///.
Definition vecWec.h:42
typedefABC_NAMESPACE_HEADER_START struct Vec_Wrd_t_ Vec_Wrd_t
INCLUDES ///.
Definition vecWrd.h:42