ABC: A System for Sequential Synthesis and Verification
 
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fpgaCore.c File Reference
#include "fpgaInt.h"
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Functions

int Fpga_Mapping (Fpga_Man_t *p)
 FUNCTION DEFINITIONS ///.
 

Variables

clock_t s_MappingTime
 DECLARATIONS ///.
 
int s_MappingMem
 

Function Documentation

◆ Fpga_Mapping()

int Fpga_Mapping ( Fpga_Man_t * p)

FUNCTION DEFINITIONS ///.

Function*************************************************************

Synopsis [Performs technology mapping for the given object graph.]

Description [The object graph is stored in the mapping manager. First, all the AND-nodes, which fanout into the POs, are collected in the DFS fashion. Next, three steps are performed: the k-feasible cuts are computed for each node, the truth tables are computed for each cut, and the delay-optimal matches are assigned for each node.]

SideEffects []

SeeAlso []

Definition at line 53 of file fpgaCore.c.

54{
55 clock_t clk, clkTotal = clock();
56
57 // collect the nodes reachable from POs in the DFS order (including the choices)
58 p->vAnds = Fpga_MappingDfs( p, 1 );
59 Fpga_ManReportChoices( p ); // recomputes levels
61
62 // compute the cuts of nodes in the DFS order
63 clk = clock();
65 p->timeCuts = clock() - clk;
66
67 // match the truth tables to the supergates
68 clk = clock();
69 if ( !Fpga_MappingMatches( p, 1 ) )
70 return 0;
71 p->timeMatch = clock() - clk;
72
73 // perform area recovery
74 clk = clock();
75 if ( !Fpga_MappingPostProcess( p ) )
76 return 0;
77 p->timeRecover = clock() - clk;
78//ABC_PRT( "Total mapping time", clock() - clkTotal );
79
80 s_MappingTime = clock() - clkTotal;
81 s_MappingMem = Fpga_CutCountAll(p) * (sizeof(Fpga_Cut_t) - sizeof(int) * (FPGA_MAX_LEAVES - p->nVarsMax));
82
83 // print the AI-graph used for mapping
84 //Fpga_ManShow( p, "test" );
85// if ( p->fVerbose )
86// Fpga_MappingPrintOutputArrivals( p );
87 if ( p->fVerbose )
88 {
89 ABC_PRT( "Total time", clock() - clkTotal );
90 }
91 return 1;
92}
#define ABC_PRT(a, t)
Definition abc_global.h:255
Cube * p
Definition exorList.c:222
int Fpga_CutCountAll(Fpga_Man_t *pMan)
Definition fpgaCut.c:767
void Fpga_MappingCuts(Fpga_Man_t *p)
FUNCTION DEFINITIONS ///.
Definition fpgaCut.c:130
void Fpga_ManReportChoices(Fpga_Man_t *pMan)
Definition fpgaUtils.c:897
int Fpga_MappingMatches(Fpga_Man_t *p, int fDelayOriented)
FUNCTION DEFINITIONS ///.
Definition fpgaMatch.c:67
void Fpga_MappingSetChoiceLevels(Fpga_Man_t *pMan)
Definition fpgaUtils.c:876
Fpga_NodeVec_t * Fpga_MappingDfs(Fpga_Man_t *pMan, int fCollectEquiv)
FUNCTION DEFINITIONS ///.
Definition fpgaUtils.c:54
#define FPGA_MAX_LEAVES
INCLUDES ///.
Definition fpgaInt.h:52
struct Fpga_CutStruct_t_ Fpga_Cut_t
Definition fpga.h:46
abctime s_MappingTime
DECLARATIONS ///.
Definition abcPrint.c:47
int s_MappingMem
Definition abcPrint.c:48
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Variable Documentation

◆ s_MappingMem

int s_MappingMem
extern

Definition at line 48 of file abcPrint.c.

◆ s_MappingTime

clock_t s_MappingTime
extern

DECLARATIONS ///.

CFile****************************************************************

FileName [abcPrint.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Network and node package.]

Synopsis [Printing statistics.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - June 20, 2005.]

Revision [

Id
abcPrint.c,v 1.00 2005/06/20 00:00:00 alanmi Exp

]

Definition at line 47 of file abcPrint.c.