ABC: A System for Sequential Synthesis and Verification
 
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sswCore.c File Reference
#include "sswInt.h"
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Functions

ABC_NAMESPACE_IMPL_START void Ssw_ManSetDefaultParams (Ssw_Pars_t *p)
 DECLARATIONS ///.
 
void Ssw_ManSetDefaultParamsLcorr (Ssw_Pars_t *p)
 
void Ssw_ReportConeReductions (Ssw_Man_t *p, Aig_Man_t *pAigInit, Aig_Man_t *pAigStop)
 
void Ssw_ReportOneOutput (Aig_Man_t *p, Aig_Obj_t *pObj)
 
void Ssw_ReportOutputs (Aig_Man_t *pAig)
 
void Ssw_ManUpdateEquivs (Ssw_Man_t *p, Aig_Man_t *pAig, int fVerbose)
 
Aig_Man_tSsw_SignalCorrespondenceRefine (Ssw_Man_t *p)
 
Aig_Man_tSsw_SignalCorrespondence (Aig_Man_t *pAig, Ssw_Pars_t *pPars)
 
Aig_Man_tSsw_LatchCorrespondence (Aig_Man_t *pAig, Ssw_Pars_t *pPars)
 

Function Documentation

◆ Ssw_LatchCorrespondence()

Aig_Man_t * Ssw_LatchCorrespondence ( Aig_Man_t * pAig,
Ssw_Pars_t * pPars )

Function*************************************************************

Synopsis [Performs computation of latch correspondence.]

Description []

SideEffects []

SeeAlso []

Definition at line 545 of file sswCore.c.

546{
547 Aig_Man_t * pRes;
548 Ssw_Pars_t Pars;
549 if ( pPars == NULL )
550 Ssw_ManSetDefaultParamsLcorr( pPars = &Pars );
551 pRes = Ssw_SignalCorrespondence( pAig, pPars );
552// if ( pPars->fConstrs && pPars->fVerbose )
553// Ssw_ReportConeReductions( pAig, pRes );
554 return pRes;
555}
typedefABC_NAMESPACE_HEADER_START struct Aig_Man_t_ Aig_Man_t
INCLUDES ///.
Definition aig.h:50
void Ssw_ManSetDefaultParamsLcorr(Ssw_Pars_t *p)
Definition sswCore.c:93
Aig_Man_t * Ssw_SignalCorrespondence(Aig_Man_t *pAig, Ssw_Pars_t *pPars)
Definition sswCore.c:436
typedefABC_NAMESPACE_HEADER_START struct Ssw_Pars_t_ Ssw_Pars_t
INCLUDES ///.
Definition ssw.h:40
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◆ Ssw_ManSetDefaultParams()

ABC_NAMESPACE_IMPL_START void Ssw_ManSetDefaultParams ( Ssw_Pars_t * p)

DECLARATIONS ///.

CFile****************************************************************

FileName [sswCore.c]

SystemName [ABC: Logic synthesis and verification system.]

PackageName [Inductive prover with constraints.]

Synopsis [The core procedures.]

Author [Alan Mishchenko]

Affiliation [UC Berkeley]

Date [Ver. 1.0. Started - September 1, 2008.]

Revision [

Id
sswCore.c,v 1.00 2008/09/01 00:00:00 alanmi Exp

] FUNCTION DEFINITIONS /// Function*************************************************************

Synopsis [This procedure sets default parameters.]

Description []

SideEffects []

SeeAlso []

Definition at line 45 of file sswCore.c.

46{
47 memset( p, 0, sizeof(Ssw_Pars_t) );
48 p->nPartSize = 0; // size of the partition
49 p->nOverSize = 0; // size of the overlap between partitions
50 p->nFramesK = 1; // the induction depth
51 p->nFramesAddSim = 2; // additional frames to simulate
52 p->fConstrs = 0; // treat the last nConstrs POs as seq constraints
53 p->fMergeFull = 0; // enables full merge when constraints are used
54 p->nBTLimit = 1000; // conflict limit at a node
55 p->nBTLimitGlobal = 5000000; // conflict limit for all runs
56 p->nMinDomSize = 100; // min clock domain considered for optimization
57 p->nItersStop = -1; // stop after the given number of iterations
58 p->nResimDelta = 1000; // the internal of nodes to resimulate
59 p->nStepsMax = -1; // (scorr only) the max number of induction steps
60 p->fPolarFlip = 0; // uses polarity adjustment
61 p->fLatchCorr = 0; // performs register correspondence
62 p->fConstCorr = 0; // performs constant correspondence
63 p->fOutputCorr = 0; // perform 'PO correspondence'
64 p->fSemiFormal = 0; // enable semiformal filtering
65 p->fDynamic = 0; // dynamic partitioning
66 p->fLocalSim = 0; // local simulation
67 p->fVerbose = 0; // verbose stats
68 p->fEquivDump = 0; // enables dumping equivalences
69 p->fEquivDump2 = 0; // enables dumping equivalences
70
71 // latch correspondence
72 p->fLatchCorrOpt = 0; // performs optimized register correspondence
73 p->nSatVarMax = 1000; // the max number of SAT variables
74 p->nRecycleCalls = 50; // calls to perform before recycling SAT solver
75 // signal correspondence
76 p->nSatVarMax2 = 5000; // the max number of SAT variables
77 p->nRecycleCalls2 = 250; // calls to perform before recycling SAT solver
78 // return values
79 p->nIters = 0; // the number of iterations performed
80}
Cube * p
Definition exorList.c:222
char * memset()
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◆ Ssw_ManSetDefaultParamsLcorr()

void Ssw_ManSetDefaultParamsLcorr ( Ssw_Pars_t * p)

Function*************************************************************

Synopsis [This procedure sets default parameters.]

Description []

SideEffects []

SeeAlso []

Definition at line 93 of file sswCore.c.

94{
96 p->fLatchCorrOpt = 1;
97 p->nBTLimit = 10000;
98}
ABC_NAMESPACE_IMPL_START void Ssw_ManSetDefaultParams(Ssw_Pars_t *p)
DECLARATIONS ///.
Definition sswCore.c:45
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◆ Ssw_ManUpdateEquivs()

void Ssw_ManUpdateEquivs ( Ssw_Man_t * p,
Aig_Man_t * pAig,
int fVerbose )

Function*************************************************************

Synopsis [Remove from-equivs that are in the cone of constraints.]

Description []

SideEffects []

SeeAlso []

Definition at line 188 of file sswCore.c.

189{
190 Vec_Ptr_t * vCones;
191 Aig_Obj_t ** pArray;
192 Aig_Obj_t * pObj;
193 int i, nTotal = 0, nRemoved = 0;
194 // collect the nodes in the cone of constraints
195 pArray = (Aig_Obj_t **)Vec_PtrArray(pAig->vCos);
196 pArray += Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig);
197 vCones = Aig_ManDfsNodes( pAig, pArray, Saig_ManConstrNum(pAig) );
198 // remove all the node that are equiv to something and are in the cones
199 Aig_ManForEachObj( pAig, pObj, i )
200 {
201 if ( !Aig_ObjIsCi(pObj) && !Aig_ObjIsNode(pObj) )
202 continue;
203 if ( pAig->pReprs[i] != NULL )
204 nTotal++;
205 if ( !Aig_ObjIsTravIdCurrent(pAig, pObj) )
206 continue;
207 if ( pAig->pReprs[i] )
208 {
209 if ( p->pPars->fConstrs && !p->pPars->fMergeFull )
210 {
211 pAig->pReprs[i] = NULL;
212 nRemoved++;
213 }
214 }
215 }
216 // collect statistics
217 p->nConesTotal = Aig_ManCiNum(pAig) + Aig_ManNodeNum(pAig);
218 p->nConesConstr = Vec_PtrSize(vCones);
219 p->nEquivsTotal = nTotal;
220 p->nEquivsConstr = nRemoved;
221 Vec_PtrFree( vCones );
222}
#define Aig_ManForEachObj(p, pObj, i)
Definition aig.h:403
struct Aig_Obj_t_ Aig_Obj_t
Definition aig.h:51
Vec_Ptr_t * Aig_ManDfsNodes(Aig_Man_t *p, Aig_Obj_t **ppNodes, int nNodes)
Definition aigDfs.c:347
int nTotal
DECLARATIONS ///.
Definition cutTruth.c:37
typedefABC_NAMESPACE_HEADER_START struct Vec_Ptr_t_ Vec_Ptr_t
INCLUDES ///.
Definition vecPtr.h:42
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◆ Ssw_ReportConeReductions()

void Ssw_ReportConeReductions ( Ssw_Man_t * p,
Aig_Man_t * pAigInit,
Aig_Man_t * pAigStop )

Function*************************************************************

Synopsis [Reports improvements for property cones.]

Description []

SideEffects []

SeeAlso []

Definition at line 111 of file sswCore.c.

112{
113 Aig_Man_t * pAig1, * pAig2, * pAux;
114 pAig1 = Aig_ManDupOneOutput( pAigInit, 0, 1 );
115 pAig1 = Aig_ManScl( pAux = pAig1, 1, 1, 0, -1, -1, 0, 0 );
116 Aig_ManStop( pAux );
117 pAig2 = Aig_ManDupOneOutput( pAigStop, 0, 1 );
118 pAig2 = Aig_ManScl( pAux = pAig2, 1, 1, 0, -1, -1, 0, 0 );
119 Aig_ManStop( pAux );
120
121 p->nNodesBegC = Aig_ManNodeNum(pAig1);
122 p->nNodesEndC = Aig_ManNodeNum(pAig2);
123 p->nRegsBegC = Aig_ManRegNum(pAig1);
124 p->nRegsEndC = Aig_ManRegNum(pAig2);
125
126 Aig_ManStop( pAig1 );
127 Aig_ManStop( pAig2 );
128}
void Aig_ManStop(Aig_Man_t *p)
Definition aigMan.c:187
Aig_Man_t * Aig_ManDupOneOutput(Aig_Man_t *p, int iPoNum, int fAddRegs)
Definition aigDup.c:1152
Aig_Man_t * Aig_ManScl(Aig_Man_t *pAig, int fLatchConst, int fLatchEqual, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose)
Definition aigScl.c:650
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◆ Ssw_ReportOneOutput()

void Ssw_ReportOneOutput ( Aig_Man_t * p,
Aig_Obj_t * pObj )

Function*************************************************************

Synopsis [Reports one node.]

Description []

SideEffects []

SeeAlso []

Definition at line 141 of file sswCore.c.

142{
143 if ( pObj == Aig_ManConst1(p) )
144 Abc_Print( 1, "1" );
145 else if ( pObj == Aig_ManConst0(p) )
146 Abc_Print( 1, "0" );
147 else
148 Abc_Print( 1, "X" );
149}
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◆ Ssw_ReportOutputs()

void Ssw_ReportOutputs ( Aig_Man_t * pAig)

Function*************************************************************

Synopsis [Reports improvements for property cones.]

Description []

SideEffects []

SeeAlso []

Definition at line 162 of file sswCore.c.

163{
164 Aig_Obj_t * pObj;
165 int i;
166 Saig_ManForEachPo( pAig, pObj, i )
167 {
168 if ( i < Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) )
169 Abc_Print( 1, "o" );
170 else
171 Abc_Print( 1, "c" );
172 Ssw_ReportOneOutput( pAig, Aig_ObjChild0(pObj) );
173 }
174 Abc_Print( 1, "\n" );
175}
#define Saig_ManForEachPo(p, pObj, i)
Definition saig.h:93
void Ssw_ReportOneOutput(Aig_Man_t *p, Aig_Obj_t *pObj)
Definition sswCore.c:141
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◆ Ssw_SignalCorrespondence()

Aig_Man_t * Ssw_SignalCorrespondence ( Aig_Man_t * pAig,
Ssw_Pars_t * pPars )

Function*************************************************************

Synopsis [Performs computation of signal correspondence with constraints.]

Description []

SideEffects []

SeeAlso []

Definition at line 436 of file sswCore.c.

437{
438 Ssw_Pars_t Pars;
439 Aig_Man_t * pAigNew;
440 Ssw_Man_t * p;
441 assert( Aig_ManRegNum(pAig) > 0 );
442 // reset random numbers
443 Aig_ManRandom( 1 );
444 // if parameters are not given, create them
445 if ( pPars == NULL )
446 Ssw_ManSetDefaultParams( pPars = &Pars );
447/*
448 // consider the case of empty AIG
449 if ( Aig_ManNodeNum(pAig) == 0 )
450 {
451 pPars->nIters = 0;
452 // Ntl_ManFinalize() needs the following to satisfy an assertion
453 Aig_ManReprStart( pAig,Aig_ManObjNumMax(pAig) );
454 return Aig_ManDupOrdered(pAig);
455 }
456*/
457 // check and update parameters
458 if ( pPars->fLatchCorrOpt )
459 {
460 pPars->fLatchCorr = 1;
461 pPars->nFramesAddSim = 0;
462 if ( (pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0) )
463 return Ssw_SignalCorrespondencePart( pAig, pPars );
464 }
465 else
466 {
467 assert( pPars->nFramesK > 0 );
468 // perform partitioning
469 if ( (pPars->nPartSize > 0 && pPars->nPartSize < Aig_ManRegNum(pAig))
470 || (pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0) )
471 return Ssw_SignalCorrespondencePart( pAig, pPars );
472 }
473
474 if ( pPars->fScorrGia )
475 {
476 if ( pPars->fLatchCorrOpt )
477 {
478 extern Aig_Man_t * Cec_LatchCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat );
479 return Cec_LatchCorrespondence( pAig, pPars->nBTLimit, pPars->fUseCSat );
480 }
481 else
482 {
483 extern Aig_Man_t * Cec_SignalCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat );
484 return Cec_SignalCorrespondence( pAig, pPars->nBTLimit, pPars->fUseCSat );
485 }
486 }
487
488 // start the induction manager
489 p = Ssw_ManCreate( pAig, pPars );
490 // compute candidate equivalence classes
491// p->pPars->nConstrs = 1;
492 if ( p->pPars->fConstrs )
493 {
494 // create trivial equivalence classes with all nodes being candidates for constant 1
495 p->ppClasses = Ssw_ClassesPrepareSimple( pAig, pPars->fLatchCorr, pPars->nMaxLevs );
497 // derive phase bits to satisfy the constraints
498 if ( Ssw_ManSetConstrPhases( pAig, p->pPars->nFramesK + 1, &p->vInits ) != 0 )
499 {
500 Abc_Print( 1, "Ssw_SignalCorrespondence(): The init state does not satisfy the constraints!\n" );
501 p->pPars->fVerbose = 0;
502 Ssw_ManStop( p );
503 return NULL;
504 }
505 // perform simulation of the first timeframes
507 }
508 else
509 {
510 // perform one round of seq simulation and generate candidate equivalence classes
511 p->ppClasses = Ssw_ClassesPrepare( pAig, pPars->nFramesK, pPars->fLatchCorr, pPars->fConstCorr, pPars->fOutputCorr, pPars->nMaxLevs, pPars->fVerbose );
512// p->ppClasses = Ssw_ClassesPrepareTargets( pAig );
513 if ( pPars->fLatchCorrOpt )
514 p->pSml = Ssw_SmlStart( pAig, 0, 2, 1 );
515 else if ( pPars->fDynamic )
516 p->pSml = Ssw_SmlStart( pAig, 0, p->nFrames + p->pPars->nFramesAddSim, 1 );
517 else
518 p->pSml = Ssw_SmlStart( pAig, 0, 1 + p->pPars->nFramesAddSim, 1 );
519 Ssw_ClassesSetData( p->ppClasses, p->pSml, (unsigned(*)(void *,Aig_Obj_t *))Ssw_SmlObjHashWord, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
520 }
521 // allocate storage
522 if ( p->pPars->fLocalSim && p->pSml )
523 p->pVisited = ABC_CALLOC( int, Ssw_SmlNumFrames( p->pSml ) * Aig_ManObjNumMax(p->pAig) );
524 // perform refinement of classes
526// Ssw_ReportOutputs( pAigNew );
527 if ( pPars->fConstrs && pPars->fVerbose )
528 Ssw_ReportConeReductions( p, pAig, pAigNew );
529 // cleanup
530 Ssw_ManStop( p );
531 return pAigNew;
532}
#define ABC_CALLOC(type, num)
Definition abc_global.h:265
unsigned Aig_ManRandom(int fReset)
Definition aigUtil.c:1170
Aig_Man_t * Cec_LatchCorrespondence(Aig_Man_t *pAig, int nConfs, int fUseCSat)
Definition cecCec.c:528
Aig_Man_t * Cec_SignalCorrespondence(Aig_Man_t *pAig, int nConfs, int fUseCSat)
Definition cecCec.c:554
Ssw_Cla_t * Ssw_ClassesPrepareSimple(Aig_Man_t *pAig, int fLatchCorr, int nMaxLevs)
Definition sswClass.c:724
Ssw_Cla_t * Ssw_ClassesPrepare(Aig_Man_t *pAig, int nFramesK, int fLatchCorr, int fConstCorr, int fOutputCorr, int nMaxLevs, int fVerbose)
Definition sswClass.c:596
void Ssw_ClassesSetData(Ssw_Cla_t *p, void *pManData, unsigned(*pFuncNodeHash)(void *, Aig_Obj_t *), int(*pFuncNodeIsConst)(void *, Aig_Obj_t *), int(*pFuncNodesAreEqual)(void *, Aig_Obj_t *, Aig_Obj_t *))
Definition sswClass.c:167
void Ssw_ManRefineByConstrSim(Ssw_Man_t *p)
Definition sswConstr.c:247
Aig_Man_t * Ssw_SignalCorrespondenceRefine(Ssw_Man_t *p)
Definition sswCore.c:235
void Ssw_ReportConeReductions(Ssw_Man_t *p, Aig_Man_t *pAigInit, Aig_Man_t *pAigStop)
Definition sswCore.c:111
typedefABC_NAMESPACE_HEADER_START struct Ssw_Man_t_ Ssw_Man_t
INCLUDES ///.
Definition sswInt.h:47
Ssw_Sml_t * Ssw_SmlStart(Aig_Man_t *pAig, int nPref, int nFrames, int nWordsFrame)
Definition sswSim.c:1148
void Ssw_ManStop(Ssw_Man_t *p)
Definition sswMan.c:189
int Ssw_SmlObjIsConstBit(void *p, Aig_Obj_t *pObj)
Definition sswSim.c:147
int Ssw_SmlObjsAreEqualBit(void *p, Aig_Obj_t *pObj0, Aig_Obj_t *pObj1)
Definition sswSim.c:163
Ssw_Man_t * Ssw_ManCreate(Aig_Man_t *pAig, Ssw_Pars_t *pPars)
DECLARATIONS ///.
Definition sswMan.c:45
unsigned Ssw_SmlObjHashWord(Ssw_Sml_t *p, Aig_Obj_t *pObj)
FUNCTION DEFINITIONS ///.
Definition sswSim.c:63
int Ssw_SmlObjIsConstWord(Ssw_Sml_t *p, Aig_Obj_t *pObj)
Definition sswSim.c:102
int Ssw_ManSetConstrPhases(Aig_Man_t *p, int nFrames, Vec_Int_t **pvInits)
Definition sswConstr.c:100
int Ssw_SmlObjsAreEqualWord(Ssw_Sml_t *p, Aig_Obj_t *pObj0, Aig_Obj_t *pObj1)
Definition sswSim.c:124
Aig_Man_t * Ssw_SignalCorrespondencePart(Aig_Man_t *pAig, Ssw_Pars_t *pPars)
Definition sswPart.c:214
int Ssw_SmlNumFrames(Ssw_Sml_t *p)
Definition sswSim.c:1288
#define assert(ex)
Definition util_old.h:213
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◆ Ssw_SignalCorrespondenceRefine()

Aig_Man_t * Ssw_SignalCorrespondenceRefine ( Ssw_Man_t * p)

Function*************************************************************

Synopsis [Performs computation of signal correspondence with constraints.]

Description []

SideEffects []

SeeAlso []

Definition at line 235 of file sswCore.c.

236{
237 int nSatProof, nSatCallsSat, nRecycles, nSatFailsReal, nUniques;
238 Aig_Man_t * pAigNew;
239 int RetValue, nIter = -1, nPrev[4] = {0};
240 abctime clk, clkTotal = Abc_Clock();
241 // get the starting stats
242 p->nLitsBeg = Ssw_ClassesLitNum( p->ppClasses );
243 p->nNodesBeg = Aig_ManNodeNum(p->pAig);
244 p->nRegsBeg = Aig_ManRegNum(p->pAig);
245 // refine classes using BMC
246 if ( p->pPars->fVerbose )
247 {
248 Abc_Print( 1, "Before BMC: " );
249 Ssw_ClassesPrint( p->ppClasses, 0 );
250 }
251 if ( !p->pPars->fLatchCorr || p->pPars->nFramesK > 1 )
252 {
253 p->pMSat = Ssw_SatStart( 0 );
254 if ( p->pPars->fConstrs )
256 else
258 Ssw_SatStop( p->pMSat );
259 p->pMSat = NULL;
260 Ssw_ManCleanup( p );
261 }
262 if ( p->pPars->fVerbose )
263 {
264 Abc_Print( 1, "After BMC: " );
265 Ssw_ClassesPrint( p->ppClasses, 0 );
266 }
267 // apply semi-formal filtering
268/*
269 if ( p->pPars->fSemiFormal )
270 {
271 Aig_Man_t * pSRed;
272 Ssw_FilterUsingSemi( p, 0, 2000, p->pPars->fVerbose );
273// Ssw_FilterUsingSemi( p, 1, 100000, p->pPars->fVerbose );
274 pSRed = Ssw_SpeculativeReduction( p );
275 Aig_ManDumpBlif( pSRed, "srm.blif", NULL, NULL );
276 Aig_ManStop( pSRed );
277 }
278*/
279 if ( p->pPars->pFunc )
280 {
281 ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
282 ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
283 }
284 if ( p->pPars->nStepsMax == 0 )
285 {
286 Abc_Print( 1, "Stopped signal correspondence after BMC.\n" );
287 goto finalize;
288 }
289 // refine classes using induction
290 nSatProof = nSatCallsSat = nRecycles = nSatFailsReal = nUniques = 0;
291 for ( nIter = 0; ; nIter++ )
292 {
293 if ( p->pPars->nStepsMax == nIter )
294 {
295 Abc_Print( 1, "Stopped signal correspondence after %d refiment iterations.\n", nIter );
296 goto finalize;
297 }
298 if ( p->pPars->nItersStop >= 0 && p->pPars->nItersStop == nIter )
299 {
301 Aig_ManDumpBlif( pSRed, "srm.blif", NULL, NULL );
302 Aig_ManStop( pSRed );
303 Abc_Print( 1, "Iterative refinement is stopped before iteration %d.\n", nIter );
304 Abc_Print( 1, "The network is reduced using candidate equivalences.\n" );
305 Abc_Print( 1, "Speculatively reduced miter is saved in file \"%s\".\n", "srm.blif" );
306 Abc_Print( 1, "If the miter is SAT, the reduced result is incorrect.\n" );
307 break;
308 }
309
310clk = Abc_Clock();
311 p->pMSat = Ssw_SatStart( 0 );
312 if ( p->pPars->fLatchCorrOpt )
313 {
314 RetValue = Ssw_ManSweepLatch( p );
315 if ( p->pPars->fVerbose )
316 {
317 Abc_Print( 1, "%3d : C =%7d. Cl =%7d. Pr =%6d. Cex =%5d. R =%4d. F =%4d. ",
318 nIter, Ssw_ClassesCand1Num(p->ppClasses), Ssw_ClassesClassNum(p->ppClasses),
319 p->nSatProof-nSatProof, p->nSatCallsSat-nSatCallsSat,
320 p->nRecycles-nRecycles, p->nSatFailsReal-nSatFailsReal );
321 ABC_PRT( "T", Abc_Clock() - clk );
322 }
323 }
324 else
325 {
326 if ( p->pPars->fConstrs )
327 RetValue = Ssw_ManSweepConstr( p );
328 else if ( p->pPars->fDynamic )
329 RetValue = Ssw_ManSweepDyn( p );
330 else
331 RetValue = Ssw_ManSweep( p );
332
333 p->pPars->nConflicts += p->pMSat->pSat->stats.conflicts;
334 if ( p->pPars->fVerbose )
335 {
336 Abc_Print( 1, "%3d : C =%7d. Cl =%7d. LR =%6d. NR =%6d. ",
337 nIter, Ssw_ClassesCand1Num(p->ppClasses), Ssw_ClassesClassNum(p->ppClasses),
338 p->nConstrReduced, Aig_ManNodeNum(p->pFrames) );
339 if ( p->pPars->fDynamic )
340 {
341 Abc_Print( 1, "Cex =%5d. ", p->nSatCallsSat-nSatCallsSat );
342 Abc_Print( 1, "R =%4d. ", p->nRecycles-nRecycles );
343 }
344 Abc_Print( 1, "F =%5d. %s ", p->nSatFailsReal-nSatFailsReal,
345 (Saig_ManPoNum(p->pAig)==1 && Ssw_ObjIsConst1Cand(p->pAig,Aig_ObjFanin0(Aig_ManCo(p->pAig,0))))? "+" : "-" );
346 ABC_PRT( "T", Abc_Clock() - clk );
347 }
348// if ( p->pPars->fDynamic && p->nSatCallsSat-nSatCallsSat < 100 )
349// p->pPars->nBTLimit = 10000;
350
351 if ( p->pPars->fStopWhenGone && Saig_ManPoNum(p->pAig) == 1 && !Ssw_ObjIsConst1Cand(p->pAig,Aig_ObjFanin0(Aig_ManCo(p->pAig,0))) )
352 {
353 printf( "Iterative refinement is stopped after iteration %d\n", nIter );
354 printf( "because the property output is no longer a candidate constant.\n" );
355 // prepare to quit
356 p->nLitsEnd = p->nLitsBeg;
357 p->nNodesEnd = p->nNodesBeg;
358 p->nRegsEnd = p->nRegsBeg;
359 // cleanup
360 Ssw_SatStop( p->pMSat );
361 p->pMSat = NULL;
362 Ssw_ManCleanup( p );
363 // cleanup
364 Aig_ManSetPhase( p->pAig );
365 Aig_ManCleanMarkB( p->pAig );
366 return Aig_ManDupSimple( p->pAig );
367 }
368 }
369 nSatProof = p->nSatProof;
370 nSatCallsSat = p->nSatCallsSat;
371 nRecycles = p->nRecycles;
372 nSatFailsReal = p->nSatFailsReal;
373 nUniques = p->nUniques;
374
375 p->nVarsMax = Abc_MaxInt( p->nVarsMax, p->pMSat->nSatVars );
376 p->nCallsMax = Abc_MaxInt( p->nCallsMax, p->pMSat->nSolverCalls );
377 Ssw_SatStop( p->pMSat );
378 p->pMSat = NULL;
379 Ssw_ManCleanup( p );
380 if ( !RetValue )
381 break;
382 if ( p->pPars->pFunc )
383 ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
384 if ( p->pPars->nLimitMax )
385 {
386 int nCur = Ssw_ClassesCand1Num(p->ppClasses);
387 if ( nIter > 4 && nPrev[0] - nCur <= 4*p->pPars->nLimitMax )
388 {
389 printf( "Iterative refinement is stopped after iteration %d\n", nIter );
390 printf( "because the refinment is very slow.\n" );
391 // prepare to quit
392 p->nLitsEnd = p->nLitsBeg;
393 p->nNodesEnd = p->nNodesBeg;
394 p->nRegsEnd = p->nRegsBeg;
395 // cleanup
396 Aig_ManSetPhase( p->pAig );
397 Aig_ManCleanMarkB( p->pAig );
398 return Aig_ManDupSimple( p->pAig );
399 }
400 nPrev[0] = nPrev[1];
401 nPrev[1] = nPrev[2];
402 nPrev[2] = nPrev[3];
403 nPrev[3] = nCur;
404 }
405 }
406
407finalize:
408 p->pPars->nIters = nIter + 1;
409p->timeTotal = Abc_Clock() - clkTotal;
410
411 Ssw_ManUpdateEquivs( p, p->pAig, p->pPars->fVerbose );
412 pAigNew = Aig_ManDupRepr( p->pAig, 0 );
413 Aig_ManSeqCleanup( pAigNew );
414//Ssw_ClassesPrint( p->ppClasses, 1 );
415 // get the final stats
416 p->nLitsEnd = Ssw_ClassesLitNum( p->ppClasses );
417 p->nNodesEnd = Aig_ManNodeNum(pAigNew);
418 p->nRegsEnd = Aig_ManRegNum(pAigNew);
419 // cleanup
420 Aig_ManSetPhase( p->pAig );
421 Aig_ManCleanMarkB( p->pAig );
422 return pAigNew;
423}
ABC_INT64_T abctime
Definition abc_global.h:332
#define ABC_PRT(a, t)
Definition abc_global.h:255
Aig_Man_t * Aig_ManDupRepr(Aig_Man_t *p, int fOrdered)
Definition aigRepr.c:267
void Aig_ManCleanMarkB(Aig_Man_t *p)
Definition aigUtil.c:167
int Aig_ManSeqCleanup(Aig_Man_t *p)
Definition aigScl.c:158
Aig_Man_t * Aig_ManDupSimple(Aig_Man_t *p)
DECLARATIONS ///.
Definition aigDup.c:46
void Aig_ManSetPhase(Aig_Man_t *pAig)
Definition aigUtil.c:1449
void Aig_ManDumpBlif(Aig_Man_t *p, char *pFileName, Vec_Ptr_t *vPiNames, Vec_Ptr_t *vPoNames)
Definition aigUtil.c:746
Aig_Man_t * Ssw_SpeculativeReduction(Ssw_Man_t *p)
Definition sswAig.c:272
int Ssw_ClassesCand1Num(Ssw_Cla_t *p)
Definition sswClass.c:259
int Ssw_ClassesLitNum(Ssw_Cla_t *p)
Definition sswClass.c:291
int Ssw_ClassesClassNum(Ssw_Cla_t *p)
Definition sswClass.c:275
void Ssw_ClassesPrint(Ssw_Cla_t *p, int fVeryVerbose)
Definition sswClass.c:414
void Ssw_SatStop(Ssw_Sat_t *p)
Definition sswCnf.c:81
ABC_NAMESPACE_IMPL_START Ssw_Sat_t * Ssw_SatStart(int fPolarFlip)
DECLARATIONS ///.
Definition sswCnf.c:45
int Ssw_ManSweepConstr(Ssw_Man_t *p)
Definition sswConstr.c:621
int Ssw_ManSweepBmcConstr(Ssw_Man_t *p)
Definition sswConstr.c:498
void Ssw_ManUpdateEquivs(Ssw_Man_t *p, Aig_Man_t *pAig, int fVerbose)
Definition sswCore.c:188
int Ssw_ManSweepDyn(Ssw_Man_t *p)
Definition sswDyn.c:373
int Ssw_ManSweepLatch(Ssw_Man_t *p)
Definition sswLcorr.c:238
int Ssw_ManSweepBmc(Ssw_Man_t *p)
Definition sswSweep.c:272
void Ssw_ManCleanup(Ssw_Man_t *p)
Definition sswMan.c:158
int Ssw_ManSweep(Ssw_Man_t *p)
Definition sswSweep.c:373
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